## @file
#  Instance of PCI Express Library using the 256 MB PCI Express MMIO window.
#
#  PCI Express Library that uses the 256 MB PCI Express MMIO window to perform
#  PCI Configuration cycles. Layers on top of an I/O Library instance.
#
#  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
#
#  This library is inherited from MdePkg/Library/BasePciExpressLib. On
#  NeoverseN1 SoC, with the unmodified version of this library, a slave error is
#  generated when host accesses the config space of a non-available device or
#  unimplemented function on a given bus. In order to resolve this for
#  NeoverseN1 SoC, a modified version of the MdePkg/Library/BasePciExpressLib
#  library is used. The modification includes a check to determine whether the
#  incoming PCI address can be safely accessed.
#
#  In addition to this, the NeoverseN1 SoC has two other limitations which
#  affect the access to the PCIe root port:
#    1. ECAM space is not contiguous, root port ECAM (BDF = 0:0:0) is isolated
#       from rest of the downstream hierarchy ECAM space.
#    2. Root port ECAM space is not capable of 8bit/16bit writes.
#  This library includes workaround for these limitations as well.
#
#  Copyright (c) 2020, ARM Limited. All rights reserved.
#
#  SPDX-License-Identifier: BSD-2-Clause-Patent
#
##

[Defines]
  INF_VERSION                    = 0x0001001A
  BASE_NAME                      = BasePciExpressLib
  FILE_GUID                      = b378dd06-de7f-4e8c-8fb0-5126adfb34bf
  MODULE_TYPE                    = BASE
  VERSION_STRING                 = 1.0
  LIBRARY_CLASS                  = PciExpressLib

[Sources]
  PciExpressLib.c

[Packages]
  MdePkg/MdePkg.dec
  Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec

[FixedPcd]
  gArmNeoverseN1SocTokenSpaceGuid.PcdPcieRootPortConfigBaseAddress
  gArmNeoverseN1SocTokenSpaceGuid.PcdPcieRootPortConfigBaseSize

[LibraryClasses]
  BaseLib
  DebugLib
  IoLib
  PcdLib

[Pcd]
  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress  ## CONSUMES