/** @file
Header file for PCH Init Common Lib
Copyright (c) 2019 Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _PCH_INIT_COMMON_LIB_H_
#define _PCH_INIT_COMMON_LIB_H_
#include
/**
This function returns PID according to PCIe controller index
@param[in] ControllerIndex PCIe controller index
@retval PCH_SBI_PID Returns PID for SBI Access
**/
PCH_SBI_PID
PchGetPcieControllerSbiPid (
IN UINT32 ControllerIndex
);
/**
This function returns PID according to Root Port Number
@param[in] RpPort Root Port Number
@retval PCH_SBI_PID Returns PID for SBI Access
**/
PCH_SBI_PID
GetRpSbiPid (
IN UINTN RpPort
);
/**
Calculate root port device number based on physical port index.
@param[in] RpIndex Root port index (0-based).
@retval Root port device number.
**/
UINT32
PchGetPcieRpDevice (
IN UINT32 RpIndex
);
/**
This function reads Pci Config register via SBI Access
@param[in] RpIndex Root Port Index (0-based)
@param[in] Offset Offset of Config register
@param[out] *Data32 Value of Config register
@retval EFI_SUCCESS SBI Read successful.
**/
EFI_STATUS
PchSbiRpPciRead32 (
IN UINT32 RpIndex,
IN UINT32 Offset,
OUT UINT32 *Data32
);
/**
This function And then Or Pci Config register via SBI Access
@param[in] RpIndex Root Port Index (0-based)
@param[in] Offset Offset of Config register
@param[in] Data32And Value of Config register to be And-ed
@param[in] Data32AOr Value of Config register to be Or-ed
@retval EFI_SUCCESS SBI Read and Write successful.
**/
EFI_STATUS
PchSbiRpPciAndThenOr32 (
IN UINT32 RpIndex,
IN UINT32 Offset,
IN UINT32 Data32And,
IN UINT32 Data32Or
);
/**
Print registers value
@param[in] PrintMmioBase Mmio base address
@param[in] PrintSize Number of registers
@param[in] OffsetFromBase Offset from mmio base address
@retval None
**/
VOID
PrintRegisters (
IN UINTN PrintMmioBase,
IN UINT32 PrintSize,
IN UINT32 OffsetFromBase
);
#endif