/** @file * Multiple APIC Description Table (MADT) * * Copyright (c) 2020, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * **/ #include "SgiPlatform.h" #include "SgiAcpiHeader.h" #include #include #include #include #define CORE_CNT (FixedPcdGet32 (PcdClusterCount) * \ FixedPcdGet32 (PcdCoreCount)) // Multiple APIC Description Table #pragma pack (1) typedef struct { EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; EFI_ACPI_6_2_GIC_STRUCTURE GicInterfaces[CORE_CNT]; EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE GicDistributor; EFI_ACPI_6_2_GICR_STRUCTURE GicRedistributor; EFI_ACPI_6_2_GIC_ITS_STRUCTURE GicIts[6]; } EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE; #pragma pack () STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = { { ARM_ACPI_HEADER ( EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE, EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION ), // MADT specific fields 0, // LocalApicAddress 0 // Flags }, { // Format: EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, // PmuIrq, GicBase, GicVBase, // GicHBase, GsivId, GicRBase, // Efficiency) // Note: The GIC Structure of the primary CPU must be the first entry // (see note in 5.2.12.14 GICC Structure of ACPI v6.2). EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core0 0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core1 0, 1, GET_MPID(0x100, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core2 0, 2, GET_MPID(0x200, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core3 0, 3, GET_MPID(0x300, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core4 0, 4, GET_MPID(0x400, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core5 0, 5, GET_MPID(0x500, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core6 0, 6, GET_MPID(0x600, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core7 0, 7, GET_MPID(0x700, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core8 0, 8, GET_MPID(0x800, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core9 0, 9, GET_MPID(0x900, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core10 0, 10, GET_MPID(0xa00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core11 0, 11, GET_MPID(0xb00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core12 0, 12, GET_MPID(0xc00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core13 0, 13, GET_MPID(0xd00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core14 0, 14, GET_MPID(0xe00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Neoverse N2 core15 0, 15, GET_MPID(0xf00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23, FixedPcdGet32 (PcdGicDistributorBase), 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */), }, // GIC Distributor Entry EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0, 3), // GIC Redistributor EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase), SIZE_16MB), // GIC ITS { EFI_ACPI_6_2_GIC_ITS_INIT(0, 0x30040000), EFI_ACPI_6_2_GIC_ITS_INIT(1, 0x30080000), EFI_ACPI_6_2_GIC_ITS_INIT(2, 0x300C0000), EFI_ACPI_6_2_GIC_ITS_INIT(3, 0x30100000), EFI_ACPI_6_2_GIC_ITS_INIT(4, 0x30140000), EFI_ACPI_6_2_GIC_ITS_INIT(5, 0x30180000), }, }; // // Reference the table being generated to prevent the optimizer from removing // the data structure from the executable // VOID* CONST ReferenceAcpiTable = &Madt;