// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2020 Rockchip Electronics Co., Ltd. * */ /dts-v1/; #include #include #include #include "rk3568.dtsi" #include "rk3568-evb.dtsi" / { model = "Rockchip RK3568 EVB1 DDR4 V10 Board"; compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568"; rk_headset: rk-headset { compatible = "rockchip_headset"; headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>; spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3 pinctrl-names = "default"; pinctrl-0 = <&hp_det>; }; vcc2v5_sys: vcc2v5-ddr { compatible = "regulator-fixed"; regulator-name = "vcc2v5-sys"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; vin-supply = <&vcc3v3_sys>; }; pcie30_avdd0v9: pcie30-avdd0v9 { compatible = "regulator-fixed"; regulator-name = "pcie30_avdd0v9"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <900000>; regulator-max-microvolt = <900000>; vin-supply = <&vcc3v3_sys>; }; pcie30_avdd1v8: pcie30-avdd1v8 { compatible = "regulator-fixed"; regulator-name = "pcie30_avdd1v8"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; vin-supply = <&vcc3v3_sys>; }; vcc3v3_pcie: gpio-regulator { compatible = "regulator-fixed"; regulator-name = "vcc3v3_pcie"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; enable-active-high; regulator-boot-on; gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; startup-delay-us = <5000>; vin-supply = <&dc_12v>; }; vcc3v3_bu: vcc3v3-bu { compatible = "regulator-fixed"; regulator-name = "vcc3v3_bu"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vcc5v0_sys>; }; #if 0 vcc_camera: vcc-camera-regulator { compatible = "regulator-fixed"; gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&camera_pwr>; regulator-name = "vcc_camera"; enable-active-high; regulator-always-on; regulator-boot-on; }; #endif nk_io_init { compatible = "nk_io_control"; vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3 hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3 hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8 vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3 vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3 en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6 reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3 air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3 wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3 hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3 // spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3 wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8 // pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4 pinctrl-names = "default"; pinctrl-0 = <&nk_io_gpio>; }; panel: panel { compatible = "simple-panel"; backlight = <&backlight>; power-supply = <&vcc3v3_lcd0_n>; enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4 reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1 edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3 edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3 bus-format = ; bpc = <8>; prepare-delay-ms = <200>; enable-delay-ms = <20>; lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2 lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3 lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4 lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5 nodka-lvds = <15>; display-timings { native-mode = <&timing0>; timing0: timing0 { clock-frequency = <72500000>; hactive = <1280>; vactive = <800>; hfront-porch = <70>; hsync-len = <2>; hback-porch = <88>; vfront-porch = <7>; vsync-len = <4>; vback-porch = <17>; hsync-active = <21>; vsync-active = <0>; de-active = <0>; pixelclk-active = <0>; }; }; ports { panel_in: endpoint { remote-endpoint = <&edp_out>; }; }; }; }; &combphy0_us { status = "okay"; }; &combphy1_usq { status = "okay"; }; &combphy2_psq { status = "okay"; }; &csi2_dphy_hw { status = "disabled"; }; &csi2_dphy0 { status = "disabled"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; mipi_in_ucam0: endpoint@1 { reg = <1>; remote-endpoint = <&ucam_out0>; data-lanes = <1 2 3 4>; }; mipi_in_ucam1: endpoint@2 { reg = <2>; remote-endpoint = <&gc8034_out>; data-lanes = <1 2 3 4>; }; mipi_in_ucam2: endpoint@3 { reg = <3>; remote-endpoint = <&ov5695_out>; data-lanes = <1 2>; }; }; port@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; csidphy_out: endpoint@0 { reg = <0>; remote-endpoint = <&isp0_in>; }; }; }; }; /* * video_phy0 needs to be enabled * when dsi0 is enabled */ &video_phy0 { status = "disabled"; }; &dsi0 { status = "disabled"; }; &dsi0_in_vp0 { status = "disabled"; }; &dsi0_in_vp1 { status = "disabled"; }; &dsi0_panel { power-supply = <&vcc3v3_lcd0_n>; }; /* * video_phy1 needs to be enabled * when dsi1 is enabled */ &video_phy1 { status = "okay"; }; &dsi1 { status = "disabled"; }; &dsi1_in_vp0 { status = "disabled"; }; &dsi1_in_vp1 { status = "okay"; }; &dsi1_panel { power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3 vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3 reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7 vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3 pinctrl-names = "default"; pinctrl-0 = <&lcd1_rst_gpio>; }; &route_dsi1 { status = "disabled"; connect = <&vp1_out_dsi1>; }; /* * edp_start */ &edp { force-hpd; status = "okay"; ports { port@1 { reg = <1>; edp_out: endpoint { remote-endpoint = <&panel_in>; }; }; }; }; &edp_phy { status = "okay"; }; &edp_in_vp0 { status = "disabled"; }; &edp_in_vp1 { status = "okay"; }; &route_edp { status = "okay"; connect = <&vp1_out_edp>; }; &route_edp { status = "okay"; }; /* * edp_end */ /* * Hdmi_start */ &hdmi { status = "okay"; rockchip,phy-table = <92812500 0x8009 0x0000 0x0270>, <165000000 0x800b 0x0000 0x026d>, <185625000 0x800b 0x0000 0x01ed>, <297000000 0x800b 0x0000 0x01ad>, <594000000 0x8029 0x0000 0x0088>, <000000000 0x0000 0x0000 0x0000>; }; &route_hdmi { status = "okay"; connect = <&vp0_out_hdmi>; }; &hdmi_in_vp0 { status = "okay"; }; &hdmi_in_vp1 { status = "disabled"; }; &hdmi_sound { status = "okay"; }; /* * Hdmi_END */ &gmac0 { phy-mode = "rgmii"; clock_in_out = "output"; snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; snps,reset-active-low; /* Reset time is 20ms, 100ms for rtl8211f */ snps,reset-delays-us = <0 20000 100000>; assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; assigned-clock-rates = <0>, <125000000>; pinctrl-names = "default"; pinctrl-0 = <&gmac0_miim &gmac0_tx_bus2 &gmac0_rx_bus2 &gmac0_rgmii_clk &gmac0_rgmii_bus>; tx_delay = <0x3c>; rx_delay = <0x2f>; phy-handle = <&rgmii_phy0>; status = "disabled"; }; &gmac1 { phy-mode = "rgmii"; clock_in_out = "output"; snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; snps,reset-active-low; /* Reset time is 20ms, 100ms for rtl8211f */ snps,reset-delays-us = <0 20000 100000>; assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; assigned-clock-rates = <0>, <125000000>; pinctrl-names = "default"; pinctrl-0 = <&gmac1m1_miim &gmac1m1_tx_bus2 &gmac1m1_rx_bus2 &gmac1m1_rgmii_clk &gmac1m1_rgmii_bus>; tx_delay = <0x4f>; rx_delay = <0x26>; phy-handle = <&rgmii_phy1>; status = "okay"; }; /* * power-supply should switche to vcc3v3_lcd1_n * when mipi panel is connected to dsi1. */ >1x { power-supply = <&vcc3v3_lcd0_n>; }; &i2c3 { status = "okay"; //mac eeprom eeprom@51 { //compatible = "atmel,24c02"; compatible = "atmel,24c256"; reg = <0x51>; }; //nk-mcu nkmcu@15 { compatible = "nk_mcu"; reg = <0x15>; }; }; &i2c4 { status = "okay"; gc8034: gc8034@37 { compatible = "galaxycore,gc8034"; status = "okay"; reg = <0x37>; clocks = <&cru CLK_CIF_OUT>; clock-names = "xvclk"; pinctrl-names = "default"; pinctrl-0 = <&cif_clk>; reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>; rockchip,grf = <&grf>; power-domains = <&power RK3568_PD_VI>; rockchip,camera-module-index = <0>; rockchip,camera-module-facing = "back"; rockchip,camera-module-name = "RK-CMK-8M-2-v1"; rockchip,camera-module-lens-name = "CK8401"; port { gc8034_out: endpoint { remote-endpoint = <&mipi_in_ucam1>; data-lanes = <1 2 3 4>; }; }; }; os04a10: os04a10@36 { compatible = "ovti,os04a10"; reg = <0x36>; clocks = <&cru CLK_CIF_OUT>; clock-names = "xvclk"; power-domains = <&power RK3568_PD_VI>; pinctrl-names = "default"; pinctrl-0 = <&cif_clk>; reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; rockchip,camera-module-index = <0>; rockchip,camera-module-facing = "back"; rockchip,camera-module-name = "CMK-OT1607-FV1"; rockchip,camera-module-lens-name = "M12-40IRC-4MP-F16"; port { ucam_out0: endpoint { remote-endpoint = <&mipi_in_ucam0>; data-lanes = <1 2 3 4>; }; }; }; ov5695: ov5695@36 { status = "okay"; compatible = "ovti,ov5695"; reg = <0x36>; clocks = <&cru CLK_CIF_OUT>; clock-names = "xvclk"; power-domains = <&power RK3568_PD_VI>; pinctrl-names = "default"; pinctrl-0 = <&cif_clk>; reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>; pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; rockchip,camera-module-index = <0>; rockchip,camera-module-facing = "back"; rockchip,camera-module-name = "TongJu"; rockchip,camera-module-lens-name = "CHT842-MD"; port { ov5695_out: endpoint { remote-endpoint = <&mipi_in_ucam2>; data-lanes = <1 2>; }; }; }; }; &i2c5 { status = "okay"; hym8563: hym8563@51 { compatible = "haoyu,hym8563"; reg = <0x51>; #clock-cells = <0>; clock-frequency = <32768>; clock-output-names = "xin32k"; /* rtc_int is not connected */ }; }; &mdio0 { rgmii_phy0: phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0x0>; }; }; &mdio1 { rgmii_phy1: phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0x0>; }; }; &pcie30phy { status = "okay"; }; &pcie2x1 { reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_pcie>; status = "okay"; }; &pinctrl { // cam { // camera_pwr: camera-pwr { // rockchip,pins = // /* camera power en */ // <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; // }; // }; headphone { hp_det: hp-det { rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>, <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; }; }; wireless-wlan { wifi_host_wake_irq: wifi-host-wake-irq { rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; }; }; wireless-bluetooth { uart1_gpios: uart1-gpios { rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; }; }; lcd1 { lcd1_rst_gpio: lcd1-rst-gpio { rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; }; }; nk_io_init{ nk_io_gpio: nk-io-gpio{ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>, <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>, <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>, <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; &rkisp { status = "disabled"; }; &rkisp_mmu { status = "disabled"; }; &rkisp_vir0 { status = "disabled"; port { #address-cells = <1>; #size-cells = <0>; isp0_in: endpoint@0 { reg = <0>; remote-endpoint = <&csidphy_out>; }; }; }; &sata2 { status = "okay"; }; &sdmmc2 { status = "disabled"; }; &sdmmc1 { max-frequency = <150000000>; supports-sdio; bus-width = <4>; disable-wp; cap-sd-highspeed; cap-sdio-irq; keep-power-in-suspend; mmc-pwrseq = <&sdio_pwrseq>; non-removable; pinctrl-names = "default"; pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; sd-uhs-sdr104; status = "okay"; }; &spdif_8ch { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&spdifm1_tx>; }; &uart8 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>; }; &vcc3v3_lcd0_n { gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; enable-active-high; }; &vcc3v3_lcd1_n { gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3 enable-active-high; }; &wireless_wlan { pinctrl-names = "default"; pinctrl-0 = <&wifi_host_wake_irq>; WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; }; &wireless_bluetooth { compatible = "bluetooth-platdata"; clocks = <&rk809 1>; clock-names = "ext_clock"; //wifi-bt-power-toggle; uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; BT,power_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; pinctrl-names = "default", "rts_gpio"; pinctrl-0 = <&uart1m0_rtsn>; pinctrl-1 = <&uart1_gpios>; BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>; BT,wake_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>; BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; status = "disabled"; }; &uart0 { status = "okay"; }; &uart3 { status = "okay"; pinctrl-0 = <&uart3m1_xfer>; }; &uart4 { status = "okay"; pinctrl-0 = <&uart4m1_xfer>; }; &uart5 { status = "okay"; pinctrl-0 = <&uart5m1_xfer>; }; &uart7 { status = "okay"; pinctrl-0 = <&uart7m1_xfer>; }; &uart9 { status = "okay"; pinctrl-0 = <&uart9m1_xfer>; };