From 5a83b14855e763445ac36672c35ddb68300e4b42 Mon Sep 17 00:00:00 2001
From: ronnie <ronnie@industiosoft.com>
Date: Sun, 23 Oct 2022 09:58:57 +0000
Subject: [PATCH] add boot dts
---
longan/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/sun50iw10p1.dtsi | 152 ++++++++++++++++++++++-------
longan/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/sun50iw10p1-pinctrl.dtsi | 138 ++++++++++++++++++---------
2 files changed, 205 insertions(+), 85 deletions(-)
diff --git a/longan/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/sun50iw10p1-pinctrl.dtsi b/longan/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/sun50iw10p1-pinctrl.dtsi
index 5a09347..606a755 100644
--- a/longan/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/sun50iw10p1-pinctrl.dtsi
+++ b/longan/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/sun50iw10p1-pinctrl.dtsi
@@ -151,9 +151,10 @@
};
uart2_pins_a: uart2@0 {
- allwinner,pins = "PB0", "PB1", "PB2", "PB3";
- allwinner,pname = "uart2_tx", "uart2_rx",
- "uart2_rts", "uart2_cts";
+ //allwinner,pins = "PB0", "PB1", "PB2", "PB3";
+ allwinner,pins = "PB0", "PB1";
+ allwinner,pname = "uart2_tx", "uart2_rx";
+ // "uart2_rts", "uart2_cts";
allwinner,function = "uart2";
allwinner,muxsel = <2>;
allwinner,drive = <1>;
@@ -161,7 +162,8 @@
};
uart2_pins_b: uart2@1 {
- allwinner,pins = "PB0", "PB1", "PB2", "PB3";
+ //allwinner,pins = "PB0", "PB1", "PB2", "PB3";
+ allwinner,pins = "PB0", "PB1";
allwinner,function = "io_disabled";
allwinner,muxsel = <7>;
allwinner,drive = <1>;
@@ -169,9 +171,9 @@
};
uart3_pins_a: uart3@0 {
- allwinner,pins = "PH4", "PH5", "PH6", "PH7";
- allwinner,pname = "uart3_tx", "uart3_rx",
- "uart3_rts", "uart3_cts";
+ //allwinner,pins = "PH4", "PH5", "PH6", "PH7";
+ allwinner,pname = "uart3_tx", "uart3_rx";
+ //"uart3_rts", "uart3_cts";
allwinner,function = "uart3";
allwinner,muxsel = <2>;
allwinner,drive = <1>;
@@ -179,7 +181,8 @@
};
uart3_pins_b: uart3@1 {
- allwinner,pins = "PH4", "PH5", "PH6", "PH7";
+ //allwinner,pins = "PH4", "PH5", "PH6", "PH7";
+ //allwinner,pins = "PH4", "PH5";
allwinner,function = "io_disabled";
allwinner,muxsel = <7>;
allwinner,drive = <1>;
@@ -187,9 +190,9 @@
};
uart4_pins_a: uart4@0 {
- allwinner,pins = "PD18", "PD19", "PD20", "PD21";
- allwinner,pname = "uart4_tx", "uart4_rx",
- "uart4_rts", "uart4_cts";
+ //allwinner,pins = "PD18", "PD19", "PD20", "PD21";
+ allwinner,pname = "uart4_tx", "uart4_rx";
+ //"uart4_rts", "uart4_cts";
allwinner,function = "uart4";
allwinner,muxsel = <4>;
allwinner,drive = <1>;
@@ -197,7 +200,8 @@
};
uart4_pins_b: uart4@1 {
- allwinner,pins = "PD18", "PD19", "PD20", "PD21";
+ //allwinner,pins = "PD18", "PD19", "PD20", "PD21";
+ allwinner,pins = "PD18", "PD19";
allwinner,function = "io_disabled";
allwinner,muxsel = <7>;
allwinner,drive = <1>;
@@ -241,7 +245,7 @@
};
ir0_pins_a: ir0@0 {
- allwinner,pins = "PH3";
+ //allwinner,pins = "PH3";
allwinner,pname = "it-tx";
allwinner,function = "ir0";
allwinner,muxsel = <3>;
@@ -250,7 +254,7 @@
};
ir0_pins_b: ir0@1 {
- allwinner,pins = "PH3";
+ //allwinner,pins = "PH3";
allwinner,pname = "io_disabled";
allwinner,function = "io_disabled";
allwinner,muxsel = <7>;
@@ -259,16 +263,19 @@
};
twi0_pins_a: twi0@0 {
- allwinner,pins = "PB9", "PB10";
+ allwinner,pins = "PH0", "PH1";
+ //allwinner,pins = "PD22", "PD23";
allwinner,pname = "twi0_scl", "twi0_sda";
allwinner,function = "twi0";
- allwinner,muxsel = <3>;
+ //allwinner,muxsel = <3>;
+ allwinner,muxsel = <2>;
allwinner,drive = <1>;
allwinner,pull = <0>;
};
twi0_pins_b: twi0@1 {
- allwinner,pins = "PB9", "PB10";
+ allwinner,pins = "PH0", "PH1";
+ //allwinner,pins = "PD22", "PD23";
allwinner,function = "io_disabled";
allwinner,muxsel = <7>;
allwinner,drive = <1>;
@@ -391,11 +398,14 @@
allwinner,drive = <1>;
allwinner,pull = <0>;
};
-
+/*
spi0_pins_a: spi0@0 {
- allwinner,pins = "PC2", "PC4", "PC12", "PC15", "PC16";
+ //allwinner,pins = "PC2", "PC4", "PC12", "PC15", "PC16";
+ //allwinner,pname = "spi0_mosi", "spi0_miso",
+ // "spi0_sclk", "spi0_wp", "spi0_hold";
+ allwinner,pins = "PC2", "PC4", "PC12";
allwinner,pname = "spi0_mosi", "spi0_miso",
- "spi0_sclk", "spi0_wp", "spi0_hold";
+ "spi0_sclk";
allwinner,function = "spi0";
allwinner,muxsel = <4>;
allwinner,drive = <1>;
@@ -403,22 +413,23 @@
};
spi0_pins_b: spi0@1 {
- allwinner,pins = "PC3", "PC7";
- allwinner,pname = "spi0_cs0", "spi0_cs1";
+ allwinner,pins = "PC3";
+ allwinner,pname = "spi0_cs0";
allwinner,function = "spi0";
allwinner,muxsel = <4>;
allwinner,drive = <1>;
- allwinner,pull = <1>; /* only CS should be pulled up */
+ allwinner,pull = <1>;
};
spi0_pins_c: spi0@2 {
- allwinner,pins = "PC2", "PC3", "PC4", "PC7", "PC12", "PC15", "PC16";
+ //allwinner,pins = "PC2", "PC3", "PC4", "PC7", "PC12", "PC15", "PC16";
+ allwinner,pins = "PC2", "PC3", "PC4", "PC12";
allwinner,function = "io_disabled";
allwinner,muxsel = <7>;
allwinner,drive = <1>;
allwinner,pull = <0>;
};
-
+*/
spi1_pins_a: spi1@0 {
allwinner,pins = "PD11", "PD12", "PD13";
allwinner,pname = "spi1_sclk", "spi1_mosi",
@@ -447,11 +458,11 @@
};
spi2_pins_a: spi2@0 {
- allwinner,pins = "PB1", "PB2", "PB3";
+ //allwinner,pins = "PB1", "PB2", "PB3";
allwinner,pname = "spi2_sclk", "spi2_mosi",
"spi2_miso";
allwinner,function = "spi2";
- allwinner,muxsel = <3>;
+ //allwinner,muxsel = <3>;
allwinner,drive = <1>;
allwinner,pull = <0>;
};
@@ -466,7 +477,7 @@
};
spi2_pins_c: spi2@2 {
- allwinner,pins = "PB0", "PB1", "PB2", "PB3";
+ //allwinner,pins = "PB0", "PB1", "PB2", "PB3";
allwinner,function = "io_disabled";
allwinner,muxsel = <7>;
allwinner,drive = <1>;
@@ -613,7 +624,7 @@
};
daudio3_pins_a: daudio3@0 {
- allwinner,pins = "PH13", "PH14", "PH15", "PH16", "PH17", "PH18", "PH19";
+ //allwinner,pins = "PH13", "PH14", "PH15", "PH16", "PH17", "PH18", "PH19";
allwinner,function = "h_i2s3";
allwinner,muxsel = <4>;
allwinner,drive = <1>;
@@ -621,7 +632,7 @@
};
daudio3_pins_b: daudio3_sleep@0 {
- allwinner,pins = "PH13", "PH14", "PH15", "PH16", "PH17", "PH18", "PH19";
+ //allwinner,pins = "PH13", "PH14", "PH15", "PH16", "PH17", "PH18", "PH19";
allwinner,function = "io_disabled";
allwinner,muxsel = <7>;
allwinner,drive = <1>;
@@ -629,7 +640,7 @@
};
spdif_pins_a: spdif@0 {
- allwinner,pins = "PH6", "PH7";
+ //allwinner,pins = "PH6", "PH7";
allwinner,function = "spdif";
allwinner,muxsel = <4>;
allwinner,drive = <1>;
@@ -637,7 +648,7 @@
};
spdif_pins_b: spdif_sleep@0 {
- allwinner,pins = "PH6", "PH7";
+ //allwinner,pins = "PH6", "PH7";
allwinner,function = "io_disabled";
allwinner,muxsel = <7>;
allwinner,drive = <1>;
@@ -645,7 +656,8 @@
};
dmic_pins_a: dmic@0 {
- allwinner,pins = "PH8", "PH9", "PH10", "PH11", "PH12";
+ //allwinner,pins = "PH8", "PH9", "PH10", "PH11", "PH12";
+ allwinner,pins = "PH8", "PH11", "PH12";
allwinner,function = "dmic";
allwinner,muxsel = <2>;
allwinner,drive = <1>;
@@ -653,7 +665,8 @@
};
dmic_pins_b: dmic_sleep@0 {
- allwinner,pins = "PH8", "PH9", "PH10", "PH11", "PH12";
+ //allwinner,pins = "PH8", "PH9", "PH10", "PH11", "PH12";
+ allwinner,pins = "PH8", "PH11", "PH12";
allwinner,function = "io_disabled";
allwinner,muxsel = <7>;
allwinner,drive = <1>;
@@ -720,8 +733,8 @@
};
scr1_pins_a: scr1@0 {
- allwinner,pins = "PH5", "PH6", "PH2",
- "PH3", "PH4";
+ //allwinner,pins = "PH5", "PH6", "PH2",
+ // "PH3", "PH4";
allwinner,pname = "scr1_rst", "scr1_det",
"scr1_vccen", "scr1_sck",
"scr1_sda";
@@ -732,7 +745,7 @@
};
scr1_pins_b: scr1@1 {
- allwinner,pins = "PH0", "PH1";
+ //allwinner,pins = "PH0", "PH1";
allwinner,pname = "scr1_vppen", "scr1_vppp";
allwinner,function = "sim1";
allwinner,muxsel = <5>;
@@ -741,9 +754,9 @@
};
scr1_pins_c: scr1@2 {
- allwinner,pins = "PH0", "PH1", "PH2",
- "PH3", "PH4", "PH5",
- "PH6";
+ //allwinner,pins = "PH0", "PH1", "PH2",
+ // "PH3", "PH4", "PH5",
+ // "PH6";
allwinner,function = "io_disabled";
allwinner,muxsel = <7>;
allwinner,drive = <1>;
@@ -801,23 +814,29 @@
allwinner,drive = <1>;
allwinner,pull = <0>;
};
-
gmac_pins_a: gmac@0 {
+ //allwinner,pins = "PH0", "PH1", "PH2", "PH3",
+ // "PH4", "PH5", "PH6", "PH7",
+ // "PH9", "PH10", "PH13", "PH14",
+ // "PH15", "PH16", "PH17", "PH18";
allwinner,pins = "PH0", "PH1", "PH2", "PH3",
"PH4", "PH5", "PH6", "PH7",
- "PH9", "PH10", "PH13", "PH14",
- "PH15", "PH16", "PH17", "PH18";
+ "PH9", "PH10";
allwinner,function = "gmac0";
allwinner,muxsel = <5>;
allwinner,drive = <3>;
- allwinner,pull = <0>;
+ allwinner,pull = <0xffffffff>;
+ allwinner,data = <0xffffffff>;
};
gmac_pins_b: gmac@1 {
+ //allwinner,pins = "PH0", "PH1", "PH2", "PH3",
+ // "PH4", "PH5", "PH6", "PH7",
+ // "PH9", "PH10", "PH13", "PH14",
+ // "PH15", "PH16", "PH17", "PH18";
allwinner,pins = "PH0", "PH1", "PH2", "PH3",
"PH4", "PH5", "PH6", "PH7",
- "PH9", "PH10", "PH13", "PH14",
- "PH15", "PH16", "PH17", "PH18";
+ "PH9", "PH10";
allwinner,function = "io_disabled";
allwinner,muxsel = <7>;
allwinner,drive = <3>;
@@ -861,6 +880,7 @@
allwinner,drive = <1>;
allwinner,pull = <0>;
};
+
lvds0_pins_a: lvds0@0 {
allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7";
allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7";
@@ -962,6 +982,7 @@
allwinner,drive = <3>;
allwinner,pull = <0>;
};
+
lvds2link_pins_b: lvds2link@1 {
allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", \
"PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
@@ -1022,6 +1043,31 @@
allwinner,pull = <0>;
};
+ rgb16_pins_a: rgb16@0 {
+ allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \
+ "PD20", "PD21";
+ allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \
+ "PD20", "PD21";
+ allwinner,function = "rgb16";
+ allwinner,muxsel = <2>;
+ allwinner,drive = <3>;
+ allwinner,pull = <0>;
+ };
+ rgb16_pins_b: rgb16@1 {
+ allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \
+ "PD20", "PD21";
+ allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \
+ "PD20", "PD21";
+ allwinner,function = "rgb16_suspend";
+ allwinner,muxsel = <7>;
+ allwinner,drive = <1>;
+ allwinner,pull = <0>;
+ };
+
eink_pins_a: eink@0 {
allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \
"PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \
diff --git a/longan/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/sun50iw10p1.dtsi b/longan/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/sun50iw10p1.dtsi
index bd14ca6..14aaa41 100644
--- a/longan/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/sun50iw10p1.dtsi
+++ b/longan/kernel/linux-4.9/arch/arm64/boot/dts/sunxi/sun50iw10p1.dtsi
@@ -12,6 +12,11 @@
#include "sun50iw10p1-clk.dtsi"
#include "sun50iw10p1-pinctrl.dtsi"
#include <dt-bindings/thermal/thermal.h>
+
+#define V1A 0
+#define V1B 1
+
+
/ {
model = "sun50iw10";
compatible = "arm,sun50iw10p1";
@@ -178,28 +183,39 @@
cpu_opp_l_table: opp_l_table {
compatible = "allwinner,sun50i-operating-points";
- nvmem-cells = <&speedbin_efuse>, <&cpubin_efuse>;
- nvmem-cell-names = "speed", "bin";
+ nvmem-cells = <&speedbin_efuse>, <&cpubin_efuse>, <&cpubin_extend>;
+ nvmem-cell-names = "speed", "bin", "bin_ext";
opp-shared;
- opp@408000000 {
+ opp@408000000-0 {
opp-hz = /bits/ 64 <408000000>;
clock-latency-ns = <244144>; /* 8 32k periods */
opp-microvolt-a0 = <900000>;
opp-microvolt-a1 = <900000>;
opp-microvolt-a2 = <900000>;
+ opp-microvolt-a3 = <940000>;
+ opp-microvolt-a4 = <940000>;
+ opp-microvolt-a5 = <920000>;
+ opp-microvolt-a6 = <920000>;
opp-microvolt-b0 = <900000>;
opp-microvolt-b1 = <900000>;
+ opp-microvolt-b2 = <940000>;
+ opp-microvolt-b3 = <920000>;
};
-
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
clock-latency-ns = <244144>; /* 8 32k periods */
opp-microvolt-a0 = <900000>;
opp-microvolt-a1 = <900000>;
opp-microvolt-a2 = <900000>;
+ opp-microvolt-a3 = <940000>;
+ opp-microvolt-a4 = <940000>;
+ opp-microvolt-a5 = <920000>;
+ opp-microvolt-a6 = <920000>;
opp-microvolt-b0 = <900000>;
opp-microvolt-b1 = <900000>;
+ opp-microvolt-b2 = <940000>;
+ opp-microvolt-b3 = <920000>;
};
opp@816000000 {
@@ -208,8 +224,14 @@
opp-microvolt-a0 = <940000>;
opp-microvolt-a1 = <900000>;
opp-microvolt-a2 = <900000>;
+ opp-microvolt-a3 = <940000>;
+ opp-microvolt-a4 = <940000>;
+ opp-microvolt-a5 = <920000>;
+ opp-microvolt-a6 = <920000>;
opp-microvolt-b0 = <900000>;
opp-microvolt-b1 = <900000>;
+ opp-microvolt-b2 = <940000>;
+ opp-microvolt-b3 = <920000>;
};
opp@1008000000 {
@@ -218,8 +240,14 @@
opp-microvolt-a0 = <1020000>;
opp-microvolt-a1 = <980000>;
opp-microvolt-a2 = <950000>;
+ opp-microvolt-a3 = <1020000>;
+ opp-microvolt-a4 = <960000>;
+ opp-microvolt-a5 = <940000>;
+ opp-microvolt-a6 = <940000>;
opp-microvolt-b0 = <980000>;
opp-microvolt-b1 = <950000>;
+ opp-microvolt-b2 = <960000>;
+ opp-microvolt-b3 = <940000>;
};
opp@1200000000 {
@@ -228,8 +256,14 @@
opp-microvolt-a0 = <1100000>;
opp-microvolt-a1 = <1020000>;
opp-microvolt-a2 = <1000000>;
+ opp-microvolt-a3 = <1100000>;
+ opp-microvolt-a4 = <980000>;
+ opp-microvolt-a5 = <960000>;
+ opp-microvolt-a6 = <960000>;
opp-microvolt-b0 = <1020000>;
opp-microvolt-b1 = <1000000>;
+ opp-microvolt-b2 = <980000>;
+ opp-microvolt-b3 = <960000>;
};
opp@1320000000 {
@@ -238,23 +272,38 @@
opp-microvolt-a0 = <1160000>;
opp-microvolt-a1 = <1060000>;
opp-microvolt-a2 = <1030000>;
+ opp-microvolt-a3 = <1160000>;
+ opp-microvolt-a4 = <1020000>;
+ opp-microvolt-a5 = <1000000>;
+ opp-microvolt-a6 = <1000000>;
opp-microvolt-b0 = <1060000>;
opp-microvolt-b1 = <1030000>;
+ opp-microvolt-b2 = <1020000>;
+ opp-microvolt-b3 = <1000000>;
};
opp@1416000000 {
opp-hz = /bits/ 64 <1416000000>;
clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-microvolt-a0 = <1180000>;
+ opp-microvolt-a1 = <1180000>;
+ opp-microvolt-a2 = <1130000>;
opp-microvolt-b0 = <1100000>;
opp-microvolt-b1 = <1070000>;
+ opp-microvolt-b2 = <1060000>;
+ opp-microvolt-b3 = <1040000>;
};
opp@1464000000 {
opp-hz = /bits/ 64 <1464000000>;
- clock-latency-ns = <244144>; /* 8 32k periods */
+ clock-latency-ns = <244144>;
opp-microvolt-a0 = <1180000>;
opp-microvolt-a1 = <1180000>;
opp-microvolt-a2 = <1130000>;
+ opp-microvolt-a3 = <1180000>;
+ opp-microvolt-a4 = <1100000>;
+ opp-microvolt-a5 = <1080000>;
+ opp-microvolt-a6 = <1080000>;
};
opp@1512000000 {
@@ -262,14 +311,15 @@
clock-latency-ns = <244144>; /* 8 32k periods */
opp-microvolt-b0 = <1180000>;
opp-microvolt-b1 = <1130000 1130000 1140000>;
+ opp-microvolt-b2 = <1100000>;
+ opp-microvolt-b3 = <1080000>;
};
-
opp@1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-hz = /bits/ 64 <1608000000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
opp-microvolt-b0 = <1180000>;
opp-microvolt-b1 = <1130000 1130000 1140000>;
- };
+ };
};
psci {
@@ -438,6 +488,9 @@
cpubin_efuse: calib@1c {
reg = <0x1c 2>;
};
+ cpubin_extend: calib@28 {
+ reg = <0x28 4>;
+ };
};
chipid: sunxi-chipid@03006200 {
@@ -603,7 +656,7 @@
pinctrl-names = "default";
pinctrl-0 = <&s_cir0_pins_a>;
clocks = <&clk_hosc>,<&clk_cpurcir>;
- status = "okay";
+ status = "disabled";
};
ir1: ir@0x05071000 {
@@ -701,7 +754,7 @@
pinctrl-1 = <&uart2_pins_b>;
uart2_port = <2>;
uart2_type = <4>;
- status = "disabled";
+ status = "okay";
};
uart3: uart@05000c00 {
@@ -813,7 +866,7 @@
pinctrl-names = "default", "sleep";
pinctrl-0 = <&twi0_pins_a>;
pinctrl-1 = <&twi0_pins_b>;
- status = "disabled";
+ status = "okay";
};
twi1: twi@0x05002400{
@@ -843,7 +896,7 @@
pinctrl-names = "default", "sleep";
pinctrl-0 = <&twi2_pins_a>;
pinctrl-1 = <&twi2_pins_b>;
- status = "disabled";
+ status = "ok";
};
twi3: twi@0x05002c00{
@@ -858,7 +911,7 @@
pinctrl-names = "default", "sleep";
pinctrl-0 = <&twi3_pins_a>;
pinctrl-1 = <&twi3_pins_b>;
- status = "disabled";
+ status = "ok";
};
twi4: twi@0x05003000{
@@ -1001,9 +1054,9 @@
compatible = "allwinner,sunxi-codec-machine";
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
sunxi,audio-codec = <&codec>;
- hp_detect_case = <0x00>;
+ hp_detect_case = <0x01>;
device_type = "sndcodec";
- status = "disabled";
+ status = "okay";
};
spdif:spdif-controller@0x05094000{
@@ -1032,14 +1085,14 @@
pinctrl-0 = <&dmic_pins_a>;
pinctrl-1 = <&dmic_pins_b>;
device_type = "dmic";
- status = "disabled";
+ status = "okay";
};
snddmic:sound@2{
compatible = "allwinner,sunxi-dmic-machine";
sunxi,dmic-controller = <&dmic>;
device_type = "snddmic";
- status = "disabled";
+ status = "okay";
};
@@ -1118,7 +1171,7 @@
device_type = "snddaudio3";
status = "disabled";
};
-
+/*
spi0: spi@05010000 {
#address-cells = <1>;
#size-cells = <0>;
@@ -1135,7 +1188,7 @@
spi0_cs_bitmap = <1>;
status = "disabled";
};
-
+*/
spi1: spi@05011000 {
#address-cells = <1>;
#size-cells = <0>;
@@ -1457,7 +1510,7 @@
<&clk_lvds>,
<&clk_lvds1>,
<&clk_mipi_host>;
- boot_disp = <0>;
+ boot_disp = <1>;
boot_disp1 = <0>;
boot_disp2 = <0>;
fb_base = <0>;
@@ -1768,9 +1821,9 @@
sensor0:sensor@0 {
device_type = "sensor0";
compatible = "allwinner,sunxi-sensor";
- sensor0_mname = "ov5640";
+ sensor0_mname = "ov8858_r2a_4lane";
sensor0_twi_cci_id = <2>;
- sensor0_twi_addr = <0x78>;
+ sensor0_twi_addr = <0x6C>;
sensor0_mclk_id = <0>;
sensor0_pos = "rear";
sensor0_isp_used = <0>;
@@ -1779,14 +1832,14 @@
sensor0_vflip = <0>;
sensor0_hflip = <0>;
sensor0_iovdd-supply = <>;
- sensor0_iovdd_vol = <2800000>;
+ sensor0_iovdd_vol = <1800000>;
sensor0_avdd-supply = <>;
sensor0_avdd_vol = <2800000>;
sensor0_dvdd-supply = <>;
- sensor0_dvdd_vol = <1500000>;
+ sensor0_dvdd_vol = <1200000>;
sensor0_power_en = <>;
- sensor0_reset = <&pio PE 14 1 0 1 0>;
- sensor0_pwdn = <&pio PE 16 1 0 1 0>;
+ sensor0_reset = <&pio PE 6 1 0 1 0>;
+ sensor0_pwdn = <&pio PE 7 1 0 1 0>;
sensor0_sm_vs = <>;
flash_handle = <&flash0>;
act_handle = <&actuator0>;
@@ -1796,7 +1849,7 @@
sensor1:sensor@1 {
device_type = "sensor1";
compatible = "allwinner,sunxi-sensor";
- sensor1_mname = "ov5647";
+ sensor1_mname = "ov5648_mipi";
sensor1_twi_cci_id = <3>;
sensor1_twi_addr = <0x6c>;
sensor1_mclk_id = <1>;
@@ -1813,8 +1866,8 @@
sensor1_dvdd-supply = <>;
sensor1_dvdd_vol = <1500000>;
sensor1_power_en = <>;
- sensor1_reset = <&pio PE 14 1 0 1 0>;
- sensor1_pwdn = <&pio PE 15 1 0 1 0>;
+ sensor1_reset = <&pio PE 8 1 0 1 0>;
+ sensor1_pwdn = <&pio PE 9 1 0 1 0>;
sensor1_sm_vs = <>;
flash_handle = <>;
act_handle = <>;
@@ -2032,7 +2085,17 @@
key3 = <750 28>;
key4 = <880 102>;
};
-
+/*
+ gpio-keys {
+ compatible = "gpio-keys";
+ status = "okay";
+ power {
+ gpios = <&pio PB 2 0 0xffffffff 0xffffffff 0>;
+ label = "KEY1";
+ linux,code = <100>;
+ };
+ };
+*/
gmac0: eth@05020000 {
compatible = "allwinner,sunxi-gmac";
reg = <0x0 0x05020000 0x0 0x10000>,
@@ -2045,14 +2108,25 @@
pinctrl-0 = <&gmac_pins_a>;
pinctrl-1 = <&gmac_pins_b>;
pinctrl-names = "default", "sleep";
- phy-mode;
+ //phy-mode;
+ phy-mode = "rmii";
tx-delay = <7>;
- rx-delay = <31>;
- phy-rst;
- gmac-power0;
- gmac-power1;
- gmac-power2;
- status = "disable";
+ rx-delay = <10>;
+ //phy-rst;
+ #if V1A
+ phy-rst = <&pio PH 12 1 0 1 0>;
+ #elif V1B
+ phy-rst = <&pio PB 7 1 0 1 0>;
+ #endif
+ gmac-power0 = <®_aldo3>;
+ gmac-power1 = <®_fldo1>;
+ gmac-power2 = <®_eldo2>;
+
+ gmac-power0-vol = <3300000>;
+ gmac-power1-vol = <1200000>;
+ gmac-power2-vol = <1800000>;
+
+ status = "okay";
};
gmac1: eth@05030000 {
@@ -2074,7 +2148,7 @@
gmac-power0;
gmac-power1;
gmac-power2;
- status = "disable";
+ status = "disabled";
};
};
--
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