From 2f529f9b558ca1c1bd74be7437a84e4711743404 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 01 Nov 2024 02:11:33 +0000
Subject: [PATCH] add xenomai
---
kernel/include/linux/dmaengine.h | 41 +++++++++++++++++++++++++++++++++++++++++
1 files changed, 41 insertions(+), 0 deletions(-)
diff --git a/kernel/include/linux/dmaengine.h b/kernel/include/linux/dmaengine.h
index 08537ef..e8bc400 100644
--- a/kernel/include/linux/dmaengine.h
+++ b/kernel/include/linux/dmaengine.h
@@ -62,6 +62,7 @@
DMA_ASYNC_TX,
DMA_SLAVE,
DMA_CYCLIC,
+ DMA_OOB,
DMA_INTERLEAVE,
DMA_COMPLETION_NO_ORDER,
DMA_REPEAT,
@@ -191,6 +192,13 @@
* transaction is marked with DMA_PREP_REPEAT will cause the new transaction
* to never be processed and stay in the issued queue forever. The flag is
* ignored if the previous transaction is not a repeated transaction.
+ * @DMA_OOB_INTERRUPT - if DMA_OOB is supported, handle the completion
+ * interrupt for this transaction from the out-of-band stage (implies
+ * DMA_PREP_INTERRUPT). This includes calling the completion callback routine
+ * from such context if defined for the transaction.
+ * @DMA_OOB_PULSE - if DMA_OOB is supported, (slave) transactions on the
+ * out-of-band channel should be triggered manually by a call to
+ * dma_pulse_oob() (implies DMA_OOB_INTERRUPT).
*/
enum dma_ctrl_flags {
DMA_PREP_INTERRUPT = (1 << 0),
@@ -203,6 +211,8 @@
DMA_PREP_CMD = (1 << 7),
DMA_PREP_REPEAT = (1 << 8),
DMA_PREP_LOAD_EOT = (1 << 9),
+ DMA_OOB_INTERRUPT = (1 << 10),
+ DMA_OOB_PULSE = (1 << 11),
};
/**
@@ -940,6 +950,7 @@
dma_cookie_t cookie,
struct dma_tx_state *txstate);
void (*device_issue_pending)(struct dma_chan *chan);
+ int (*device_pulse_oob)(struct dma_chan *chan);
void (*device_release)(struct dma_device *dev);
/* debugfs support */
#ifdef CONFIG_DEBUG_FS
@@ -983,11 +994,22 @@
dir, flags, NULL);
}
+static inline bool dmaengine_oob_valid(struct dma_chan *chan,
+ unsigned long flags)
+{
+ return !(dovetailing() &&
+ flags & (DMA_OOB_INTERRUPT|DMA_OOB_PULSE) &&
+ !test_bit(DMA_OOB, chan->device->cap_mask.bits));
+}
+
static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_sg(
struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
enum dma_transfer_direction dir, unsigned long flags)
{
if (!chan || !chan->device || !chan->device->device_prep_slave_sg)
+ return NULL;
+
+ if (!dmaengine_oob_valid(chan, flags))
return NULL;
return chan->device->device_prep_slave_sg(chan, sgl, sg_len,
@@ -1015,6 +1037,9 @@
unsigned long flags)
{
if (!chan || !chan->device || !chan->device->device_prep_dma_cyclic)
+ return NULL;
+
+ if (!dmaengine_oob_valid(chan, flags))
return NULL;
return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len,
@@ -1422,6 +1447,22 @@
}
/**
+ * dma_pulse_oob - manual trigger of an out-of-band transaction
+ * @chan: target DMA channel
+ *
+ * Trigger the next out-of-band transaction immediately.
+ */
+static inline int dma_pulse_oob(struct dma_chan *chan)
+{
+ int ret = -ENOTSUPP;
+
+ if (chan->device->device_pulse_oob)
+ ret = chan->device->device_pulse_oob(chan);
+
+ return ret;
+}
+
+/**
* dma_async_is_tx_complete - poll for transaction completion
* @chan: DMA channel
* @cookie: transaction identifier to check status of
--
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