From 2f529f9b558ca1c1bd74be7437a84e4711743404 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 01 Nov 2024 02:11:33 +0000
Subject: [PATCH] add xenomai
---
kernel/arch/arm64/include/asm/irqflags.h | 46 ++++++++++++++++++++++++++++++----------------
1 files changed, 30 insertions(+), 16 deletions(-)
diff --git a/kernel/arch/arm64/include/asm/irqflags.h b/kernel/arch/arm64/include/asm/irqflags.h
index ff328e5..177c7e7 100644
--- a/kernel/arch/arm64/include/asm/irqflags.h
+++ b/kernel/arch/arm64/include/asm/irqflags.h
@@ -10,6 +10,10 @@
#include <asm/ptrace.h>
#include <asm/sysreg.h>
+#define IRQMASK_I_BIT PSR_I_BIT
+#define IRQMASK_I_POS 7
+#define IRQMASK_i_POS 31
+
/*
* Aarch64 has flags for masking: Debug, Asynchronous (serror), Interrupts and
* FIQ exceptions, in the 'daif' register. We mask and unmask them in 'dai'
@@ -26,7 +30,7 @@
/*
* CPU interrupt mask handling.
*/
-static inline void arch_local_irq_enable(void)
+static inline void native_irq_enable(void)
{
if (system_has_prio_mask_debugging()) {
u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
@@ -35,7 +39,7 @@
}
asm volatile(ALTERNATIVE(
- "msr daifclr, #2 // arch_local_irq_enable",
+ "msr daifclr, #2 // native_irq_enable",
__msr_s(SYS_ICC_PMR_EL1, "%0"),
ARM64_HAS_IRQ_PRIO_MASKING)
:
@@ -45,7 +49,7 @@
pmr_sync();
}
-static inline void arch_local_irq_disable(void)
+static inline void native_irq_disable(void)
{
if (system_has_prio_mask_debugging()) {
u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
@@ -54,7 +58,7 @@
}
asm volatile(ALTERNATIVE(
- "msr daifset, #2 // arch_local_irq_disable",
+ "msr daifset, #2 // native_irq_disable",
__msr_s(SYS_ICC_PMR_EL1, "%0"),
ARM64_HAS_IRQ_PRIO_MASKING)
:
@@ -62,10 +66,17 @@
: "memory");
}
+static inline void native_irq_sync(void)
+{
+ native_irq_enable();
+ isb();
+ native_irq_disable();
+}
+
/*
* Save the current interrupt enable state.
*/
-static inline unsigned long arch_local_save_flags(void)
+static inline unsigned long native_save_flags(void)
{
unsigned long flags;
@@ -80,7 +91,7 @@
return flags;
}
-static inline int arch_irqs_disabled_flags(unsigned long flags)
+static inline int native_irqs_disabled_flags(unsigned long flags)
{
int res;
@@ -95,23 +106,18 @@
return res;
}
-static inline int arch_irqs_disabled(void)
-{
- return arch_irqs_disabled_flags(arch_local_save_flags());
-}
-
-static inline unsigned long arch_local_irq_save(void)
+static inline unsigned long native_irq_save(void)
{
unsigned long flags;
- flags = arch_local_save_flags();
+ flags = native_save_flags();
/*
* There are too many states with IRQs disabled, just keep the current
* state if interrupts are already disabled/masked.
*/
- if (!arch_irqs_disabled_flags(flags))
- arch_local_irq_disable();
+ if (!native_irqs_disabled_flags(flags))
+ native_irq_disable();
return flags;
}
@@ -119,7 +125,7 @@
/*
* restore saved IRQ state
*/
-static inline void arch_local_irq_restore(unsigned long flags)
+static inline void native_irq_restore(unsigned long flags)
{
asm volatile(ALTERNATIVE(
"msr daif, %0",
@@ -132,4 +138,12 @@
pmr_sync();
}
+static inline bool native_irqs_disabled(void)
+{
+ unsigned long flags = native_save_flags();
+ return native_irqs_disabled_flags(flags);
+}
+
+#include <asm/irq_pipeline.h>
+
#endif /* __ASM_IRQFLAGS_H */
--
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