From 2f529f9b558ca1c1bd74be7437a84e4711743404 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 01 Nov 2024 02:11:33 +0000
Subject: [PATCH] add xenomai
---
kernel/arch/arm64/boot/dts/rockchip/NK-6A13_V0A.dtsi | 256 ++++++++++++++++++++++-----------------------------
1 files changed, 110 insertions(+), 146 deletions(-)
diff --git a/kernel/arch/arm64/boot/dts/rockchip/NK-6A13_V0A.dtsi b/kernel/arch/arm64/boot/dts/rockchip/NK-6A13_V0A.dtsi
index a4bfda9..fc812b5 100755
--- a/kernel/arch/arm64/boot/dts/rockchip/NK-6A13_V0A.dtsi
+++ b/kernel/arch/arm64/boot/dts/rockchip/NK-6A13_V0A.dtsi
@@ -27,7 +27,7 @@
};
es8316_sound: es8316-sound {
- status = "okay";
+ status = "disabled";
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip-es8316";
rockchip,format = "i2s";
@@ -128,14 +128,14 @@
* - PDN (power down when low)
*/
post-power-on-delay-ms = <200>;
- reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; //WIFI_REG_ON_H
+ reset-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; //BT_DISABLE_GPIO1_C6_d_1V8
};
rk_headset: rk-headset {
status = "okay";
compatible = "rockchip_headset";
- headset_gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
- spk_ctl_gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>;
+ headset_gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;//HP_DET_L_GPIO3_D5_d_3V3
+ spk_ctl_gpio = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;//SPK_CTL_GPIO4_B4_u_3V3
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
io-channels = <&saradc 3>;
@@ -159,20 +159,9 @@
regulator-boot-on;
enable-active-high;
//gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
- gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc_1v8_s0>;
};
-
- vcc3v3_lcd1_n: vcc3v3-lcd1-n {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_lcd1_n";
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- enable-active-high;
- gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
- };
-
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
@@ -228,9 +217,9 @@
*/
vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
compatible = "regulator-fixed";
- gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&sd_s0_pwr>;
+ //gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+ //pinctrl-names = "default";
+ //pinctrl-0 = <&sd_s0_pwr>;
regulator-name = "vcc_3v3_sd_s0";
enable-active-high;
};
@@ -241,80 +230,38 @@
clock-names = "ext_clock";
uart_rts_gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; //UART9_RTSn_M0_BT
pinctrl-names = "default", "rts_gpio";
- pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>;
+ pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>;
pinctrl-1 = <&uart9_gpios>;
- BT,reset_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; //BT_REG_ON_H
- BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
- BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
- status = "okay";
+ BT,reset_gpio = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //BT_DISABLE_GPIO0_B2_u_1V8
+ //BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;//HOST_WAKE_BT_H
+ //BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;//BT_WAKE_HOST_H
+ status = "disabled";
};
wireless_wlan: wireless-wlan {
compatible = "wlan-platdata";
wifi_chip_type = "ap6398s";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_host_wake_irq>;
- WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; //WIFI_WAKE_HOST_H
+ // pinctrl-names = "default";
+ // pinctrl-0 = <&wifi_host_wake_irq>;
+ // WIFI,host_wake_irq = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; //GPIO2_B5_u_1V8_WF-BT_WAKEUP_IN
// WIFI,poweren_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
- status = "okay";
+ status = "disabled";
};
ndj_io_init {
compatible = "nk_io_control";
pinctrl-names = "default";
pinctrl-0 = <&ndj_io_gpio>;
-
-// vcc_5v {
-// gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
-// gpio_function = <0>;
-// };
-
- vcc_12v {
- gpio_num = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
- gpio_function = <0>;
- };
-
- vcc_3v {
- gpio_num = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
- gpio_function = <0>;
- };
+
+
hub_5V_reset {
- gpio_num = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
+ gpio_num = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
- };
+ };//HUB_RESET_GPIO4_B6_d_3V3
- 4g_power {
- gpio_num = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
- gpio_function = <0>;
- };
- wake_4g {
- gpio_num = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
- gpio_function = <0>;
- };
- air_mode_4g {
- gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
- gpio_function = <0>;
- };
-
- reset_4g {
- gpio_num = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
- gpio_function = <3>;
- };
-/*
- spk_ctl {
- gpio_num = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>;
- gpio_function = <0>;
- };
-
- hp_det
- {
- gpio_num = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
- gpio_function = <1>;
- };
-*/
};
@@ -322,11 +269,11 @@
compatible = "simple-panel";
backlight = <&backlight>;
power-supply = <&vcc3v3_lcd_n>;
- vcc-5v-gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
- enable-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //LCD_VDD_EN
- reset-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>; //CH7511_RESET_N_1V8
- edp-bl-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //LCD_BLK-PWR_EN
- edp-bl-en = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD_BKL_EN_GPIO3_D4_d_3V3
+ vcc-5v-gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO4_B5_d_3V3
+ enable-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //LCD_VDD_EN_GPIO3_C6_u_3V3
+ reset-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; //CH7511_RESET_N_1V8
+ edp-bl-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; //LCD_BKL_PWM3_3V3
+ edp-bl-en = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; //LCD_BKL_EN_GPIO3_A6_d_3V3
bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
bpc = <8>;
prepare-delay-ms = <200>;
@@ -393,13 +340,13 @@
};
&backlight {
- pwms = <&pwm10 0 25000 0>;
+ pwms = <&pwm3 0 25000 0>;
status = "okay";
};
&backlight1 {
pwms = <&pwm11 0 25000 0>;
- status = "okay";
+ status = "disabled";
};
&combphy0_ps {
@@ -448,11 +395,11 @@
* when dsi0 is enabled
*/
&mipi_dcphy0 {
- status = "okay";
+ status = "disabled";
};
&dsi0 {
- status = "okay";
+ status = "disabled";
};
&dsi0_in_vp2 {
@@ -460,16 +407,7 @@
};
&dsi0_in_vp3 {
- status = "okay";
-};
-
-&dsi0_panel {
- power-supply = <&vcc3v3_lcd1_n>; //LCD_PWREN_H
- vcc-5v-gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
- reset-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>; //MIPIDIS_RST_GPIO1_A0_d_1V8
- vddio-mipi = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //MIPIDIS_PWR_EN_1V8
- pinctrl-names = "default";
- pinctrl-0 = <&lcd_rst_gpio>;
+ status = "disabled";
};
/*
@@ -502,6 +440,31 @@
//pinctrl-0 = <&lcd_rst_gpio>;
};
+&gmac0 {
+ /* Use rgmii-rxid mode to disable rx delay inside Soc */
+ phy-mode = "rgmii-rxid";
+ clock_in_out = "output";
+
+ snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ /* Reset time is 20ms, 100ms for rtl8211f */
+ snps,reset-delays-us = <0 20000 100000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac0_miim
+ &gmac0_tx_bus2
+ &gmac0_rx_bus2
+ &gmac0_rgmii_clk
+ &gmac0_rgmii_bus
+ ð0_pins
+ &gmac0_clkinout>;
+ tx_delay = <0x44>;
+ /* rx_delay = <0x4f>; */
+
+ phy-handle = <&rgmii_phy0>;
+ status = "okay";
+};
+
&gmac1 {
/* Use rgmii-rxid mode to disable rx delay inside Soc */
phy-mode = "rgmii-rxid";
@@ -522,8 +485,8 @@
tx_delay = <0x43>;
/* rx_delay = <0x3f>; */
- phy-handle = <&rgmii_phy>;
- status = "disabled";
+ phy-handle = <&rgmii_phy1>;
+ status = "okay";
};
&hdmi0 {
@@ -559,7 +522,7 @@
#sound-dai-cells = <1>;
/* Effective level used to trigger HPD: 0-low, 1-high */
hpd-trigger-level = <1>;
- hdmirx-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
+ hdmirx-det-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hdmim1_rx &hdmirx_det>;
};
@@ -854,12 +817,18 @@
};
&mdio1 {
- rgmii_phy: phy@1 {
+ rgmii_phy1: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
};
};
+&mdio0 {
+ rgmii_phy0: phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ };
+};
&mipi_dcphy1 {
@@ -868,21 +837,21 @@
&pcie2x1l2 {
phys = <&combphy0_ps PHY_TYPE_PCIE>;
- reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;//PCIE20x1_2_RSTn_GPIO3_D0_3V3
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};//MINIPCIE
&pcie2x1l1 {
phys = <&combphy2_psu PHY_TYPE_PCIE>;
- reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;//PCIEX1_1_PERSTn_M1_L
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};//M.2 WIFI6
&pcie2x1l0 {
phys = <&combphy1_ps PHY_TYPE_PCIE>;
- reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; //PCIEx1_0_PERSTn_M1_L
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};//RTL8111H
@@ -927,17 +896,17 @@
hdmi {
hdmirx_det: hdmirx-det {
- rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
headphone {
hp_det: hp-det {
- rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
spk_con: spk-con {
- rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@@ -961,16 +930,16 @@
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
- rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
-
+/*
sdmmc {
sd_s0_pwr: sd-s0-pwr {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
-
+*/
touch {
touch_gpio: touch-gpio {
rockchip,pins =
@@ -992,55 +961,32 @@
};
bt_reset_gpio: bt-reset-gpio {
- rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_wake_gpio: bt-wake-gpio {
- rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- bt_irq_gpio: bt-irq-gpio {
- rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
-
+/*
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
- rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
-
+*/
ndj_io_init{
ndj_io_gpio: ndj_io_gpio_col{
rockchip,pins =
- <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
- <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,
- <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,
- <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,
- <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
- <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>,
- <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,
- <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, //vcc_5v
- <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO4_B5_d_3V3
- <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO4_B6_d_3V3
- <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO3_B0_u_3V3
- <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO3_B2_d_3V3
- <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO3_B3_u_3V3
- <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO3_B4_u_3V3
- <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, //GPIO3_A7_u_3V3
- <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; //GPIO3_A0_u_3V3
-
+
+ <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; //SPI4_CS0_M2_1V8 35
};
};
};
&pwm3 {
- pinctrl-0 = <&pwm3m1_pins>;
status = "okay";
+ pinctrl-0 = <&pwm3m1_pins>;
};
&route_dsi0 {
- status = "okay";
+ status = "disabled";
connect = <&vp3_out_dsi0>;
};
@@ -1050,12 +996,12 @@
};
&pwm10 {
- status = "okay";
+ status = "disabled";
pinctrl-0 = <&pwm10m2_pins>;
};
&pwm11 {
- status = "okay";
+ status = "disabled";
pinctrl-0 = <&pwm11m3_pins>;
};
@@ -1069,6 +1015,10 @@
&sata0 {
status = "disabled";
+};
+
+&sata2 {
+ status = "okay";
};
&sdio {
@@ -1085,7 +1035,7 @@
pinctrl-names = "default";
pinctrl-0 = <&sdiom0_pins>;
sd-uhs-sdr104;
- status = "okay";
+ status = "disabled";
};
&sdmmc {
@@ -1145,21 +1095,21 @@
#endif
&uart1 {
- status = "okay";
+ status = "disabled";
// dma-names = "tx", "rx"; //ʹ��dma����ģʽ
pinctrl-names = "default";
pinctrl-0 = <&uart1m0_xfer>;
};
&uart3 {
- status = "okay";
+ status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
- status = "okay";
+ status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart4m0_xfer>;
};
@@ -1177,20 +1127,34 @@
};
&uart7 {
- status = "okay";
+ status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
};
&uart8 {
- status = "okay";
+ status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart8m1_xfer>;
};
&uart9 {
- status = "okay";
+ status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>;
};
+
+
+&can0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&can0m0_pins>;
+};
+
+
+&can1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&can1m1_pins>;
+};
\ No newline at end of file
--
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