From e3e12f52b214121840b44c91de5b3e5af5d3eb84 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Mon, 06 Nov 2023 03:04:41 +0000
Subject: [PATCH] rk3568 rt init
---
kernel/drivers/net/ethernet/stmicro/stmmac/mmc_core.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/mmc_core.c b/kernel/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
index e9b04c2..787f725 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
@@ -139,6 +139,7 @@
pr_debug("stmmac: MMC ctrl register (offset 0x%x): 0x%08x\n",
MMC_CNTRL, value);
}
+EXPORT_SYMBOL(dwmac_mmc_ctrl);
/* To mask all all interrupts.*/
void dwmac_mmc_intr_all_mask(void __iomem *mmcaddr)
@@ -147,6 +148,7 @@
writel(MMC_DEFAULT_MASK, mmcaddr + MMC_TX_INTR_MASK);
writel(MMC_DEFAULT_MASK, mmcaddr + MMC_RX_IPC_INTR_MASK);
}
+EXPORT_SYMBOL(dwmac_mmc_intr_all_mask);
/* This reads the MAC core counters (if actaully supported).
* by default the MMC core is programmed to reset each
--
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