From e3e12f52b214121840b44c91de5b3e5af5d3eb84 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Mon, 06 Nov 2023 03:04:41 +0000
Subject: [PATCH] rk3568 rt init
---
kernel/drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 35 +++++++++++++++++++++++++++++++++++
1 files changed, 35 insertions(+), 0 deletions(-)
diff --git a/kernel/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/kernel/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
index 4958885..cda2e5e 100644
--- a/kernel/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
+++ b/kernel/drivers/gpu/drm/rockchip/rockchip_drm_drv.h
@@ -115,6 +115,37 @@
int cos_hue;
};
+#define ACM_GAIN_LUT_HY_LENGTH (9*17)
+#define ACM_GAIN_LUT_HY_TOTAL_LENGTH (ACM_GAIN_LUT_HY_LENGTH * 3)
+#define ACM_GAIN_LUT_HS_LENGTH (13*17)
+#define ACM_GAIN_LUT_HS_TOTAL_LENGTH (ACM_GAIN_LUT_HS_LENGTH * 3)
+#define ACM_DELTA_LUT_H_LENGTH 65
+#define ACM_DELTA_LUT_H_TOTAL_LENGTH (ACM_DELTA_LUT_H_LENGTH * 3)
+
+struct post_acm {
+ s16 delta_lut_h[ACM_DELTA_LUT_H_TOTAL_LENGTH];
+ s16 gain_lut_hy[ACM_GAIN_LUT_HY_TOTAL_LENGTH];
+ s16 gain_lut_hs[ACM_GAIN_LUT_HS_TOTAL_LENGTH];
+ u16 y_gain;
+ u16 h_gain;
+ u16 s_gain;
+ u16 acm_enable;
+};
+
+struct post_csc {
+ u16 hue;
+ u16 saturation;
+ u16 contrast;
+ u16 brightness;
+ u16 r_gain;
+ u16 g_gain;
+ u16 b_gain;
+ u16 r_offset;
+ u16 g_offset;
+ u16 b_offset;
+ u16 csc_enable;
+};
+
#define VOP_OUTPUT_IF_RGB BIT(0)
#define VOP_OUTPUT_IF_BT1120 BIT(1)
#define VOP_OUTPUT_IF_BT656 BIT(2)
@@ -128,6 +159,7 @@
#define VOP_OUTPUT_IF_DP1 BIT(10)
#define VOP_OUTPUT_IF_HDMI0 BIT(11)
#define VOP_OUTPUT_IF_HDMI1 BIT(12)
+#define VOP_OUTPUT_IF_TV BIT(13)
struct rockchip_crtc_state {
struct drm_crtc_state base;
@@ -181,6 +213,9 @@
u32 line_flag;
u8 mode_update;
struct rockchip_hdr_state hdr;
+ struct drm_property_blob *hdr_ext_data;
+ struct drm_property_blob *acm_lut_data;
+ struct drm_property_blob *post_csc_data;
};
#define to_rockchip_crtc_state(s) \
container_of(s, struct rockchip_crtc_state, base)
--
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