From de7d2b82e1d37d435e0b93009a6a472b54b9d6a1 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 15 Mar 2023 02:39:25 +0000
Subject: [PATCH] add support mipi 1280x800_LCD
---
kernel/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi | 555 +++++++++++++++++++++++--------------------------
kernel/arch/arm64/boot/dts/rockchip/rk3568.dtsi | 7
kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi | 35 ++
u-boot/drivers/video/drm/rockchip_panel.c | 29 ++
u-boot/arch/arm/mach-rockchip/kernel_dtb.c | 11
5 files changed, 325 insertions(+), 312 deletions(-)
diff --git a/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi b/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
index 487f484..e432a7c 100755
--- a/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
+++ b/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
@@ -238,7 +238,7 @@
*/
&video_phy1 {
- status = "disabled";
+ status = "okay";
};
&dsi1 {
status = "disabled";
@@ -249,12 +249,23 @@
};
&dsi1_in_vp1 {
- status = "disabled";
+ status = "okay";
};
&dsi1_panel {
- power-supply = <&vcc3v3_lcd1_n>;
+ power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3
+ vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
+ reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
+ vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd1_rst_gpio>;
};
+
+&route_dsi1 {
+ status = "disabled";
+ connect = <&vp1_out_dsi1>;
+};
+
/*
* edp_start
@@ -274,7 +285,8 @@
};
&edp_phy {
- status = "okay";
+ status = "okay";
+
};
&edp_in_vp0 {
@@ -283,6 +295,7 @@
&edp_in_vp1 {
status = "okay";
+
};
&route_edp {
@@ -545,6 +558,13 @@
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ lcd1 {
+ lcd1_rst_gpio: lcd1-rst-gpio {
+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
nk_io_init{
nk_io_gpio: nk-io-gpio{
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
@@ -591,10 +611,7 @@
};
};
-&route_dsi0 {
- status = "disabled";
- connect = <&vp1_out_dsi0>;
-};
+
@@ -640,7 +657,7 @@
};
&vcc3v3_lcd1_n {
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
enable-active-high;
};
diff --git a/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi b/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi
index ea2fb31..72c4edc 100755
--- a/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi
+++ b/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi
@@ -103,7 +103,7 @@
backlight1: backlight1 {
compatible = "pwm-backlight";
- pwms = <&pwm5 0 25000 0>;
+ pwms = <&pwm6 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
@@ -740,303 +740,262 @@
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
- backlight = <&backlight1>;
- reset-delay-ms = <60>;
- enable-delay-ms = <60>;
- prepare-delay-ms = <60>;
- unprepare-delay-ms = <60>;
- disable-delay-ms = <60>;
- dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
- MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
- dsi,format = <MIPI_DSI_FMT_RGB888>;
- dsi,lanes = <4>;
- panel-init-sequence = [
- 23 00 02 FE 21
- 23 00 02 04 00
- 23 00 02 00 64
- 23 00 02 2A 00
- 23 00 02 26 64
- 23 00 02 54 00
- 23 00 02 50 64
- 23 00 02 7B 00
- 23 00 02 77 64
- 23 00 02 A2 00
- 23 00 02 9D 64
- 23 00 02 C9 00
- 23 00 02 C5 64
- 23 00 02 01 71
- 23 00 02 27 71
- 23 00 02 51 71
- 23 00 02 78 71
- 23 00 02 9E 71
- 23 00 02 C6 71
- 23 00 02 02 89
- 23 00 02 28 89
- 23 00 02 52 89
- 23 00 02 79 89
- 23 00 02 9F 89
- 23 00 02 C7 89
- 23 00 02 03 9E
- 23 00 02 29 9E
- 23 00 02 53 9E
- 23 00 02 7A 9E
- 23 00 02 A0 9E
- 23 00 02 C8 9E
- 23 00 02 09 00
- 23 00 02 05 B0
- 23 00 02 31 00
- 23 00 02 2B B0
- 23 00 02 5A 00
- 23 00 02 55 B0
- 23 00 02 80 00
- 23 00 02 7C B0
- 23 00 02 A7 00
- 23 00 02 A3 B0
- 23 00 02 CE 00
- 23 00 02 CA B0
- 23 00 02 06 C0
- 23 00 02 2D C0
- 23 00 02 56 C0
- 23 00 02 7D C0
- 23 00 02 A4 C0
- 23 00 02 CB C0
- 23 00 02 07 CF
- 23 00 02 2F CF
- 23 00 02 58 CF
- 23 00 02 7E CF
- 23 00 02 A5 CF
- 23 00 02 CC CF
- 23 00 02 08 DD
- 23 00 02 30 DD
- 23 00 02 59 DD
- 23 00 02 7F DD
- 23 00 02 A6 DD
- 23 00 02 CD DD
- 23 00 02 0E 15
- 23 00 02 0A E9
- 23 00 02 36 15
- 23 00 02 32 E9
- 23 00 02 5F 15
- 23 00 02 5B E9
- 23 00 02 85 15
- 23 00 02 81 E9
- 23 00 02 AD 15
- 23 00 02 A9 E9
- 23 00 02 D3 15
- 23 00 02 CF E9
- 23 00 02 0B 14
- 23 00 02 33 14
- 23 00 02 5C 14
- 23 00 02 82 14
- 23 00 02 AA 14
- 23 00 02 D0 14
- 23 00 02 0C 36
- 23 00 02 34 36
- 23 00 02 5D 36
- 23 00 02 83 36
- 23 00 02 AB 36
- 23 00 02 D1 36
- 23 00 02 0D 6B
- 23 00 02 35 6B
- 23 00 02 5E 6B
- 23 00 02 84 6B
- 23 00 02 AC 6B
- 23 00 02 D2 6B
- 23 00 02 13 5A
- 23 00 02 0F 94
- 23 00 02 3B 5A
- 23 00 02 37 94
- 23 00 02 64 5A
- 23 00 02 60 94
- 23 00 02 8A 5A
- 23 00 02 86 94
- 23 00 02 B2 5A
- 23 00 02 AE 94
- 23 00 02 D8 5A
- 23 00 02 D4 94
- 23 00 02 10 D1
- 23 00 02 38 D1
- 23 00 02 61 D1
- 23 00 02 87 D1
- 23 00 02 AF D1
- 23 00 02 D5 D1
- 23 00 02 11 04
- 23 00 02 39 04
- 23 00 02 62 04
- 23 00 02 88 04
- 23 00 02 B0 04
- 23 00 02 D6 04
- 23 00 02 12 05
- 23 00 02 3A 05
- 23 00 02 63 05
- 23 00 02 89 05
- 23 00 02 B1 05
- 23 00 02 D7 05
- 23 00 02 18 AA
- 23 00 02 14 36
- 23 00 02 42 AA
- 23 00 02 3D 36
- 23 00 02 69 AA
- 23 00 02 65 36
- 23 00 02 8F AA
- 23 00 02 8B 36
- 23 00 02 B7 AA
- 23 00 02 B3 36
- 23 00 02 DD AA
- 23 00 02 D9 36
- 23 00 02 15 74
- 23 00 02 3F 74
- 23 00 02 66 74
- 23 00 02 8C 74
- 23 00 02 B4 74
- 23 00 02 DA 74
- 23 00 02 16 9F
- 23 00 02 40 9F
- 23 00 02 67 9F
- 23 00 02 8D 9F
- 23 00 02 B5 9F
- 23 00 02 DB 9F
- 23 00 02 17 DC
- 23 00 02 41 DC
- 23 00 02 68 DC
- 23 00 02 8E DC
- 23 00 02 B6 DC
- 23 00 02 DC DC
- 23 00 02 1D FF
- 23 00 02 19 03
- 23 00 02 47 FF
- 23 00 02 43 03
- 23 00 02 6E FF
- 23 00 02 6A 03
- 23 00 02 94 FF
- 23 00 02 90 03
- 23 00 02 BC FF
- 23 00 02 B8 03
- 23 00 02 E2 FF
- 23 00 02 DE 03
- 23 00 02 1A 35
- 23 00 02 44 35
- 23 00 02 6B 35
- 23 00 02 91 35
- 23 00 02 B9 35
- 23 00 02 DF 35
- 23 00 02 1B 45
- 23 00 02 45 45
- 23 00 02 6C 45
- 23 00 02 92 45
- 23 00 02 BA 45
- 23 00 02 E0 45
- 23 00 02 1C 55
- 23 00 02 46 55
- 23 00 02 6D 55
- 23 00 02 93 55
- 23 00 02 BB 55
- 23 00 02 E1 55
- 23 00 02 22 FF
- 23 00 02 1E 68
- 23 00 02 4C FF
- 23 00 02 48 68
- 23 00 02 73 FF
- 23 00 02 6F 68
- 23 00 02 99 FF
- 23 00 02 95 68
- 23 00 02 C1 FF
- 23 00 02 BD 68
- 23 00 02 E7 FF
- 23 00 02 E3 68
- 23 00 02 1F 7E
- 23 00 02 49 7E
- 23 00 02 70 7E
- 23 00 02 96 7E
- 23 00 02 BE 7E
- 23 00 02 E4 7E
- 23 00 02 20 97
- 23 00 02 4A 97
- 23 00 02 71 97
- 23 00 02 97 97
- 23 00 02 BF 97
- 23 00 02 E5 97
- 23 00 02 21 B5
- 23 00 02 4B B5
- 23 00 02 72 B5
- 23 00 02 98 B5
- 23 00 02 C0 B5
- 23 00 02 E6 B5
- 23 00 02 25 F0
- 23 00 02 23 E8
- 23 00 02 4F F0
- 23 00 02 4D E8
- 23 00 02 76 F0
- 23 00 02 74 E8
- 23 00 02 9C F0
- 23 00 02 9A E8
- 23 00 02 C4 F0
- 23 00 02 C2 E8
- 23 00 02 EA F0
- 23 00 02 E8 E8
- 23 00 02 24 FF
- 23 00 02 4E FF
- 23 00 02 75 FF
- 23 00 02 9B FF
- 23 00 02 C3 FF
- 23 00 02 E9 FF
- 23 00 02 FE 3D
- 23 00 02 00 04
- 23 00 02 FE 23
- 23 00 02 08 82
- 23 00 02 0A 00
- 23 00 02 0B 00
- 23 00 02 0C 01
- 23 00 02 16 00
- 23 00 02 18 02
- 23 00 02 1B 04
- 23 00 02 19 04
- 23 00 02 1C 81
- 23 00 02 1F 00
- 23 00 02 20 03
- 23 00 02 23 04
- 23 00 02 21 01
- 23 00 02 54 63
- 23 00 02 55 54
- 23 00 02 6E 45
- 23 00 02 6D 36
- 23 00 02 FE 3D
- 23 00 02 55 78
- 23 00 02 FE 20
- 23 00 02 26 30
- 23 00 02 FE 3D
- 23 00 02 20 71
- 23 00 02 50 8F
- 23 00 02 51 8F
- 23 00 02 FE 00
- 23 00 02 35 00
- 05 78 01 11
- 05 1E 01 29
- ];
+ power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3
+ vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
+ reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
+ vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
+ reset-delay-ms = <200>;
+ enable-delay-ms = <60>;
+ init-delay-ms = <120>;
+ disable-delay-ms = <60>;
+ prepare-delay-ms = <120>;
+ unprepare-delay-ms = <120>;
+ backlight = <&backlight1>;
+ dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+ MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
+ dsi,format = <MIPI_DSI_FMT_RGB888>;
+ dsi,lanes = <4>;
- panel-exit-sequence = [
- 05 00 01 28
- 05 00 01 10
- ];
+ panel-init-sequence = [
+ 15 00 02 E0 00
+ 15 00 02 E1 93
+ 15 00 02 E2 65
+ 15 00 02 E3 F8
+ 15 00 02 E0 01
+ 15 00 02 00 01
+ 15 00 02 01 36
+ 15 00 02 03 01
+ 15 00 02 04 36
+ 15 00 02 12 A0
+ 15 00 02 17 00
+ 15 00 02 18 EF
+ 15 00 02 19 00
+ 15 00 02 1A 00
+ 15 00 02 1B EF
+ 15 00 02 1C 00
+ 15 00 02 1F 6A
+ 15 00 02 20 28
+ 15 00 02 21 28
+ 15 00 02 22 7E
+ 15 00 02 26 DF
+ 15 00 02 37 59
+ 15 00 02 38 05
+ 15 00 02 39 02
+ 15 00 02 3A 05
+ 15 00 02 3C 78
+ 15 00 02 3D FF
+ 15 00 02 3E FF
+ 15 00 02 3F FF
+ 15 00 02 40 06
+ 15 00 02 41 A0
+ 15 00 02 43 14
+ 15 00 02 44 0E
+ 15 00 02 45 28
+ 15 00 02 55 0F
+ 15 00 02 56 01
+ 15 00 02 57 69
+ 15 00 02 58 0A
+ 15 00 02 59 0A
+ 15 00 02 5A 2B
+ 15 00 02 5B 14
+ 15 00 02 5D 7E
+ 15 00 02 5E 50
+ 15 00 02 5F 37
+ 15 00 02 60 21
+ 15 00 02 61 19
+ 15 00 02 62 0B
+ 15 00 02 63 0E
+ 15 00 02 64 00
+ 15 00 02 65 1A
+ 15 00 02 66 1B
+ 15 00 02 67 1F
+ 15 00 02 68 3D
+ 15 00 02 69 31
+ 15 00 02 6A 40
+ 15 00 02 6B 33
+ 15 00 02 6C 34
+ 15 00 02 6D 26
+ 15 00 02 6E 1B
+ 15 00 02 6F 0F
+ 15 00 02 70 74
+ 15 00 02 71 59
+ 15 00 02 72 43
+ 15 00 02 73 36
+ 15 00 02 74 30
+ 15 00 02 75 1A
+ 15 00 02 76 21
+ 15 00 02 77 08
+ 15 00 02 78 29
+ 15 00 02 79 2E
+ 15 00 02 7A 31
+ 15 00 02 7B 54
+ 15 00 02 7C 41
+ 15 00 02 7D 4A
+ 15 00 02 7E 44
+ 15 00 02 7F 41
+ 15 00 02 80 34
+ 15 00 02 81 26
+ 15 00 02 82 0F
+ 15 00 02 E0 02
+ 15 00 02 00 49
+ 15 00 02 01 48
+ 15 00 02 02 47
+ 15 00 02 03 46
+ 15 00 02 04 45
+ 15 00 02 05 44
+ 15 00 02 06 4A
+ 15 00 02 07 4B
+ 15 00 02 08 50
+ 15 00 02 09 1F
+ 15 00 02 0A 1F
+ 15 00 02 0B 1F
+ 15 00 02 0C 1F
+ 15 00 02 0D 1F
+ 15 00 02 0E 1F
+ 15 00 02 0F 51
+ 15 00 02 10 52
+ 15 00 02 11 53
+ 15 00 02 12 40
+ 15 00 02 13 41
+ 15 00 02 14 42
+ 15 00 02 15 43
+ 15 00 02 16 49
+ 15 00 02 17 48
+ 15 00 02 18 47
+ 15 00 02 19 46
+ 15 00 02 1A 45
+ 15 00 02 1B 44
+ 15 00 02 1C 4A
+ 15 00 02 1D 4B
+ 15 00 02 1E 50
+ 15 00 02 1F 1F
+ 15 00 02 20 1F
+ 15 00 02 21 1F
+ 15 00 02 22 1F
+ 15 00 02 23 1F
+ 15 00 02 24 1F
+ 15 00 02 25 51
+ 15 00 02 26 52
+ 15 00 02 27 53
+ 15 00 02 28 40
+ 15 00 02 29 41
+ 15 00 02 2A 42
+ 15 00 02 2B 43
+ 15 00 02 2C 0A
+ 15 00 02 2D 0B
+ 15 00 02 2E 04
+ 15 00 02 2F 05
+ 15 00 02 30 06
+ 15 00 02 31 07
+ 15 00 02 32 09
+ 15 00 02 33 08
+ 15 00 02 34 03
+ 15 00 02 35 1F
+ 15 00 02 36 1F
+ 15 00 02 37 1F
+ 15 00 02 38 1F
+ 15 00 02 39 1F
+ 15 00 02 3A 1F
+ 15 00 02 3B 02
+ 15 00 02 3C 01
+ 15 00 02 3D 00
+ 15 00 02 3E 13
+ 15 00 02 3F 12
+ 15 00 02 40 11
+ 15 00 02 41 10
+ 15 00 02 42 0A
+ 15 00 02 43 0B
+ 15 00 02 44 04
+ 15 00 02 45 05
+ 15 00 02 46 06
+ 15 00 02 47 07
+ 15 00 02 48 09
+ 15 00 02 49 08
+ 15 00 02 4A 03
+ 15 00 02 4B 1F
+ 15 00 02 4C 1F
+ 15 00 02 4D 1F
+ 15 00 02 4E 1F
+ 15 00 02 4F 1F
+ 15 00 02 50 1F
+ 15 00 02 51 02
+ 15 00 02 52 01
+ 15 00 02 53 00
+ 15 00 02 54 13
+ 15 00 02 55 12
+ 15 00 02 56 11
+ 15 00 02 57 10
+ 15 00 02 58 40
+ 15 00 02 59 00
+ 15 00 02 5A 00
+ 15 00 02 5B 30
+ 15 00 02 5C 07
+ 15 00 02 5D 40
+ 15 00 02 5E 01
+ 15 00 02 5F 02
+ 15 00 02 60 40
+ 15 00 02 61 01
+ 15 00 02 62 02
+ 15 00 02 63 70
+ 15 00 02 64 6B
+ 15 00 02 65 75
+ 15 00 02 66 0B
+ 15 00 02 67 74
+ 15 00 02 68 01
+ 15 00 02 69 64
+ 15 00 02 6A 65
+ 15 00 02 6B 00
+ 15 00 02 6C 00
+ 15 00 02 6D 04
+ 15 00 02 6E 04
+ 15 00 02 6F 89
+ 15 00 02 70 00
+ 15 00 02 71 00
+ 15 00 02 72 06
+ 15 00 02 73 7B
+ 15 00 02 74 00
+ 15 00 02 75 3C
+ 15 00 02 76 00
+ 15 00 02 77 0D
+ 15 00 02 78 2C
+ 15 00 02 79 00
+ 15 00 02 7A 00
+ 15 00 02 7B 00
+ 15 00 02 7C 00
+ 15 00 02 7D 03
+ 15 00 02 7E 7B
+ 15 00 02 E0 04
+ 15 00 02 09 14
+ 15 00 02 E0 00
+ 15 00 02 E6 02
+ 15 00 02 E7 0C
+ 15 78 02 11 00
+ 15 05 02 29 00
+ ];
- disp_timings1: display-timings {
- native-mode = <&dsi1_timing0>;
- dsi1_timing0: timing0 {
- clock-frequency = <132000000>;
- hactive = <1080>;
- vactive = <1920>;
- hfront-porch = <15>;
- hsync-len = <2>;
- hback-porch = <30>;
- vfront-porch = <15>;
- vsync-len = <2>;
- vback-porch = <15>;
- hsync-active = <0>;
- vsync-active = <0>;
- de-active = <0>;
- pixelclk-active = <1>;
- };
- };
+ panel-exit-sequence = [
+ 05 00 01 28
+ 05 00 01 10
+ ];
+
+ disp_timings1: display-timings {
+ native-mode = <&dsi1_timing0>;
+ dsi1_timing0: timing0 {
+ clock-frequency = <69000000>;
+ hactive = <800>;
+ vactive = <1280>;
+ hfront-porch = <32>;
+ hsync-len = <20>;
+ hback-porch = <20>;
+ vfront-porch = <16>;
+ vsync-len = <5>;
+ vback-porch = <12>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <1>;
+ };
+ };
ports {
#address-cells = <1>;
@@ -1531,6 +1490,10 @@
status = "okay";
};
+&pwm6 {
+ status = "okay";
+};
+
&pwm5 {
status = "okay";
};
diff --git a/kernel/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/kernel/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index 90c1e53..9b53dab 100755
--- a/kernel/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/kernel/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -22,6 +22,7 @@
#address-cells = <2>;
#size-cells = <2>;
+
aliases {
csi2dphy0 = &csi2_dphy0;
csi2dphy1 = &csi2_dphy1;
@@ -253,10 +254,10 @@
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
- connect = <&vp0_out_dsi1>;
+ connect = <&vp1_out_dsi1>;
};
route_edp: route-edp {
- status = "okay";
+ status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
@@ -264,7 +265,7 @@
connect = <&vp1_out_edp>;
};
route_hdmi: route-hdmi {
- status = "okay";
+ status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
diff --git a/u-boot/arch/arm/mach-rockchip/kernel_dtb.c b/u-boot/arch/arm/mach-rockchip/kernel_dtb.c
index 3d3aa6a..74da167 100755
--- a/u-boot/arch/arm/mach-rockchip/kernel_dtb.c
+++ b/u-boot/arch/arm/mach-rockchip/kernel_dtb.c
@@ -287,7 +287,7 @@
printf("Can't increase blob size: %s\n", fdt_strerror(ret));
return ret;
}
-
+#if 0
static int fdt_fixup_panel_init_sequence(void *fdt, int node,const struct display_fixup_data *data)
{
#if 0
@@ -345,6 +345,7 @@
printf("Can't increase blob size: %s\n", fdt_strerror(ret));
return ret;
}
+#endif
static int fdt_fixup_setprop_u32(void *fdt, int node, const char *name, u32 data)
{
@@ -391,12 +392,14 @@
static void fdt_fixup_panel_node(void *blob, int node, const char *name,
const struct display_fixup_data *data)
{
+/*
if (!strcmp(name, "dsi")) {
fdt_setprop_u32(blob, node, "dsi,flags", data->flags);
fdt_setprop_u32(blob, node, "dsi,format", data->format);
fdt_setprop_u32(blob, node, "dsi,lanes", data->lanes);
fdt_fixup_panel_init_sequence(blob, node,data);
}
+*/
fdt_fixup_setprop_u32(blob, node, "prepare-delay-ms", data->delay_prepare);
fdt_fixup_setprop_u32(blob, node, "enable-delay-ms", data->delay_enable);
fdt_fixup_setprop_u32(blob, node, "disable-delay-ms", data->delay_disable);
@@ -488,16 +491,16 @@
static void fdt_fixup_display_route(void *blob, const struct display_fixup_data *data)
{
if (data->type == PANEL_TYPE_DSI) {
- fdt_fixup_display_sub_route(blob, "dsi", FDT_STATUS_OKAY, data);
+ fdt_fixup_display_sub_route(blob, "dsi1", FDT_STATUS_OKAY, data);
fdt_fixup_display_sub_route(blob, "edp", FDT_STATUS_DISABLED, data);
fdt_fixup_display_sub_route(blob, "lvds", FDT_STATUS_DISABLED, data);
} else if (data->type == PANEL_TYPE_EDP) {
- fdt_fixup_display_sub_route(blob, "dsi", FDT_STATUS_DISABLED, data);
+ fdt_fixup_display_sub_route(blob, "dsi1", FDT_STATUS_DISABLED, data);
fdt_fixup_display_sub_route(blob, "edp", FDT_STATUS_OKAY, data);
fdt_fixup_display_sub_route(blob, "lvds", FDT_STATUS_DISABLED, data);
} else if (data->type == PANEL_TYPE_LVDS) {
fdt_fixup_display_sub_route(blob, "lvds", FDT_STATUS_OKAY, data);
- fdt_fixup_display_sub_route(blob, "dsi", FDT_STATUS_DISABLED, data);
+ fdt_fixup_display_sub_route(blob, "dsi1", FDT_STATUS_DISABLED, data);
fdt_fixup_display_sub_route(blob, "edp", FDT_STATUS_DISABLED, data);
}
}
diff --git a/u-boot/drivers/video/drm/rockchip_panel.c b/u-boot/drivers/video/drm/rockchip_panel.c
index 652e748..570bc99 100755
--- a/u-boot/drivers/video/drm/rockchip_panel.c
+++ b/u-boot/drivers/video/drm/rockchip_panel.c
@@ -69,6 +69,8 @@
struct gpio_desc reset_gpio;
struct gpio_desc edp_bl_on;
struct gpio_desc edp_bl_en;
+ struct gpio_desc vcc_5v;
+ struct gpio_desc vddio_mipi;
struct gpio_desc lvds_gpio0;
struct gpio_desc lvds_gpio1;
@@ -283,6 +285,19 @@
if (priv->prepared)
return;
+ /*mipi */
+ if (dm_gpio_is_valid(&priv->vddio_mipi))
+ dm_gpio_set_value(&priv->vddio_mipi, 1);
+ mdelay(20);
+
+ if (dm_gpio_is_valid(&priv->vcc_5v))
+ dm_gpio_set_value(&priv->vcc_5v, 1);
+
+ ret = dm_gpio_get_value(&priv->vcc_5v);
+ printf("troy test get vcc_5v : %d \n",ret);
+ ret = dm_gpio_get_value(&priv->vddio_mipi);
+ printf("troy test get vddio-mipi : %d \n",ret);
+ /*mipi end*/
/*7511 LVDS IO Control start*/
printk("nodka_lvds_index = %d\n",plat->lvds_index);
@@ -500,6 +515,20 @@
int ret;
const char *cmd_type;
+ ret = gpio_request_by_name(dev, "vcc-5v-gpio", 0,
+ &priv->vcc_5v, GPIOD_IS_OUT);
+ if (ret && ret != -ENOENT) {
+ printf("%s: Cannot get vcc-5v-gpio: %d\n", __func__, ret);
+ return ret;
+ }
+
+ ret = gpio_request_by_name(dev, "vddio-mipi", 0,
+ &priv->vddio_mipi, GPIOD_IS_OUT);
+ if (ret && ret != -ENOENT) {
+ printf("%s: Cannot get vddio-mipi: %d\n", __func__, ret);
+ return ret;
+ }
+
ret = gpio_request_by_name(dev, "edp-bl-gpios", 0,
&priv->edp_bl_on, GPIOD_IS_OUT);
if (ret && ret != -ENOENT) {
--
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