From b625cdcd68479b3d540a915785b6d9809b52a2f8 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Tue, 14 Feb 2023 06:37:54 +0000
Subject: [PATCH] stmmac read mac form eeprom
---
kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c | 4
kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c | 20
kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c | 26 -
kernel/drivers/net/ethernet/stmicro/stmmac/stmmac.h | 17 -
kernel/include/linux/platform_device.h | 4
kernel/drivers/net/ethernet/stmicro/stmmac/Kconfig | 29 -
kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 74 ++--
kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk-tool.c | 25 -
kernel/drivers/net/ethernet/stmicro/stmmac/Makefile | 22 -
kernel/drivers/misc/eeprom/at24.c | 148 +++++++++
kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk-tool.h | 13
README.MD | 0
kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 8
kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c | 17
kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 380 +++++++++++--------------
kernel/drivers/net/ethernet/stmicro/stmmac/common.h | 2
kernel/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h | 8
kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 4
rockdev/parameter.txt | 1
kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c | 7
kernel/include/linux/device.h | 11
kernel/drivers/net/ethernet/stmicro/stmmac/hwif.c | 30 -
kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c | 1
23 files changed, 426 insertions(+), 425 deletions(-)
diff --git a/README.MD b/README.MD
new file mode 100755
index 0000000..e69de29
--- /dev/null
+++ b/README.MD
diff --git a/kernel/drivers/misc/eeprom/at24.c b/kernel/drivers/misc/eeprom/at24.c
index dc35376..dde0b45 100644
--- a/kernel/drivers/misc/eeprom/at24.c
+++ b/kernel/drivers/misc/eeprom/at24.c
@@ -6,6 +6,7 @@
* Copyright (C) 2008 Wolfram Sang, Pengutronix
*/
+#define DEBUG
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
@@ -106,6 +107,8 @@
module_param_named(write_timeout, at24_write_timeout, uint, 0);
MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
+//Ben
+struct at24_data *at24_private=NULL;
struct at24_chip_data {
/*
* these fields mirror their equivalents in
@@ -421,6 +424,146 @@
return 0;
}
+//add ben
+static ssize_t at24_read_private(struct at24_data *at24,
+ char *buf, loff_t off, size_t count)
+{
+ ssize_t retval = 0;
+
+ if (unlikely(!count))
+ return count;
+
+ if (off + count > at24->byte_len)
+ return -EINVAL;
+
+ /*
+ * Read data from chip, protecting against concurrent updates
+ * from this host, but not from other I2C masters.
+ */
+ mutex_lock(&at24->lock);
+
+ while (count) {
+ ssize_t status;
+
+ //status = at24_eeprom_read_i2c(at24, buf, off, count);
+ status = at24_regmap_read(at24, buf, off, count);
+ if (status <= 0) {
+ if (retval == 0)
+ retval = status;
+ break;
+ }
+ buf += status;
+ off += status;
+ count -= status;
+ retval += status;
+ }
+
+ mutex_unlock(&at24->lock);
+
+ return retval;
+}
+
+#if 0
+static unsigned char AscToHex(unsigned char aChar)
+{
+ if((aChar>=0x30)&&(aChar<=0x39))
+ aChar -= 0x30;
+ else if((aChar>=0x41)&&(aChar<=0x46))
+ aChar -= 0x37;
+ else if((aChar>=0x61)&&(aChar<=0x66))
+ aChar -= 0x57;
+ else aChar = 0xff;
+
+ return aChar;
+}
+#endif
+
+#if 0
+ssize_t at24_mac_read(unsigned char* addr)
+{
+ char buf[20];
+ char buf_tmp[12];
+ int i;
+ ssize_t ret;
+ if (at24_private == NULL)
+ {
+ printk("ben %s: at24_private==null error\n", __func__);
+ return 0;
+ }
+ memset(buf, 0x00, 20);
+ memset(buf_tmp, 0x00, 12);
+ ret = at24_read(at24_private, 0, buf, 12);
+ if (ret > 0)
+ {
+ for(i=0; i<12; i++)
+ {
+ buf_tmp[i] = AscToHex(buf[i]);
+ }
+ addr[0] = (buf_tmp[0] << 4) | buf_tmp[1];
+ addr[1] = (buf_tmp[2] << 4) | buf_tmp[3];
+ addr[2] = (buf_tmp[4] << 4) | buf_tmp[5];
+ addr[3] = (buf_tmp[6] << 4) | buf_tmp[7];
+ addr[4] = (buf_tmp[8] << 4) | buf_tmp[9];
+ addr[5] = (buf_tmp[10] << 4) | buf_tmp[11];
+ }
+ return ret;
+}
+#endif
+
+ssize_t at24_mac_read(unsigned char* addr)
+{
+ char buf[20];
+ char buf_tmp[12];
+ ssize_t ret;
+ if (at24_private == NULL)
+ {
+ printk("ben: at24_mac_read at24_private==null error");
+ return 0;
+ }
+ memset(buf, 0x00, 20);
+ memset(buf_tmp, 0x00, 12);
+ ret = at24_read_private(at24_private, buf, 0, 6);
+ if (ret > 0)
+ {
+ addr[0] = buf[0];
+ addr[1] = buf[1];
+ addr[2] = buf[2];
+ addr[3] = buf[3];
+ addr[4] = buf[4];
+ addr[5] = buf[5];
+ }
+ printk("at24_mac_read ...............\n");
+ return ret;
+}
+EXPORT_SYMBOL(at24_mac_read);
+
+ssize_t at24_mac1_read(unsigned char* mac)
+{
+ char buf[20];
+ char buf_tmp[12];
+ ssize_t ret;
+ if (at24_private == NULL)
+ {
+ printk("zcl: at24_mac_read at24_private==null error");
+ return 0;
+ }
+ memset(buf, 0x00, 20);
+ memset(buf_tmp, 0x00, 12);
+ ret = at24_read_private(at24_private, buf, 0x10, 6);
+ if (ret > 0)
+ {
+ *mac = buf[0];
+ *(mac + 1) = buf[1];
+ *(mac + 2) = buf[2];
+ *(mac + 3) = buf[3];
+ *(mac + 4) = buf[4];
+ *(mac + 5) = buf[5];
+ }
+ printk("at24_mac1_read ...............\n");
+ return ret;
+}
+EXPORT_SYMBOL(at24_mac1_read);
+
static int at24_write(void *priv, unsigned int off, void *val, size_t count)
{
struct at24_data *at24;
@@ -630,6 +773,7 @@
u8 test_byte;
int err;
+ printk("ben %s ...\n", __func__);
i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
i2c_fn_block = i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
@@ -674,6 +818,7 @@
if (!at24)
return -ENOMEM;
+ at24_private = at24;
mutex_init(&at24->lock);
at24->byte_len = pdata.byte_len;
at24->page_size = pdata.page_size;
@@ -792,7 +937,8 @@
at24_io_limit = rounddown_pow_of_two(at24_io_limit);
return i2c_add_driver(&at24_driver);
}
-module_init(at24_init);
+//module_init(at24_init);
+postcore_initcall_sync(at24_init);
static void __exit at24_exit(void)
{
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/Kconfig b/kernel/drivers/net/ethernet/stmicro/stmmac/Kconfig
index 21f4074..324049e 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -12,25 +12,6 @@
if STMMAC_ETH
-config STMMAC_ETHTOOL
- bool "Ethtool feature for STMMAC"
- default STMMAC_ETH
- help
- This selects the ethtool function, default is Y.
-
-config STMMAC_FULL
- bool "Support full driver for STMMAC"
- default STMMAC_ETH
- help
- This selects the full function, default is Y, full-featured version
- includes 4.10 and other versions, if it is N, only 4.10 core working.
-
-config STMMAC_PTP
- bool "PTP feature for STMMAC"
- default STMMAC_ETH
- help
- This selects the ptp timestamp function, default is Y.
-
config STMMAC_PLATFORM
tristate "STMMAC Platform bus support"
depends on STMMAC_ETH
@@ -126,16 +107,6 @@
This selects the Rockchip RK3288 SoC glue layer support for
the stmmac device driver.
-
-config DWMAC_ROCKCHIP_TOOL
- bool "Rockchip dwmac tool support"
- depends on DWMAC_ROCKCHIP
- default DWMAC_ROCKCHIP
- help
- Support for Ethernet functions on Rockchip SoCs.
-
- This selects the features for Rockchip's Ethernet, include PHY loopback,
- MAC loopback, and delayline scanning of RGMII mode.
config DWMAC_SOCFPGA
tristate "SOCFPGA dwmac support"
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/Makefile b/kernel/drivers/net/ethernet/stmicro/stmmac/Makefile
index f8275ed..2a3afda 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -1,19 +1,12 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_STMMAC_ETH) += stmmac.o
-
-stmmac-objs:= stmmac_main.o stmmac_mdio.o dwmac_lib.o \
- mmc_core.o dwmac4_descs.o dwmac4_dma.o \
- dwmac4_lib.o dwmac4_core.o hwif.o \
+stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o \
+ chain_mode.o dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o \
+ dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o \
+ mmc_core.o stmmac_hwtstamp.o stmmac_ptp.o dwmac4_descs.o \
+ dwmac4_dma.o dwmac4_lib.o dwmac4_core.o dwmac5.o hwif.o \
+ stmmac_tc.o dwxgmac2_core.o dwxgmac2_dma.o dwxgmac2_descs.o \
$(stmmac-y)
-
-stmmac-$(CONFIG_STMMAC_FULL) += ring_mode.o chain_mode.o dwmac1000_core.o \
- dwmac1000_dma.o dwmac100_core.o dwmac100_dma.o \
- enh_desc.o norm_desc.o dwmac5.o stmmac_tc.o \
- dwxgmac2_core.o dwxgmac2_dma.o dwxgmac2_descs.o
-
-stmmac-$(CONFIG_STMMAC_ETHTOOL) += stmmac_ethtool.o
-
-stmmac-$(CONFIG_STMMAC_PTP) += stmmac_hwtstamp.o stmmac_ptp.o
# Ordering matters. Generic driver must be last.
obj-$(CONFIG_STMMAC_PLATFORM) += stmmac-platform.o
@@ -23,8 +16,7 @@
obj-$(CONFIG_DWMAC_MESON) += dwmac-meson.o dwmac-meson8b.o
obj-$(CONFIG_DWMAC_OXNAS) += dwmac-oxnas.o
obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rockchip.o
-dwmac-rockchip-objs := dwmac-rk.o
-dwmac-rockchip-$(CONFIG_DWMAC_ROCKCHIP_TOOL) += dwmac-rk-tool.o
+dwmac-rockchip-objs := dwmac-rk.o dwmac-rk-tool.o
obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o
obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/common.h b/kernel/drivers/net/ethernet/stmicro/stmmac/common.h
index e6fa3b1..c3c0c8c 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -261,7 +261,7 @@
#define STMMAC_COAL_TX_TIMER 1000
#define STMMAC_MAX_COAL_TX_TICK 100000
#define STMMAC_TX_MAX_FRAMES 256
-#define STMMAC_TX_FRAMES 25
+#define STMMAC_TX_FRAMES 1
/* Packets types */
enum packets_types {
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c
index b3365b3..fad5038 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c
@@ -71,7 +71,6 @@
static const struct of_device_id dwmac_generic_match[] = {
{ .compatible = "st,spear600-gmac"},
- { .compatible = "snps,dwmac-3.40a"},
{ .compatible = "snps,dwmac-3.50a"},
{ .compatible = "snps,dwmac-3.610"},
{ .compatible = "snps,dwmac-3.70a"},
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
index 03b11f1..826626e 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
@@ -288,7 +288,10 @@
val &= ~NSS_COMMON_GMAC_CTL_PHY_IFACE_SEL;
break;
default:
- goto err_unsupported_phy;
+ dev_err(&pdev->dev, "Unsupported PHY mode: \"%s\"\n",
+ phy_modes(gmac->phy_mode));
+ err = -EINVAL;
+ goto err_remove_config_dt;
}
regmap_write(gmac->nss_common, NSS_COMMON_GMAC_CTL(gmac->id), val);
@@ -305,7 +308,10 @@
NSS_COMMON_CLK_SRC_CTRL_OFFSET(gmac->id);
break;
default:
- goto err_unsupported_phy;
+ dev_err(&pdev->dev, "Unsupported PHY mode: \"%s\"\n",
+ phy_modes(gmac->phy_mode));
+ err = -EINVAL;
+ goto err_remove_config_dt;
}
regmap_write(gmac->nss_common, NSS_COMMON_CLK_SRC_CTRL, val);
@@ -322,7 +328,8 @@
NSS_COMMON_CLK_GATE_GMII_TX_EN(gmac->id);
break;
default:
- goto err_unsupported_phy;
+ /* We don't get here; the switch above will have errored out */
+ unreachable();
}
regmap_write(gmac->nss_common, NSS_COMMON_CLK_GATE, val);
@@ -344,19 +351,12 @@
plat_dat->bsp_priv = gmac;
plat_dat->fix_mac_speed = ipq806x_gmac_fix_mac_speed;
plat_dat->multicast_filter_bins = 0;
- plat_dat->tx_fifo_size = 8192;
- plat_dat->rx_fifo_size = 8192;
err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
if (err)
goto err_remove_config_dt;
return 0;
-
-err_unsupported_phy:
- dev_err(&pdev->dev, "Unsupported PHY mode: \"%s\"\n",
- phy_modes(gmac->phy_mode));
- err = -EINVAL;
err_remove_config_dt:
stmmac_remove_config_dt(pdev, plat_dat);
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk-tool.c b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk-tool.c
index 70b458d..46633a6 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk-tool.c
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk-tool.c
@@ -545,15 +545,15 @@
static void dwmac_rk_rx_clean(struct stmmac_priv *priv,
struct dwmac_rk_lb_priv *lb_priv)
{
- if (likely(lb_priv->rx_skbuff_dma)) {
+ struct sk_buff *skb;
+
+ skb = lb_priv->rx_skbuff;
+
+ if (likely(lb_priv->rx_skbuff)) {
dma_unmap_single(priv->device,
lb_priv->rx_skbuff_dma,
lb_priv->dma_buf_sz, DMA_FROM_DEVICE);
- lb_priv->rx_skbuff_dma = 0;
- }
-
- if (likely(lb_priv->rx_skbuff)) {
- dev_consume_skb_any(lb_priv->rx_skbuff);
+ dev_kfree_skb(skb);
lb_priv->rx_skbuff = NULL;
}
}
@@ -582,12 +582,7 @@
}
frame_len -= ETH_FCS_LEN;
- prefetch(skb->data - NET_IP_ALIGN);
skb_put(skb, frame_len);
- dma_unmap_single(priv->device,
- lb_priv->rx_skbuff_dma,
- lb_priv->dma_buf_sz,
- DMA_FROM_DEVICE);
return dwmac_rk_loopback_validate(priv, lb_priv, skb);
}
@@ -621,9 +616,10 @@
static void dwmac_rk_tx_clean(struct stmmac_priv *priv,
struct dwmac_rk_lb_priv *lb_priv)
{
- struct sk_buff *skb = lb_priv->tx_skbuff;
+ struct sk_buff *skb;
struct dma_desc *p;
+ skb = lb_priv->tx_skbuff;
p = lb_priv->dma_tx;
if (likely(lb_priv->tx_skbuff_dma)) {
@@ -635,7 +631,7 @@
}
if (likely(skb)) {
- dev_consume_skb_any(skb);
+ dev_kfree_skb(skb);
lb_priv->tx_skbuff = NULL;
}
@@ -659,10 +655,9 @@
lb_priv->tx_skbuff = skb;
des = dma_map_single(priv->device, skb->data,
- nopaged_len, DMA_TO_DEVICE);
+ nopaged_len, DMA_TO_DEVICE);
if (dma_mapping_error(priv->device, des))
goto dma_map_err;
- lb_priv->tx_skbuff_dma = des;
stmmac_set_desc_addr(priv, desc, des);
lb_priv->tx_skbuff_dma_len = nopaged_len;
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk-tool.h b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk-tool.h
index 5fc7a1b..d71989b 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk-tool.h
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk-tool.h
@@ -13,20 +13,8 @@
void dwmac_rk_get_rgmii_delayline(struct stmmac_priv *priv, int *tx_delay, int *rx_delay);
int dwmac_rk_get_phy_interface(struct stmmac_priv *priv);
-#ifdef CONFIG_DWMAC_ROCKCHIP_TOOL
int dwmac_rk_create_loopback_sysfs(struct device *dev);
int dwmac_rk_remove_loopback_sysfs(struct device *device);
-#else
-static inline int dwmac_rk_create_loopback_sysfs(struct device *dev)
-{
- return 0;
-}
-
-static inline int dwmac_rk_remove_loopback_sysfs(struct device *device)
-{
- return 0;
-}
-#endif
#ifdef CONFIG_DWMAC_RK_AUTO_DELAYLINE
int dwmac_rk_get_rgmii_delayline_from_vendor(struct stmmac_priv *priv);
@@ -34,3 +22,4 @@
#endif
#endif /* __DWMAC_RK_TOOL_H__ */
+
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 870e60a..c6b6cae 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -47,10 +47,7 @@
void (*set_to_qsgmii)(struct rk_priv_data *bsp_priv);
void (*set_rgmii_speed)(struct rk_priv_data *bsp_priv, int speed);
void (*set_rmii_speed)(struct rk_priv_data *bsp_priv, int speed);
- void (*set_sgmii_speed)(struct rk_priv_data *bsp_priv, int speed);
- void (*set_clock_selection)(struct rk_priv_data *bsp_priv, bool input,
- bool enable);
- void (*integrated_phy_power)(struct rk_priv_data *bsp_priv, bool up);
+ void (*integrated_phy_powerup)(struct rk_priv_data *bsp_priv);
};
struct rk_priv_data {
@@ -64,7 +61,6 @@
bool clk_enabled;
bool clock_input;
bool integrated_phy;
- struct phy *comphy;
struct clk *clk_mac;
struct clk *gmac_clkin;
@@ -169,10 +165,10 @@
int ret, i, id = bsp_priv->bus_id;
u32 val;
- if (mode == PHY_INTERFACE_MODE_QSGMII && !id)
+ if (mode == PHY_INTERFACE_MODE_QSGMII && id > 0)
return 0;
- ret = xpcs_soft_reset(bsp_priv, 0);
+ ret = xpcs_soft_reset(bsp_priv, id);
if (ret) {
dev_err(&bsp_priv->pdev->dev, "xpcs_soft_reset fail %d\n", ret);
return ret;
@@ -199,10 +195,10 @@
SR_MII_CTRL_AN_ENABLE);
}
} else {
- val = xpcs_read(bsp_priv, SR_MII_OFFSET(0) + VR_MII_DIG_CTRL1);
- xpcs_write(bsp_priv, SR_MII_OFFSET(0) + VR_MII_DIG_CTRL1,
+ val = xpcs_read(bsp_priv, SR_MII_OFFSET(id) + VR_MII_DIG_CTRL1);
+ xpcs_write(bsp_priv, SR_MII_OFFSET(id) + VR_MII_DIG_CTRL1,
val | MII_MAC_AUTO_SW);
- xpcs_write(bsp_priv, SR_MII_OFFSET(0) + MII_BMCR,
+ xpcs_write(bsp_priv, SR_MII_OFFSET(id) + MII_BMCR,
SR_MII_CTRL_AN_ENABLE);
}
@@ -216,55 +212,8 @@
#define GRF_CLR_BIT(nr) (BIT(nr+16))
#define DELAY_ENABLE(soc, tx, rx) \
- ((((tx) >= 0) ? soc##_GMAC_TXCLK_DLY_ENABLE : soc##_GMAC_TXCLK_DLY_DISABLE) | \
- (((rx) >= 0) ? soc##_GMAC_RXCLK_DLY_ENABLE : soc##_GMAC_RXCLK_DLY_DISABLE))
-
-#define DELAY_VALUE(soc, tx, rx) \
- ((((tx) >= 0) ? soc##_GMAC_CLK_TX_DL_CFG(tx) : 0) | \
- (((rx) >= 0) ? soc##_GMAC_CLK_RX_DL_CFG(rx) : 0))
-
-/* Integrated EPHY */
-
-#define RK_GRF_MACPHY_CON0 0xb00
-#define RK_GRF_MACPHY_CON1 0xb04
-#define RK_GRF_MACPHY_CON2 0xb08
-#define RK_GRF_MACPHY_CON3 0xb0c
-
-#define RK_MACPHY_ENABLE GRF_BIT(0)
-#define RK_MACPHY_DISABLE GRF_CLR_BIT(0)
-#define RK_MACPHY_CFG_CLK_50M GRF_BIT(14)
-#define RK_GMAC2PHY_RMII_MODE (GRF_BIT(6) | GRF_CLR_BIT(7))
-#define RK_GRF_CON2_MACPHY_ID HIWORD_UPDATE(0x1234, 0xffff, 0)
-#define RK_GRF_CON3_MACPHY_ID HIWORD_UPDATE(0x35, 0x3f, 0)
-
-static void rk_gmac_integrated_ephy_powerup(struct rk_priv_data *priv)
-{
- regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_CFG_CLK_50M);
- regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_GMAC2PHY_RMII_MODE);
-
- regmap_write(priv->grf, RK_GRF_MACPHY_CON2, RK_GRF_CON2_MACPHY_ID);
- regmap_write(priv->grf, RK_GRF_MACPHY_CON3, RK_GRF_CON3_MACPHY_ID);
-
- if (priv->phy_reset) {
- /* PHY needs to be disabled before trying to reset it */
- regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE);
- if (priv->phy_reset)
- reset_control_assert(priv->phy_reset);
- usleep_range(10, 20);
- if (priv->phy_reset)
- reset_control_deassert(priv->phy_reset);
- usleep_range(10, 20);
- regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_ENABLE);
- msleep(30);
- }
-}
-
-static void rk_gmac_integrated_ephy_powerdown(struct rk_priv_data *priv)
-{
- regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE);
- if (priv->phy_reset)
- reset_control_assert(priv->phy_reset);
-}
+ (((tx) ? soc##_GMAC_TXCLK_DLY_ENABLE : soc##_GMAC_TXCLK_DLY_DISABLE) | \
+ ((rx) ? soc##_GMAC_RXCLK_DLY_ENABLE : soc##_GMAC_RXCLK_DLY_DISABLE))
#define PX30_GRF_GMAC_CON1 0x0904
@@ -357,10 +306,12 @@
regmap_write(bsp_priv->grf, RK1808_GRF_GMAC_CON1,
RK1808_GMAC_PHY_INTF_SEL_RGMII |
- DELAY_ENABLE(RK1808, tx_delay, rx_delay));
+ RK1808_GMAC_RXCLK_DLY_ENABLE |
+ RK1808_GMAC_TXCLK_DLY_ENABLE);
regmap_write(bsp_priv->grf, RK1808_GRF_GMAC_CON0,
- DELAY_VALUE(RK1808, tx_delay, rx_delay));
+ RK1808_GMAC_CLK_RX_DL_CFG(rx_delay) |
+ RK1808_GMAC_CLK_TX_DL_CFG(tx_delay));
}
static void rk1808_set_to_rmii(struct rk_priv_data *bsp_priv)
@@ -488,7 +439,8 @@
RK3128_GMAC_RMII_MODE_CLR);
regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON0,
DELAY_ENABLE(RK3128, tx_delay, rx_delay) |
- DELAY_VALUE(RK3128, tx_delay, rx_delay));
+ RK3128_GMAC_CLK_RX_DL_CFG(rx_delay) |
+ RK3128_GMAC_CLK_TX_DL_CFG(tx_delay));
}
static void rk3128_set_to_rmii(struct rk_priv_data *bsp_priv)
@@ -604,7 +556,8 @@
DELAY_ENABLE(RK3228, tx_delay, rx_delay));
regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON0,
- DELAY_VALUE(RK3128, tx_delay, rx_delay));
+ RK3228_GMAC_CLK_RX_DL_CFG(rx_delay) |
+ RK3228_GMAC_CLK_TX_DL_CFG(tx_delay));
}
static void rk3228_set_to_rmii(struct rk_priv_data *bsp_priv)
@@ -667,16 +620,10 @@
dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
}
-static void rk3228_integrated_phy_power(struct rk_priv_data *priv, bool up)
+static void rk3228_integrated_phy_powerup(struct rk_priv_data *priv)
{
- if (up) {
- regmap_write(priv->grf, RK3228_GRF_CON_MUX,
- RK3228_GRF_CON_MUX_GMAC_INTEGRATED_PHY);
-
- rk_gmac_integrated_ephy_powerup(priv);
- } else {
- rk_gmac_integrated_ephy_powerdown(priv);
- }
+ regmap_write(priv->grf, RK3228_GRF_CON_MUX,
+ RK3228_GRF_CON_MUX_GMAC_INTEGRATED_PHY);
}
static const struct rk_gmac_ops rk3228_ops = {
@@ -684,7 +631,7 @@
.set_to_rmii = rk3228_set_to_rmii,
.set_rgmii_speed = rk3228_set_rgmii_speed,
.set_rmii_speed = rk3228_set_rmii_speed,
- .integrated_phy_power = rk3228_integrated_phy_power,
+ .integrated_phy_powerup = rk3228_integrated_phy_powerup,
};
#define RK3288_GRF_SOC_CON1 0x0248
@@ -730,7 +677,8 @@
RK3288_GMAC_RMII_MODE_CLR);
regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON3,
DELAY_ENABLE(RK3288, tx_delay, rx_delay) |
- DELAY_VALUE(RK3288, tx_delay, rx_delay));
+ RK3288_GMAC_CLK_RX_DL_CFG(rx_delay) |
+ RK3288_GMAC_CLK_TX_DL_CFG(tx_delay));
}
static void rk3288_set_to_rmii(struct rk_priv_data *bsp_priv)
@@ -901,10 +849,12 @@
regmap_write(bsp_priv->grf, RK3328_GRF_MAC_CON1,
RK3328_GMAC_PHY_INTF_SEL_RGMII |
RK3328_GMAC_RMII_MODE_CLR |
- DELAY_ENABLE(RK3328, tx_delay, rx_delay));
+ RK3328_GMAC_RXCLK_DLY_ENABLE |
+ RK3328_GMAC_TXCLK_DLY_ENABLE);
regmap_write(bsp_priv->grf, RK3328_GRF_MAC_CON0,
- DELAY_VALUE(RK3328, tx_delay, rx_delay));
+ RK3328_GMAC_CLK_RX_DL_CFG(rx_delay) |
+ RK3328_GMAC_CLK_TX_DL_CFG(tx_delay));
}
static void rk3328_set_to_rmii(struct rk_priv_data *bsp_priv)
@@ -972,16 +922,10 @@
dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
}
-static void rk3328_integrated_phy_power(struct rk_priv_data *priv, bool up)
+static void rk3328_integrated_phy_powerup(struct rk_priv_data *priv)
{
- if (up) {
- regmap_write(priv->grf, RK3328_GRF_MACPHY_CON1,
- RK3328_MACPHY_RMII_MODE);
-
- rk_gmac_integrated_ephy_powerup(priv);
- } else {
- rk_gmac_integrated_ephy_powerdown(priv);
- }
+ regmap_write(priv->grf, RK3328_GRF_MACPHY_CON1,
+ RK3328_MACPHY_RMII_MODE);
}
static const struct rk_gmac_ops rk3328_ops = {
@@ -989,7 +933,7 @@
.set_to_rmii = rk3328_set_to_rmii,
.set_rgmii_speed = rk3328_set_rgmii_speed,
.set_rmii_speed = rk3328_set_rmii_speed,
- .integrated_phy_power = rk3328_integrated_phy_power,
+ .integrated_phy_powerup = rk3328_integrated_phy_powerup,
};
#define RK3366_GRF_SOC_CON6 0x0418
@@ -1035,7 +979,8 @@
RK3366_GMAC_RMII_MODE_CLR);
regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON7,
DELAY_ENABLE(RK3366, tx_delay, rx_delay) |
- DELAY_VALUE(RK3366, tx_delay, rx_delay));
+ RK3366_GMAC_CLK_RX_DL_CFG(rx_delay) |
+ RK3366_GMAC_CLK_TX_DL_CFG(tx_delay));
}
static void rk3366_set_to_rmii(struct rk_priv_data *bsp_priv)
@@ -1145,7 +1090,8 @@
RK3368_GMAC_RMII_MODE_CLR);
regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON16,
DELAY_ENABLE(RK3368, tx_delay, rx_delay) |
- DELAY_VALUE(RK3368, tx_delay, rx_delay));
+ RK3368_GMAC_CLK_RX_DL_CFG(rx_delay) |
+ RK3368_GMAC_CLK_TX_DL_CFG(tx_delay));
}
static void rk3368_set_to_rmii(struct rk_priv_data *bsp_priv)
@@ -1255,7 +1201,8 @@
RK3399_GMAC_RMII_MODE_CLR);
regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON6,
DELAY_ENABLE(RK3399, tx_delay, rx_delay) |
- DELAY_VALUE(RK3399, tx_delay, rx_delay));
+ RK3399_GMAC_CLK_RX_DL_CFG(rx_delay) |
+ RK3399_GMAC_CLK_TX_DL_CFG(tx_delay));
}
static void rk3399_set_to_rmii(struct rk_priv_data *bsp_priv)
@@ -1402,10 +1349,12 @@
regmap_write(bsp_priv->grf, offset_con1,
RK3568_GMAC_PHY_INTF_SEL_RGMII |
- DELAY_ENABLE(RK3568, tx_delay, rx_delay));
+ RK3568_GMAC_RXCLK_DLY_ENABLE |
+ RK3568_GMAC_TXCLK_DLY_ENABLE);
regmap_write(bsp_priv->grf, offset_con0,
- DELAY_VALUE(RK3568, tx_delay, rx_delay));
+ RK3568_GMAC_CLK_RX_DL_CFG(rx_delay) |
+ RK3568_GMAC_CLK_TX_DL_CFG(tx_delay));
}
static void rk3568_set_to_rmii(struct rk_priv_data *bsp_priv)
@@ -1451,34 +1400,6 @@
__func__, rate, ret);
}
-static void rk3568_set_gmac_sgmii_speed(struct rk_priv_data *bsp_priv, int speed)
-{
- struct device *dev = &bsp_priv->pdev->dev;
- unsigned int ctrl;
-
- /* Only gmac1 set the speed for port1 */
- if (!bsp_priv->bus_id)
- return;
-
- switch (speed) {
- case 10:
- ctrl = BMCR_SPEED10;
- break;
- case 100:
- ctrl = BMCR_SPEED100;
- break;
- case 1000:
- ctrl = BMCR_SPEED1000;
- break;
- default:
- dev_err(dev, "unknown speed value for GMAC speed=%d", speed);
- return;
- }
-
- xpcs_write(bsp_priv, SR_MII_OFFSET(bsp_priv->bus_id) + MII_BMCR,
- ctrl | BMCR_FULLDPLX);
-}
-
static const struct rk_gmac_ops rk3568_ops = {
.set_to_rgmii = rk3568_set_to_rgmii,
.set_to_rmii = rk3568_set_to_rmii,
@@ -1486,7 +1407,6 @@
.set_to_qsgmii = rk3568_set_to_qsgmii,
.set_rgmii_speed = rk3568_set_gmac_speed,
.set_rmii_speed = rk3568_set_gmac_speed,
- .set_sgmii_speed = rk3568_set_gmac_sgmii_speed,
};
#define RV1108_GRF_GMAC_CON0 0X0900
@@ -1552,18 +1472,21 @@
(GRF_CLR_BIT(4) | GRF_CLR_BIT(5) | GRF_BIT(6))
#define RV1126_GMAC_FLOW_CTRL GRF_BIT(7)
#define RV1126_GMAC_FLOW_CTRL_CLR GRF_CLR_BIT(7)
-#define RV1126_M0_GMAC_RXCLK_DLY_ENABLE GRF_BIT(1)
-#define RV1126_M0_GMAC_RXCLK_DLY_DISABLE GRF_CLR_BIT(1)
-#define RV1126_M0_GMAC_TXCLK_DLY_ENABLE GRF_BIT(0)
-#define RV1126_M0_GMAC_TXCLK_DLY_DISABLE GRF_CLR_BIT(0)
-#define RV1126_M1_GMAC_RXCLK_DLY_ENABLE GRF_BIT(3)
-#define RV1126_M1_GMAC_RXCLK_DLY_DISABLE GRF_CLR_BIT(3)
-#define RV1126_M1_GMAC_TXCLK_DLY_ENABLE GRF_BIT(2)
-#define RV1126_M1_GMAC_TXCLK_DLY_DISABLE GRF_CLR_BIT(2)
+#define RV1126_GMAC_M0_RXCLK_DLY_ENABLE GRF_BIT(1)
+#define RV1126_GMAC_M0_RXCLK_DLY_DISABLE GRF_CLR_BIT(1)
+#define RV1126_GMAC_M0_TXCLK_DLY_ENABLE GRF_BIT(0)
+#define RV1126_GMAC_M0_TXCLK_DLY_DISABLE GRF_CLR_BIT(0)
+#define RV1126_GMAC_M1_RXCLK_DLY_ENABLE GRF_BIT(3)
+#define RV1126_GMAC_M1_RXCLK_DLY_DISABLE GRF_CLR_BIT(3)
+#define RV1126_GMAC_M1_TXCLK_DLY_ENABLE GRF_BIT(2)
+#define RV1126_GMAC_M1_TXCLK_DLY_DISABLE GRF_CLR_BIT(2)
-/* RV1126_GRF_GMAC_CON1 && RV1126_GRF_GMAC_CON2 */
-#define RV1126_GMAC_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 8)
-#define RV1126_GMAC_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 0)
+/* RV1126_GRF_GMAC_CON1 */
+#define RV1126_GMAC_M0_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 8)
+#define RV1126_GMAC_M0_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 0)
+/* RV1126_GRF_GMAC_CON2 */
+#define RV1126_GMAC_M1_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 8)
+#define RV1126_GMAC_M1_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 0)
static void rv1126_set_to_rgmii(struct rk_priv_data *bsp_priv,
int tx_delay, int rx_delay)
@@ -1577,14 +1500,18 @@
regmap_write(bsp_priv->grf, RV1126_GRF_GMAC_CON0,
RV1126_GMAC_PHY_INTF_SEL_RGMII |
- DELAY_ENABLE(RV1126_M0, tx_delay, rx_delay) |
- DELAY_ENABLE(RV1126_M1, tx_delay, rx_delay));
+ RV1126_GMAC_M0_RXCLK_DLY_ENABLE |
+ RV1126_GMAC_M0_TXCLK_DLY_ENABLE |
+ RV1126_GMAC_M1_RXCLK_DLY_ENABLE |
+ RV1126_GMAC_M1_TXCLK_DLY_ENABLE);
regmap_write(bsp_priv->grf, RV1126_GRF_GMAC_CON1,
- DELAY_VALUE(RV1126, tx_delay, rx_delay));
+ RV1126_GMAC_M0_CLK_RX_DL_CFG(rx_delay) |
+ RV1126_GMAC_M0_CLK_TX_DL_CFG(tx_delay));
regmap_write(bsp_priv->grf, RV1126_GRF_GMAC_CON2,
- DELAY_VALUE(RV1126, tx_delay, rx_delay));
+ RV1126_GMAC_M1_CLK_RX_DL_CFG(rx_delay) |
+ RV1126_GMAC_M1_CLK_TX_DL_CFG(tx_delay));
}
static void rv1126_set_to_rmii(struct rk_priv_data *bsp_priv)
@@ -1657,6 +1584,50 @@
.set_rgmii_speed = rv1126_set_rgmii_speed,
.set_rmii_speed = rv1126_set_rmii_speed,
};
+
+#define RK_GRF_MACPHY_CON0 0xb00
+#define RK_GRF_MACPHY_CON1 0xb04
+#define RK_GRF_MACPHY_CON2 0xb08
+#define RK_GRF_MACPHY_CON3 0xb0c
+
+#define RK_MACPHY_ENABLE GRF_BIT(0)
+#define RK_MACPHY_DISABLE GRF_CLR_BIT(0)
+#define RK_MACPHY_CFG_CLK_50M GRF_BIT(14)
+#define RK_GMAC2PHY_RMII_MODE (GRF_BIT(6) | GRF_CLR_BIT(7))
+#define RK_GRF_CON2_MACPHY_ID HIWORD_UPDATE(0x1234, 0xffff, 0)
+#define RK_GRF_CON3_MACPHY_ID HIWORD_UPDATE(0x35, 0x3f, 0)
+
+static void rk_gmac_integrated_phy_powerup(struct rk_priv_data *priv)
+{
+ if (priv->ops->integrated_phy_powerup)
+ priv->ops->integrated_phy_powerup(priv);
+
+ regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_CFG_CLK_50M);
+ regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_GMAC2PHY_RMII_MODE);
+
+ regmap_write(priv->grf, RK_GRF_MACPHY_CON2, RK_GRF_CON2_MACPHY_ID);
+ regmap_write(priv->grf, RK_GRF_MACPHY_CON3, RK_GRF_CON3_MACPHY_ID);
+
+ if (priv->phy_reset) {
+ /* PHY needs to be disabled before trying to reset it */
+ regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE);
+ if (priv->phy_reset)
+ reset_control_assert(priv->phy_reset);
+ usleep_range(10, 20);
+ if (priv->phy_reset)
+ reset_control_deassert(priv->phy_reset);
+ usleep_range(10, 20);
+ regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_ENABLE);
+ msleep(30);
+ }
+}
+
+static void rk_gmac_integrated_phy_powerdown(struct rk_priv_data *priv)
+{
+ regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE);
+ if (priv->phy_reset)
+ reset_control_assert(priv->phy_reset);
+}
static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat)
{
@@ -1777,23 +1748,15 @@
if (!IS_ERR(bsp_priv->pclk_xpcs))
clk_prepare_enable(bsp_priv->pclk_xpcs);
- if (bsp_priv->ops && bsp_priv->ops->set_clock_selection)
- bsp_priv->ops->set_clock_selection(bsp_priv, bsp_priv->clock_input,
- true);
-
/**
* if (!IS_ERR(bsp_priv->clk_mac))
* clk_prepare_enable(bsp_priv->clk_mac);
*/
- usleep_range(100, 200);
+ mdelay(5);
bsp_priv->clk_enabled = true;
}
} else {
if (bsp_priv->clk_enabled) {
- if (bsp_priv->ops && bsp_priv->ops->set_clock_selection)
- bsp_priv->ops->set_clock_selection(bsp_priv, bsp_priv->clock_input,
- false);
-
if (phy_iface == PHY_INTERFACE_MODE_RMII) {
clk_disable_unprepare(bsp_priv->mac_clk_rx);
@@ -1890,7 +1853,7 @@
ret = of_property_read_u32(dev->of_node, "tx_delay", &value);
if (ret) {
- bsp_priv->tx_delay = -1;
+ bsp_priv->tx_delay = 0x30;
dev_err(dev, "Can not read property: tx_delay.");
dev_err(dev, "set tx_delay to 0x%x\n",
bsp_priv->tx_delay);
@@ -1901,7 +1864,7 @@
ret = of_property_read_u32(dev->of_node, "rx_delay", &value);
if (ret) {
- bsp_priv->rx_delay = -1;
+ bsp_priv->rx_delay = 0x10;
dev_err(dev, "Can not read property: rx_delay.");
dev_err(dev, "set rx_delay to 0x%x\n",
bsp_priv->rx_delay);
@@ -1915,11 +1878,14 @@
bsp_priv->xpcs = syscon_regmap_lookup_by_phandle(dev->of_node,
"rockchip,xpcs");
if (!IS_ERR(bsp_priv->xpcs)) {
- bsp_priv->comphy = devm_of_phy_get(&pdev->dev, dev->of_node, NULL);
- if (IS_ERR(bsp_priv->comphy)) {
- bsp_priv->comphy = NULL;
+ struct phy *comphy;
+
+ comphy = devm_of_phy_get(&pdev->dev, dev->of_node, NULL);
+ if (IS_ERR(comphy))
dev_err(dev, "devm_of_phy_get error\n");
- }
+ ret = phy_init(comphy);
+ if (ret)
+ dev_err(dev, "phy_init error\n");
}
if (plat->phy_node) {
@@ -1961,17 +1927,17 @@
case PHY_INTERFACE_MODE_RGMII_ID:
dev_info(dev, "init for RGMII_ID\n");
if (bsp_priv->ops && bsp_priv->ops->set_to_rgmii)
- bsp_priv->ops->set_to_rgmii(bsp_priv, -1, -1);
+ bsp_priv->ops->set_to_rgmii(bsp_priv, 0, 0);
break;
case PHY_INTERFACE_MODE_RGMII_RXID:
dev_info(dev, "init for RGMII_RXID\n");
if (bsp_priv->ops && bsp_priv->ops->set_to_rgmii)
- bsp_priv->ops->set_to_rgmii(bsp_priv, bsp_priv->tx_delay, -1);
+ bsp_priv->ops->set_to_rgmii(bsp_priv, bsp_priv->tx_delay, 0);
break;
case PHY_INTERFACE_MODE_RGMII_TXID:
dev_info(dev, "init for RGMII_TXID\n");
if (bsp_priv->ops && bsp_priv->ops->set_to_rgmii)
- bsp_priv->ops->set_to_rgmii(bsp_priv, -1, bsp_priv->rx_delay);
+ bsp_priv->ops->set_to_rgmii(bsp_priv, 0, bsp_priv->rx_delay);
break;
case PHY_INTERFACE_MODE_RMII:
dev_info(dev, "init for RMII\n");
@@ -1980,23 +1946,11 @@
break;
case PHY_INTERFACE_MODE_SGMII:
dev_info(dev, "init for SGMII\n");
- ret = phy_init(bsp_priv->comphy);
- if (ret) {
- dev_err(dev, "phy_init error: %d\n", ret);
- return ret;
- }
-
if (bsp_priv->ops && bsp_priv->ops->set_to_sgmii)
bsp_priv->ops->set_to_sgmii(bsp_priv);
break;
case PHY_INTERFACE_MODE_QSGMII:
dev_info(dev, "init for QSGMII\n");
- ret = phy_init(bsp_priv->comphy);
- if (ret) {
- dev_err(dev, "phy_init error: %d\n", ret);
- return ret;
- }
-
if (bsp_priv->ops && bsp_priv->ops->set_to_qsgmii)
bsp_priv->ops->set_to_qsgmii(bsp_priv);
break;
@@ -2013,6 +1967,9 @@
pm_runtime_enable(dev);
pm_runtime_get_sync(dev);
+ if (bsp_priv->integrated_phy)
+ rk_gmac_integrated_phy_powerup(bsp_priv);
+
return 0;
}
@@ -2020,9 +1977,8 @@
{
struct device *dev = &gmac->pdev->dev;
- if (gmac->phy_iface == PHY_INTERFACE_MODE_SGMII ||
- gmac->phy_iface == PHY_INTERFACE_MODE_QSGMII)
- phy_exit(gmac->comphy);
+ if (gmac->integrated_phy)
+ rk_gmac_integrated_phy_powerdown(gmac);
pm_runtime_put_sync(dev);
pm_runtime_disable(dev);
@@ -2049,26 +2005,11 @@
bsp_priv->ops->set_rmii_speed(bsp_priv, speed);
break;
case PHY_INTERFACE_MODE_SGMII:
- if (bsp_priv->ops && bsp_priv->ops->set_sgmii_speed)
- bsp_priv->ops->set_sgmii_speed(bsp_priv, speed);
case PHY_INTERFACE_MODE_QSGMII:
break;
default:
dev_err(dev, "unsupported interface %d", bsp_priv->phy_iface);
}
-}
-
-static int rk_integrated_phy_power(void *priv, bool up)
-{
- struct rk_priv_data *bsp_priv = priv;
-
- if (!bsp_priv->integrated_phy || !bsp_priv->ops ||
- !bsp_priv->ops->integrated_phy_power)
- return 0;
-
- bsp_priv->ops->integrated_phy_power(bsp_priv, up);
-
- return 0;
}
void dwmac_rk_set_rgmii_delayline(struct stmmac_priv *priv,
@@ -2109,17 +2050,24 @@
{
}
+static unsigned char macaddr[6];
+extern ssize_t at24_mac_read(unsigned char* addr);
void rk_get_eth_addr(void *priv, unsigned char *addr)
{
struct rk_priv_data *bsp_priv = priv;
struct device *dev = &bsp_priv->pdev->dev;
- unsigned char ethaddr[ETH_ALEN * MAX_ETH] = {0};
- int ret, id = bsp_priv->bus_id;
+ int i;
+ //unsigned char ethaddr[ETH_ALEN * MAX_ETH] = {0};
+ //int ret, id = bsp_priv->bus_id;
+ //ben
+ printk("nk-debug:enter rk_get_eth_addr.. \n");
+
+ #if 0
rk_devinfo_get_eth_mac(addr);
if (is_valid_ether_addr(addr))
goto out;
-
+
if (id < 0 || id >= MAX_ETH) {
dev_err(dev, "%s: Invalid ethernet bus id %d\n", __func__, id);
return;
@@ -2146,7 +2094,35 @@
} else {
memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN);
}
+ #endif
+
+ #if 0
+ macaddr[0] = 0xee;
+ macaddr[1] = 0x31;
+ macaddr[2] = 0x32;
+ macaddr[3] = 0x33;
+ macaddr[4] = 0x34;
+ macaddr[5] = 0x35;
+
+ memcpy(addr, macaddr, 6);
+ #endif
+
+ #if 1
+ if (at24_mac_read(macaddr) > 0) {
+ printk("ben %s: at24_mac_read Success!! \n", __func__);
+ memcpy(addr, macaddr, 6);
+ printk("Read the Ethernet MAC address from :");
+ for (i = 0; i < 5; i++)
+ printk("%2.2x:", addr[i]);
+
+ printk("%2.2x\n", addr[i]);
+ } else {
+ printk("ben %s: at24_mac_read Failed!! \n", __func__);
+ goto out;
+ }
+ #endif
+
out:
dev_err(dev, "%s: mac address: %pM\n", __func__, addr);
}
@@ -2158,6 +2134,7 @@
const struct rk_gmac_ops *data;
int ret;
+ printk("nk-debug:enter rk_gmac_probe 1.. \n");
data = of_device_get_match_data(&pdev->dev);
if (!data) {
dev_err(&pdev->dev, "no of match data provided\n");
@@ -2177,7 +2154,6 @@
plat_dat->fix_mac_speed = rk_fix_speed;
plat_dat->get_eth_addr = rk_get_eth_addr;
- plat_dat->integrated_phy_power = rk_integrated_phy_power;
plat_dat->bsp_priv = rk_gmac_setup(pdev, plat_dat, data);
if (IS_ERR(plat_dat->bsp_priv)) {
@@ -2185,6 +2161,7 @@
goto err_remove_config_dt;
}
+ printk("nk-debug:enter rk_gmac_probe 2.. \n");
ret = rk_gmac_clk_init(plat_dat);
if (ret)
goto err_remove_config_dt;
@@ -2254,45 +2231,19 @@
static SIMPLE_DEV_PM_OPS(rk_gmac_pm_ops, rk_gmac_suspend, rk_gmac_resume);
static const struct of_device_id rk_gmac_dwmac_match[] = {
-#ifdef CONFIG_CPU_PX30
{ .compatible = "rockchip,px30-gmac", .data = &px30_ops },
-#endif
-#ifdef CONFIG_CPU_RK1808
{ .compatible = "rockchip,rk1808-gmac", .data = &rk1808_ops },
-#endif
-#ifdef CONFIG_CPU_RK312X
{ .compatible = "rockchip,rk3128-gmac", .data = &rk3128_ops },
-#endif
-#ifdef CONFIG_CPU_RK322X
{ .compatible = "rockchip,rk3228-gmac", .data = &rk3228_ops },
-#endif
-#ifdef CONFIG_CPU_RK3288
{ .compatible = "rockchip,rk3288-gmac", .data = &rk3288_ops },
-#endif
-#ifdef CONFIG_CPU_RK3308
{ .compatible = "rockchip,rk3308-mac", .data = &rk3308_ops },
-#endif
-#ifdef CONFIG_CPU_RK3328
{ .compatible = "rockchip,rk3328-gmac", .data = &rk3328_ops },
-#endif
-#ifdef CONFIG_CPU_RK3366
{ .compatible = "rockchip,rk3366-gmac", .data = &rk3366_ops },
-#endif
-#ifdef CONFIG_CPU_RK3368
{ .compatible = "rockchip,rk3368-gmac", .data = &rk3368_ops },
-#endif
-#ifdef CONFIG_CPU_RK3399
{ .compatible = "rockchip,rk3399-gmac", .data = &rk3399_ops },
-#endif
-#ifdef CONFIG_CPU_RK3568
{ .compatible = "rockchip,rk3568-gmac", .data = &rk3568_ops },
-#endif
-#ifdef CONFIG_CPU_RV110X
{ .compatible = "rockchip,rv1108-gmac", .data = &rv1108_ops },
-#endif
-#ifdef CONFIG_CPU_RV1126
{ .compatible = "rockchip,rv1126-gmac", .data = &rv1126_ops },
-#endif
{ }
};
MODULE_DEVICE_TABLE(of, rk_gmac_dwmac_match);
@@ -2306,7 +2257,8 @@
.of_match_table = rk_gmac_dwmac_match,
},
};
-module_platform_driver(rk_gmac_dwmac_driver);
+//module_platform_driver(rk_gmac_dwmac_driver);
+ module_platform_driver1(rk_gmac_dwmac_driver);
MODULE_AUTHOR("Chen-Zhi (Roger Chen) <roger.chen@rock-chips.com>");
MODULE_DESCRIPTION("Rockchip RK3288 DWMAC specific glue layer");
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
index 1a84cf4..184ca13 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
@@ -86,10 +86,10 @@
#define LPI_CTRL_STATUS_TLPIEN 0x00000001 /* Transmit LPI Entry */
/* GMAC HW ADDR regs */
-#define GMAC_ADDR_HIGH(reg) ((reg > 15) ? 0x00000800 + (reg - 16) * 8 : \
- 0x00000040 + (reg * 8))
-#define GMAC_ADDR_LOW(reg) ((reg > 15) ? 0x00000804 + (reg - 16) * 8 : \
- 0x00000044 + (reg * 8))
+#define GMAC_ADDR_HIGH(reg) (((reg > 15) ? 0x00000800 : 0x00000040) + \
+ (reg * 8))
+#define GMAC_ADDR_LOW(reg) (((reg > 15) ? 0x00000804 : 0x00000044) + \
+ (reg * 8))
#define GMAC_MAX_PERFECT_ADDRESSES 1
#define GMAC_PCS_BASE 0x000000c0 /* PCS register base */
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index da5d9e5..bc8871e 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -715,7 +715,6 @@
x->mac_gmii_rx_proto_engine++;
}
-#ifdef CONFIG_STMMAC_FULL
const struct stmmac_ops dwmac4_ops = {
.core_init = dwmac4_core_init,
.set_mac = stmmac_set_mac,
@@ -746,7 +745,6 @@
.debug = dwmac4_debug,
.set_filter = dwmac4_set_filter,
};
-#endif
const struct stmmac_ops dwmac410_ops = {
.core_init = dwmac4_core_init,
@@ -779,7 +777,6 @@
.set_filter = dwmac4_set_filter,
};
-#ifdef CONFIG_STMMAC_FULL
const struct stmmac_ops dwmac510_ops = {
.core_init = dwmac4_core_init,
.set_mac = stmmac_dwmac4_set_mac,
@@ -815,7 +812,6 @@
.rxp_config = dwmac5_rxp_config,
.flex_pps_config = dwmac5_flex_pps_config,
};
-#endif
int dwmac4_setup(struct stmmac_priv *priv)
{
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
index 232efe1..edb6053 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
@@ -119,23 +119,6 @@
ioaddr + DMA_CHAN_INTR_ENA(chan));
}
-static void dwmac410_dma_init_channel(void __iomem *ioaddr,
- struct stmmac_dma_cfg *dma_cfg, u32 chan)
-{
- u32 value;
-
- /* common channel control register config */
- value = readl(ioaddr + DMA_CHAN_CONTROL(chan));
- if (dma_cfg->pblx8)
- value = value | DMA_BUS_MODE_PBL;
-
- writel(value, ioaddr + DMA_CHAN_CONTROL(chan));
-
- /* Mask interrupts by writing to CSR7 */
- writel(DMA_CHAN_INTR_DEFAULT_MASK_4_10,
- ioaddr + DMA_CHAN_INTR_ENA(chan));
-}
-
static void dwmac4_dma_init(void __iomem *ioaddr,
struct stmmac_dma_cfg *dma_cfg, int atds)
{
@@ -214,7 +197,7 @@
u32 channel, int fifosz, u8 qmode)
{
unsigned int rqs = fifosz / 256 - 1;
- u32 mtl_rx_op;
+ u32 mtl_rx_op, mtl_rx_int;
mtl_rx_op = readl(ioaddr + MTL_CHAN_RX_OP_MODE(channel));
@@ -285,6 +268,11 @@
}
writel(mtl_rx_op, ioaddr + MTL_CHAN_RX_OP_MODE(channel));
+
+ /* Enable MTL RX overflow */
+ mtl_rx_int = readl(ioaddr + MTL_CHAN_INT_CTRL(channel));
+ writel(mtl_rx_int | MTL_RX_OVERFLOW_INT_EN,
+ ioaddr + MTL_CHAN_INT_CTRL(channel));
}
static void dwmac4_dma_tx_chan_op_mode(void __iomem *ioaddr, int mode,
@@ -473,7 +461,7 @@
const struct stmmac_dma_ops dwmac410_dma_ops = {
.reset = dwmac4_dma_reset,
.init = dwmac4_dma_init,
- .init_chan = dwmac410_dma_init_channel,
+ .init_chan = dwmac4_dma_init_channel,
.init_rx_chan = dwmac4_dma_init_rx_chan,
.init_tx_chan = dwmac4_dma_init_tx_chan,
.axi = dwmac4_dma_axi,
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
index 3246190..49f5687 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
@@ -63,6 +63,10 @@
value &= ~DMA_CONTROL_ST;
writel(value, ioaddr + DMA_CHAN_TX_CONTROL(chan));
+
+ value = readl(ioaddr + GMAC_CONFIG);
+ value &= ~GMAC_CONFIG_TE;
+ writel(value, ioaddr + GMAC_CONFIG);
}
void dwmac4_dma_start_rx(void __iomem *ioaddr, u32 chan)
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/hwif.c b/kernel/drivers/net/ethernet/stmicro/stmmac/hwif.c
index c6b88cd..357309a 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/hwif.c
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/hwif.c
@@ -23,7 +23,6 @@
return reg & GENMASK(7, 0);
}
-#ifdef CONFIG_STMMAC_FULL
static void stmmac_dwmac_mode_quirk(struct stmmac_priv *priv)
{
struct mac_device_info *mac = priv->hw;
@@ -69,7 +68,6 @@
stmmac_dwmac_mode_quirk(priv);
return 0;
}
-#endif
static const struct stmmac_hwif_entry {
bool gmac;
@@ -80,16 +78,13 @@
const void *desc;
const void *dma;
const void *mac;
-#ifdef CONFIG_STMMAC_PTP
const void *hwtimestamp;
-#endif
const void *mode;
const void *tc;
int (*setup)(struct stmmac_priv *priv);
int (*quirks)(struct stmmac_priv *priv);
} stmmac_hw[] = {
/* NOTE: New HW versions shall go to the end of this table */
-#ifdef CONFIG_STMMAC_FULL
{
.gmac = false,
.gmac4 = false,
@@ -102,9 +97,7 @@
.desc = NULL,
.dma = &dwmac100_dma_ops,
.mac = &dwmac100_ops,
-#ifdef CONFIG_STMMAC_PTP
.hwtimestamp = &stmmac_ptp,
-#endif
.mode = NULL,
.tc = NULL,
.setup = dwmac100_setup,
@@ -121,9 +114,7 @@
.desc = NULL,
.dma = &dwmac1000_dma_ops,
.mac = &dwmac1000_ops,
-#ifdef CONFIG_STMMAC_PTP
.hwtimestamp = &stmmac_ptp,
-#endif
.mode = NULL,
.tc = NULL,
.setup = dwmac1000_setup,
@@ -140,9 +131,7 @@
.desc = &dwmac4_desc_ops,
.dma = &dwmac4_dma_ops,
.mac = &dwmac4_ops,
-#ifdef CONFIG_STMMAC_PTP
.hwtimestamp = &stmmac_ptp,
-#endif
.mode = NULL,
.tc = NULL,
.setup = dwmac4_setup,
@@ -159,16 +148,12 @@
.desc = &dwmac4_desc_ops,
.dma = &dwmac4_dma_ops,
.mac = &dwmac410_ops,
-#ifdef CONFIG_STMMAC_PTP
.hwtimestamp = &stmmac_ptp,
-#endif
.mode = &dwmac4_ring_mode_ops,
.tc = NULL,
.setup = dwmac4_setup,
.quirks = NULL,
- },
-#endif /* CONFIG_STMMAC_FULL */
- {
+ }, {
.gmac = false,
.gmac4 = true,
.xgmac = false,
@@ -180,16 +165,12 @@
.desc = &dwmac4_desc_ops,
.dma = &dwmac410_dma_ops,
.mac = &dwmac410_ops,
-#ifdef CONFIG_STMMAC_PTP
.hwtimestamp = &stmmac_ptp,
-#endif
.mode = &dwmac4_ring_mode_ops,
.tc = NULL,
.setup = dwmac4_setup,
.quirks = NULL,
- },
-#ifdef CONFIG_STMMAC_FULL
- {
+ }, {
.gmac = false,
.gmac4 = true,
.xgmac = false,
@@ -201,9 +182,7 @@
.desc = &dwmac4_desc_ops,
.dma = &dwmac410_dma_ops,
.mac = &dwmac510_ops,
-#ifdef CONFIG_STMMAC_PTP
.hwtimestamp = &stmmac_ptp,
-#endif
.mode = &dwmac4_ring_mode_ops,
.tc = &dwmac510_tc_ops,
.setup = dwmac4_setup,
@@ -220,15 +199,12 @@
.desc = &dwxgmac210_desc_ops,
.dma = &dwxgmac210_dma_ops,
.mac = &dwxgmac210_ops,
-#ifdef CONFIG_STMMAC_PTP
.hwtimestamp = &stmmac_ptp,
-#endif
.mode = NULL,
.tc = NULL,
.setup = dwxgmac2_setup,
.quirks = NULL,
},
-#endif
};
int stmmac_hwif_init(struct stmmac_priv *priv)
@@ -288,9 +264,7 @@
mac->desc = mac->desc ? : entry->desc;
mac->dma = mac->dma ? : entry->dma;
mac->mac = mac->mac ? : entry->mac;
-#ifdef CONFIG_STMMAC_PTP
mac->ptp = mac->ptp ? : entry->hwtimestamp;
-#endif
mac->mode = mac->mode ? : entry->mode;
mac->tc = mac->tc ? : entry->tc;
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index 1eaa1f8..f9b42b0 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -217,27 +217,10 @@
int stmmac_mdio_unregister(struct net_device *ndev);
int stmmac_mdio_register(struct net_device *ndev);
int stmmac_mdio_reset(struct mii_bus *mii);
-
-#ifdef CONFIG_STMMAC_ETHTOOL
void stmmac_set_ethtool_ops(struct net_device *netdev);
-#else
-static inline void stmmac_set_ethtool_ops(struct net_device *netdev)
-{
-}
-#endif
-#ifdef CONFIG_STMMAC_PTP
void stmmac_ptp_register(struct stmmac_priv *priv);
void stmmac_ptp_unregister(struct stmmac_priv *priv);
-#else
-static inline void stmmac_ptp_register(struct stmmac_priv *priv)
-{
-}
-
-static inline void stmmac_ptp_unregister(struct stmmac_priv *priv)
-{
-}
-#endif
int stmmac_resume(struct device *dev);
int stmmac_suspend(struct device *dev);
int stmmac_dvr_remove(struct device *dev);
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c b/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
index 08a058e..e1fbd7c 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
@@ -159,20 +159,15 @@
static void get_systime(void __iomem *ioaddr, u64 *systime)
{
- u64 ns, sec0, sec1;
+ u64 ns;
- /* Get the TSS value */
- sec1 = readl_relaxed(ioaddr + PTP_STSR);
- do {
- sec0 = sec1;
- /* Get the TSSS value */
- ns = readl_relaxed(ioaddr + PTP_STNSR);
- /* Get the TSS value */
- sec1 = readl_relaxed(ioaddr + PTP_STSR);
- } while (sec0 != sec1);
+ /* Get the TSSS value */
+ ns = readl(ioaddr + PTP_STNSR);
+ /* Get the TSS and convert sec time value to nanosecond */
+ ns += readl(ioaddr + PTP_STSR) * 1000000000ULL;
if (systime)
- *systime = ns + (sec1 * 1000000000ULL);
+ *systime = ns;
}
const struct stmmac_hwtimestamp stmmac_ptp = {
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 0511062..29bffa7 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -228,7 +228,7 @@
priv->clk_csr = STMMAC_CSR_100_150M;
else if ((clk_rate >= CSR_F_150M) && (clk_rate < CSR_F_250M))
priv->clk_csr = STMMAC_CSR_150_250M;
- else if ((clk_rate >= CSR_F_250M) && (clk_rate <= CSR_F_300M))
+ else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M))
priv->clk_csr = STMMAC_CSR_250_300M;
}
@@ -508,7 +508,6 @@
}
}
-#ifdef CONFIG_STMMAC_PTP
/**
* stmmac_hwtstamp_set - control hardware timestamping.
* @dev: device pointer.
@@ -761,7 +760,6 @@
return copy_to_user(ifr->ifr_data, config,
sizeof(*config)) ? -EFAULT : 0;
}
-#endif /* CONFIG_STMMAC_PTP */
/**
* stmmac_init_ptp - init PTP
@@ -802,7 +800,7 @@
static void stmmac_release_ptp(struct stmmac_priv *priv)
{
- if (priv->plat->clk_ptp_ref && IS_ENABLED(CONFIG_STMMAC_PTP))
+ if (priv->plat->clk_ptp_ref)
clk_disable_unprepare(priv->plat->clk_ptp_ref);
stmmac_ptp_unregister(priv);
}
@@ -936,6 +934,23 @@
}
}
+static void rtl8211F_led_control(struct phy_device *phydev)
+{
+ printk("ben debug:rtl8211F_led_control...1 \n");
+
+ if(!phydev) return;
+ if(phydev->phy_id!=0x001cc916) return; /* only for 8211E*/
+
+ /*switch to extension page44*/
+ phy_write(phydev, 31, 0x0d04);
+//add hc 1000M --> orange
+// 100M --> green
+ phy_write(phydev, 16, 0x6D02);
+//add hc 1000M&100M --> green
+// phy_write(phydev, 16, 0x6C0A);
+ printk("ben debug:rtl8211F_led_control...2 \n");
+}
+
/**
* stmmac_init_phy - PHY initialization
* @dev: net device structure
@@ -956,9 +971,6 @@
priv->oldlink = false;
priv->speed = SPEED_UNKNOWN;
priv->oldduplex = DUPLEX_UNKNOWN;
-
- if (priv->plat->integrated_phy_power)
- priv->plat->integrated_phy_power(priv->plat->bsp_priv, true);
if (priv->plat->phy_node) {
phydev = of_phy_connect(dev, priv->plat->phy_node,
@@ -1020,6 +1032,9 @@
phydev->irq = PHY_POLL;
phy_attached_info(phydev);
+
+ //add ben
+ rtl8211F_led_control(phydev);
return 0;
}
@@ -2159,7 +2174,8 @@
*/
static void stmmac_check_ether_addr(struct stmmac_priv *priv)
{
- if (!is_valid_ether_addr(priv->dev->dev_addr)) {
+ //if (!is_valid_ether_addr(priv->dev->dev_addr)) {
+ if (1) {
stmmac_get_umac_addr(priv, priv->hw, priv->dev->dev_addr, 0);
if (likely(priv->plat->get_eth_addr))
priv->plat->get_eth_addr(priv->plat->bsp_priv,
@@ -2552,7 +2568,7 @@
stmmac_mmc_setup(priv);
- if (IS_ENABLED(CONFIG_STMMAC_PTP) && init_ptp) {
+ if (init_ptp) {
ret = clk_prepare_enable(priv->plat->clk_ptp_ref);
if (ret < 0)
netdev_warn(priv->dev, "failed to enable PTP reference clock: %d\n", ret);
@@ -2594,8 +2610,7 @@
{
struct stmmac_priv *priv = netdev_priv(dev);
- if (IS_ENABLED(CONFIG_STMMAC_PTP))
- clk_disable_unprepare(priv->plat->clk_ptp_ref);
+ clk_disable_unprepare(priv->plat->clk_ptp_ref);
}
/**
@@ -2733,9 +2748,6 @@
if (dev->phydev) {
phy_stop(dev->phydev);
phy_disconnect(dev->phydev);
- if (priv->plat->integrated_phy_power)
- priv->plat->integrated_phy_power(priv->plat->bsp_priv,
- false);
}
stmmac_disable_all_queues(priv);
@@ -2766,8 +2778,7 @@
netif_carrier_off(dev);
- if (IS_ENABLED(CONFIG_STMMAC_PTP))
- stmmac_release_ptp(priv);
+ stmmac_release_ptp(priv);
return 0;
}
@@ -3746,6 +3757,7 @@
/* To handle GMAC own interrupts */
if ((priv->plat->has_gmac) || xmac) {
int status = stmmac_host_irq_status(priv, priv->hw, &priv->xstats);
+ int mtl_status;
if (unlikely(status)) {
/* For LPI we need to save the tx status */
@@ -3756,8 +3768,17 @@
}
for (queue = 0; queue < queues_count; queue++) {
- status = stmmac_host_mtl_irq_status(priv, priv->hw,
- queue);
+ struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
+
+ mtl_status = stmmac_host_mtl_irq_status(priv, priv->hw,
+ queue);
+ if (mtl_status != -EINVAL)
+ status |= mtl_status;
+
+ if (status & CORE_IRQ_MTL_RX_OVERFLOW)
+ stmmac_set_rx_tail_ptr(priv, priv->ioaddr,
+ rx_q->rx_tail_addr,
+ queue);
}
/* PCS link status */
@@ -3811,14 +3832,12 @@
return -EINVAL;
ret = phy_mii_ioctl(dev->phydev, rq, cmd);
break;
-#ifdef CONFIG_STMMAC_PTP
case SIOCSHWTSTAMP:
ret = stmmac_hwtstamp_set(dev, rq);
break;
case SIOCGHWTSTAMP:
ret = stmmac_hwtstamp_get(dev, rq);
break;
-#endif
default:
break;
}
@@ -4565,13 +4584,10 @@
stmmac_pmt(priv, priv->hw, priv->wolopts);
priv->irq_wake = 1;
} else {
- if (priv->plat->integrated_phy_power)
- priv->plat->integrated_phy_power(priv->plat->bsp_priv,
- false);
stmmac_mac_set(priv, priv->ioaddr, false);
pinctrl_pm_select_sleep_state(priv->device);
/* Disable clock in case of PWM is off */
- if (priv->plat->clk_ptp_ref && IS_ENABLED(CONFIG_STMMAC_PTP))
+ if (priv->plat->clk_ptp_ref)
clk_disable_unprepare(priv->plat->clk_ptp_ref);
clk_disable_unprepare(priv->plat->pclk);
clk_disable_unprepare(priv->plat->stmmac_clk);
@@ -4608,8 +4624,6 @@
tx_q->cur_tx = 0;
tx_q->dirty_tx = 0;
tx_q->mss = 0;
-
- netdev_tx_reset_queue(netdev_get_tx_queue(priv->dev, queue));
}
}
@@ -4627,6 +4641,7 @@
if (!netif_running(ndev))
return 0;
+ printk("troy test %s start .... \n",__func__);
/* Power Down bit, into the PM register, is cleared
* automatically as soon as a magic packet or a Wake-up frame
* is received. Anyway, it's better to manually clear
@@ -4643,14 +4658,11 @@
/* enable the clk previously disabled */
clk_prepare_enable(priv->plat->stmmac_clk);
clk_prepare_enable(priv->plat->pclk);
- if (priv->plat->clk_ptp_ref && IS_ENABLED(CONFIG_STMMAC_PTP))
+ if (priv->plat->clk_ptp_ref)
clk_prepare_enable(priv->plat->clk_ptp_ref);
/* reset the phy so that it's ready */
if (priv->mii)
stmmac_mdio_reset(priv->mii);
- if (priv->plat->integrated_phy_power)
- priv->plat->integrated_phy_power(priv->plat->bsp_priv,
- true);
}
mutex_lock(&priv->lock);
@@ -4672,6 +4684,8 @@
if (ndev->phydev)
phy_start(ndev->phydev);
+ printk("troy test %s end .... \n",__func__);
+ rtl8211F_led_control(ndev->phydev);
return 0;
}
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 9d47311..46f8754 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -469,14 +469,6 @@
plat->pmt = 1;
}
- if (of_device_is_compatible(np, "snps,dwmac-3.40a")) {
- plat->has_gmac = 1;
- plat->enh_desc = 1;
- plat->tx_coe = 1;
- plat->bugged_jumbo = 1;
- plat->pmt = 1;
- }
-
if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
of_device_is_compatible(np, "snps,dwmac-4.10a") ||
of_device_is_compatible(np, "snps,dwmac-4.20a")) {
diff --git a/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c b/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c
index cc1895a..37c0bc6 100644
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c
+++ b/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c
@@ -314,12 +314,7 @@
priv->plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
} else if (!qopt->enable) {
- ret = stmmac_dma_qmode(priv, priv->ioaddr, queue,
- MTL_QUEUE_DCB);
- if (ret)
- return ret;
-
- priv->plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
+ return stmmac_dma_qmode(priv, priv->ioaddr, queue, MTL_QUEUE_DCB);
}
/* Port Transmit Rate and Speed Divider */
diff --git a/kernel/include/linux/device.h b/kernel/include/linux/device.h
index d91fe50..6a7b0c5 100644
--- a/kernel/include/linux/device.h
+++ b/kernel/include/linux/device.h
@@ -1711,6 +1711,17 @@
} \
module_exit(__driver##_exit);
+#define module_driver1(__driver, __register, __unregister, ...) \
+static int __init __driver##_init(void) \
+{ \
+ return __register(&(__driver) , ##__VA_ARGS__); \
+} \
+arch_initcall(__driver##_init); \
+static void __exit __driver##_exit(void) \
+{ \
+ __unregister(&(__driver) , ##__VA_ARGS__); \
+} \
+module_exit(__driver##_exit);
/**
* builtin_driver() - Helper macro for drivers that don't do anything
* special in init and have no exit. This eliminates some boilerplate.
diff --git a/kernel/include/linux/platform_device.h b/kernel/include/linux/platform_device.h
index 1de7ea6..67d1bca 100644
--- a/kernel/include/linux/platform_device.h
+++ b/kernel/include/linux/platform_device.h
@@ -234,6 +234,10 @@
module_driver(__platform_driver, platform_driver_register, \
platform_driver_unregister)
+#define module_platform_driver1(__platform_driver) \
+ module_driver1(__platform_driver, platform_driver_register, \
+ platform_driver_unregister)
+
/* builtin_platform_driver() - Helper macro for builtin drivers that
* don't do anything special in driver init. This eliminates some
* boilerplate. Each driver may only use this macro once, and
diff --git a/rockdev/parameter.txt b/rockdev/parameter.txt
new file mode 120000
index 0000000..442e7fd
--- /dev/null
+++ b/rockdev/parameter.txt
@@ -0,0 +1 @@
+../device/rockchip/rk356x/parameter-buildroot-fit.txt
\ No newline at end of file
--
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