From 796a7ef0befd21e25c2b9e42f53a6d7a4421941d Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Tue, 14 Feb 2023 03:09:06 +0000
Subject: [PATCH] add nk_io at24_eeprom driver
---
kernel/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi | 10
kernel/drivers/misc/nkmcu/nk_mcu.c | 161 +
kernel/drivers/misc/Makefile | 2
kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dts | 8
kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi | 562 +++++
kernel/drivers/misc/nkio/nk_io_core.c_suspend | 1882 ++++++++++++++++++
kernel/drivers/misc/nkio/nkio.h | 36
kernel/drivers/misc/nkio/Kconfig | 15
kernel/drivers/misc/nkio/Makefile | 1
mk-rootfs.sh | 50
kernel/drivers/misc/nkio/mcu/jw_mcu.c | 866 ++++++++
kernel/drivers/misc/nkio/mcu/jw_mcu_isp.c | 238 ++
kernel/arch/arm64/configs/rockchip_linux_defconfig | 6
kernel/drivers/misc/nkio/mcu/Kconfig | 12
kernel/drivers/misc/nkio/mcu/jw_mcu.h | 85
kernel/drivers/misc/nkio/mcu/jw_mcu_isp.h | 12
kernel/drivers/misc/nkmcu/Makefile | 1
kernel/drivers/misc/nkio/mcu/Makefile | 5
kernel/drivers/misc/nkio/nk_io_core.c | 622 ++++++
kernel/drivers/misc/nkio/mcu/jw_mcu_isp.dat | 1606 +++++++++++++++
20 files changed, 6,175 insertions(+), 5 deletions(-)
diff --git a/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dts b/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dts
new file mode 100644
index 0000000..34b6829
--- /dev/null
+++ b/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+#include "NK-R36S0.dtsi"
+#include "rk3568-android.dtsi"
diff --git a/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi b/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
new file mode 100755
index 0000000..0d47eea
--- /dev/null
+++ b/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
@@ -0,0 +1,562 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk3568.dtsi"
+#include "rk3568-evb.dtsi"
+
+/ {
+ model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
+ compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
+
+ rk_headset: rk-headset {
+ compatible = "rockchip_headset";
+ headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_det>;
+ };
+
+ vcc2v5_sys: vcc2v5-ddr {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc2v5-sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ vcc3v3_vga: vcc3v3-vga {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_vga";
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ pcie30_avdd0v9: pcie30-avdd0v9 {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie30_avdd0v9";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ pcie30_avdd1v8: pcie30-avdd1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie30_avdd1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ vcc3v3_pcie: gpio-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <5000>;
+ vin-supply = <&dc_12v>;
+ };
+
+ vcc3v3_bu: vcc3v3-bu {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_bu";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_camera: vcc-camera-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&camera_pwr>;
+ regulator-name = "vcc_camera";
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+
+ };
+
+ nk_io_init {
+ compatible = "nk_io_control";
+ hub_host2_5v_gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; //USB_HOST_PWREN_H_GPIO0_A6
+ usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; //USB_EN_OC_GPIO0_A5
+ lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
+ lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
+ vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
+ hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
+ hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
+// hub_host3_5V_rest_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
+ vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
+ vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
+ en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
+ reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
+ air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
+ wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
+
+ edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
+ edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; //7511_GPIO0-GPIO3_D2
+ edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; //7511_GPIO1-GPIO3_D3
+ edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; //7511_GPIO2-GPIO3_D4
+ edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; //7511_GPIO3-GPIO3_D5
+ edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
+// tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
+// vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
+
+ wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
+
+ // pinctrl-names = "default";
+// pinctrl-0 = <&nk_io_gpio>;
+ nodka_lvds = <9>;
+ };
+
+
+};
+
+&combphy0_us {
+ status = "okay";
+};
+
+&combphy1_usq {
+ status = "okay";
+};
+
+&combphy2_psq {
+ status = "okay";
+};
+
+&csi2_dphy_hw {
+ status = "okay";
+};
+
+&csi2_dphy0 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi_in_ucam0: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&ucam_out0>;
+ data-lanes = <1 2 3 4>;
+ };
+ mipi_in_ucam1: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&gc8034_out>;
+ data-lanes = <1 2 3 4>;
+ };
+ mipi_in_ucam2: endpoint@3 {
+ reg = <3>;
+ remote-endpoint = <&ov5695_out>;
+ data-lanes = <1 2>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csidphy_out: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&isp0_in>;
+ };
+ };
+ };
+};
+
+/*
+ * video_phy0 needs to be enabled
+ * when dsi0 is enabled
+ */
+&dsi0 {
+ status = "okay";
+};
+
+&dsi0_in_vp0 {
+ status = "disabled";
+};
+
+&dsi0_in_vp1 {
+ status = "okay";
+};
+
+&dsi0_panel {
+ power-supply = <&vcc3v3_lcd0_n>;
+};
+
+/*
+ * video_phy1 needs to be enabled
+ * when dsi1 is enabled
+ */
+&dsi1 {
+ status = "disabled";
+};
+
+&dsi1_in_vp0 {
+ status = "disabled";
+};
+
+&dsi1_in_vp1 {
+ status = "disabled";
+};
+
+&dsi1_panel {
+ power-supply = <&vcc3v3_lcd1_n>;
+};
+
+&edp {
+ hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&edp_phy {
+ status = "okay";
+};
+
+&edp_in_vp0 {
+ status = "okay";
+};
+
+&edp_in_vp1 {
+ status = "disabled";
+};
+
+&gmac0 {
+ phy-mode = "rgmii";
+ clock_in_out = "output";
+
+ snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ /* Reset time is 20ms, 100ms for rtl8211f */
+ snps,reset-delays-us = <0 20000 100000>;
+
+ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
+ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
+ assigned-clock-rates = <0>, <125000000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac0_miim
+ &gmac0_tx_bus2
+ &gmac0_rx_bus2
+ &gmac0_rgmii_clk
+ &gmac0_rgmii_bus>;
+
+ tx_delay = <0x3c>;
+ rx_delay = <0x2f>;
+
+ phy-handle = <&rgmii_phy0>;
+ status = "disabled";
+};
+
+&gmac1 {
+ phy-mode = "rgmii";
+ clock_in_out = "output";
+
+ snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ /* Reset time is 20ms, 100ms for rtl8211f */
+ snps,reset-delays-us = <0 20000 100000>;
+
+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
+ assigned-clock-rates = <0>, <125000000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac1m1_miim
+ &gmac1m1_tx_bus2
+ &gmac1m1_rx_bus2
+ &gmac1m1_rgmii_clk
+ &gmac1m1_rgmii_bus>;
+
+ tx_delay = <0x4f>;
+ rx_delay = <0x26>;
+
+ phy-handle = <&rgmii_phy1>;
+ status = "okay";
+};
+
+/*
+ * power-supply should switche to vcc3v3_lcd1_n
+ * when mipi panel is connected to dsi1.
+ */
+>1x {
+ power-supply = <&vcc3v3_lcd0_n>;
+};
+
+&i2c3 {
+ status = "okay";
+ //mac eeprom
+ eeprom@51 {
+ //compatible = "atmel,24c02";
+ compatible = "atmel,24c256";
+ reg = <0x51>;
+ };
+
+ //nk-mcu
+ nkmcu@15 {
+ compatible = "nk_mcu";
+ reg = <0x15>;
+ };
+
+
+
+};
+
+&i2c4 {
+ status = "okay";
+ gc8034: gc8034@37 {
+ compatible = "galaxycore,gc8034";
+ status = "okay";
+ reg = <0x37>;
+ clocks = <&cru CLK_CIF_OUT>;
+ clock-names = "xvclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&cif_clk>;
+ reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
+ pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
+ rockchip,grf = <&grf>;
+ power-domains = <&power RK3568_PD_VI>;
+ rockchip,camera-module-index = <0>;
+ rockchip,camera-module-facing = "back";
+ rockchip,camera-module-name = "RK-CMK-8M-2-v1";
+ rockchip,camera-module-lens-name = "CK8401";
+ port {
+ gc8034_out: endpoint {
+ remote-endpoint = <&mipi_in_ucam1>;
+ data-lanes = <1 2 3 4>;
+ };
+ };
+ };
+ os04a10: os04a10@36 {
+ compatible = "ovti,os04a10";
+ reg = <0x36>;
+ clocks = <&cru CLK_CIF_OUT>;
+ clock-names = "xvclk";
+ power-domains = <&power RK3568_PD_VI>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cif_clk>;
+ reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
+ pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
+ rockchip,camera-module-index = <0>;
+ rockchip,camera-module-facing = "back";
+ rockchip,camera-module-name = "CMK-OT1607-FV1";
+ rockchip,camera-module-lens-name = "M12-40IRC-4MP-F16";
+ port {
+ ucam_out0: endpoint {
+ remote-endpoint = <&mipi_in_ucam0>;
+ data-lanes = <1 2 3 4>;
+ };
+ };
+ };
+ ov5695: ov5695@36 {
+ status = "okay";
+ compatible = "ovti,ov5695";
+ reg = <0x36>;
+ clocks = <&cru CLK_CIF_OUT>;
+ clock-names = "xvclk";
+ power-domains = <&power RK3568_PD_VI>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cif_clk>;
+ reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
+ pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
+ rockchip,camera-module-index = <0>;
+ rockchip,camera-module-facing = "back";
+ rockchip,camera-module-name = "TongJu";
+ rockchip,camera-module-lens-name = "CHT842-MD";
+ port {
+ ov5695_out: endpoint {
+ remote-endpoint = <&mipi_in_ucam2>;
+ data-lanes = <1 2>;
+ };
+ };
+ };
+};
+
+&mdio0 {
+ rgmii_phy0: phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x0>;
+ };
+};
+
+&mdio1 {
+ rgmii_phy1: phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x0>;
+ };
+};
+
+&video_phy0 {
+ status = "okay";
+};
+
+&video_phy1 {
+ status = "disabled";
+};
+
+&pcie30phy {
+ status = "okay";
+};
+
+&pcie3x2 {
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie>;
+ status = "okay";
+};
+
+&pinctrl {
+ cam {
+ camera_pwr: camera-pwr {
+ rockchip,pins =
+ /* camera power en */
+ <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+ headphone {
+ hp_det: hp-det {
+ rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ wireless-wlan {
+ wifi_host_wake_irq: wifi-host-wake-irq {
+ rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ wireless-bluetooth {
+ uart8_gpios: uart8-gpios {
+ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ nk_io_gpio: nk_io_gpio_col{
+ rockchip,pins =
+ <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>,
+ <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
+ <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
+ <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+};
+
+&rkisp {
+ status = "okay";
+};
+
+&rkisp_mmu {
+ status = "okay";
+};
+
+&rkisp_vir0 {
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ isp0_in: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&csidphy_out>;
+ };
+ };
+};
+
+&route_dsi0 {
+ status = "okay";
+ connect = <&vp1_out_dsi0>;
+};
+
+&route_edp {
+ status = "okay";
+ connect = <&vp0_out_edp>;
+};
+
+&sata2 {
+ status = "okay";
+};
+
+&sdmmc2 {
+ max-frequency = <150000000>;
+ supports-sdio;
+ bus-width = <4>;
+ disable-wp;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
+&spdif_8ch {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spdifm1_tx>;
+};
+
+&uart8 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
+};
+
+&vcc3v3_lcd0_n {
+ gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+};
+
+&vcc3v3_lcd1_n {
+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+};
+
+&wireless_wlan {
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_host_wake_irq>;
+ WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
+};
+
+&wireless_bluetooth {
+ compatible = "bluetooth-platdata";
+ clocks = <&rk809 1>;
+ clock-names = "ext_clock";
+ //wifi-bt-power-toggle;
+ uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default", "rts_gpio";
+ pinctrl-0 = <&uart8m0_rtsn>;
+ pinctrl-1 = <&uart8_gpios>;
+ BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
+ BT,wake_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
+ BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
diff --git a/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi b/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi
index 86ac12f..ac300ae 100644
--- a/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi
+++ b/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi
@@ -161,8 +161,8 @@
leds: leds {
compatible = "gpio-leds";
- work_led: work {
- gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
+ sys_led: sys_led {
+ gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
@@ -289,7 +289,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
- gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
@@ -1539,9 +1539,9 @@
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
- vccio4-supply = <&vcc_3v3>;
+ vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_3v3>;
- vccio6-supply = <&vcc_3v3>;
+ vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
diff --git a/kernel/arch/arm64/configs/rockchip_linux_defconfig b/kernel/arch/arm64/configs/rockchip_linux_defconfig
index 85155be..17cfcce 100644
--- a/kernel/arch/arm64/configs/rockchip_linux_defconfig
+++ b/kernel/arch/arm64/configs/rockchip_linux_defconfig
@@ -127,6 +127,7 @@
CONFIG_BLK_DEV_RAM_COUNT=1
CONFIG_BLK_DEV_NVME=y
CONFIG_SRAM=y
+CONFIG_EEPROM_AT24=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=y
CONFIG_SCSI_SCAN_ASYNC=y
@@ -250,6 +251,9 @@
CONFIG_SPI_ROCKCHIP=y
CONFIG_SPI_SPIDEV=y
CONFIG_PINCTRL_RK805=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIOLIB_FASTPATH_LIMIT=512
+CONFIG_OF_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_POWER_AVS=y
@@ -455,7 +459,9 @@
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_IS31FL32XX=y
+CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_HYM8563=y
CONFIG_RTC_DRV_RK808=y
diff --git a/kernel/drivers/misc/Makefile b/kernel/drivers/misc/Makefile
index 341233a..f516b9a 100644
--- a/kernel/drivers/misc/Makefile
+++ b/kernel/drivers/misc/Makefile
@@ -62,3 +62,5 @@
obj-$(CONFIG_UID_SYS_STATS) += uid_sys_stats.o
obj-$(CONFIG_PIR_ASCHIP) += pir-aschip.o
obj-$(CONFIG_RK803) += rk803.o
+obj-y += nkio/
+obj-y += nkmcu/
diff --git a/kernel/drivers/misc/nkio/Kconfig b/kernel/drivers/misc/nkio/Kconfig
new file mode 100755
index 0000000..2b3219c
--- /dev/null
+++ b/kernel/drivers/misc/nkio/Kconfig
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Headset device configuration
+#
+
+menu "jw io init support"
+
+config JW_IO
+ tristate "JW IO INIT"
+ ---help---
+
+source "drivers/jwio/mcu/Kconfig"
+
+endmenu
+
diff --git a/kernel/drivers/misc/nkio/Makefile b/kernel/drivers/misc/nkio/Makefile
new file mode 100755
index 0000000..47f3554
--- /dev/null
+++ b/kernel/drivers/misc/nkio/Makefile
@@ -0,0 +1 @@
+obj-y += nk_io_core.o
diff --git a/kernel/drivers/misc/nkio/mcu/Kconfig b/kernel/drivers/misc/nkio/mcu/Kconfig
new file mode 100755
index 0000000..61eea69
--- /dev/null
+++ b/kernel/drivers/misc/nkio/mcu/Kconfig
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Headset device configuration
+#
+
+menu "jw mcu init support"
+
+config JW_MCU
+ tristate "JW_MCU init"
+
+endmenu
+
diff --git a/kernel/drivers/misc/nkio/mcu/Makefile b/kernel/drivers/misc/nkio/mcu/Makefile
new file mode 100755
index 0000000..d738779
--- /dev/null
+++ b/kernel/drivers/misc/nkio/mcu/Makefile
@@ -0,0 +1,5 @@
+
+
+obj-$(CONFIG_JW_MCU) += jw_mcu.o
+obj-$(CONFIG_JW_MCU) += jw_mcu_isp.o
+
diff --git a/kernel/drivers/misc/nkio/mcu/jw_mcu.c b/kernel/drivers/misc/nkio/mcu/jw_mcu.c
new file mode 100755
index 0000000..9465dbc
--- /dev/null
+++ b/kernel/drivers/misc/nkio/mcu/jw_mcu.c
@@ -0,0 +1,866 @@
+/* drivers/rtc/rtc-jwwdt.c - driver for jwwdt
+ *
+ * Copyright (C) 2010 ROCKCHIP, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/of_gpio.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/tlv.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/initval.h>
+#include <linux/proc_fs.h>
+#include <linux/gpio.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include "jw_mcu.h"
+#include <linux/reboot.h>
+
+
+struct i2c_client *gClient = NULL;
+struct device_node *node_MCU = NULL;
+struct device *dev_MCU= NULL;
+unsigned int mcu_watchdog_gpio;
+struct delayed_work watchdog_delay_work;
+#define WATCHDOG_FEED_COUNT 2000
+
+
+
+//ison s
+#if 0
+static int Mcu_i2c_writes(const struct i2c_client *client,
+ const char reg, const char *buf, int count)
+{
+ struct i2c_adapter *adap=client->adapter;
+ struct i2c_msg msg;
+ int ret;
+ char *tx_buf = (char *)kmalloc(count + 1, GFP_KERNEL);
+ if(!tx_buf)
+ return -ENOMEM;
+ tx_buf[0] = reg;
+ memcpy(tx_buf+1, buf, count);
+
+ msg.addr = client->addr;
+ msg.flags = client->flags;
+ msg.len = count + 1;
+ msg.buf = (char *)tx_buf;
+ //msg.scl_rate = 100*1000;
+
+ ret = i2c_transfer(adap, &msg, 1);
+ kfree(tx_buf);
+ return (ret == 1) ? count : ret;
+
+}
+
+static int Mcu_i2c_reads(const struct i2c_client *client,
+ const char reg, char *buf, int count)
+{
+ struct i2c_adapter *adap=client->adapter;
+ struct i2c_msg msgs[2];
+ int ret;
+ char reg_buf = reg;
+
+ msgs[0].addr = client->addr;
+ msgs[0].flags = client->flags;
+ msgs[0].len = 1;
+ msgs[0].buf = ®_buf;
+ //msgs[0].scl_rate = 100*1000;
+
+ msgs[1].addr = client->addr;
+ msgs[1].flags = client->flags | I2C_M_RD;
+ msgs[1].len = count;
+ msgs[1].buf = (char *)buf;
+ //msgs[1].scl_rate = 100*1000;
+
+ ret = i2c_transfer(adap, msgs, 2);
+
+ return (ret == 2)? count : ret;
+}
+#endif
+
+static int Mcu_i2c_writeregister(struct i2c_client *i2c, char reg, int count, const u8 src)
+{
+ int ret=-1;
+
+ struct i2c_adapter *adap;
+ struct i2c_msg msg;
+ char tx_buf[2];
+
+ if(!i2c)
+ return -EINVAL;
+ if (count != 1)
+ return -EIO;
+
+ adap = i2c->adapter;
+ tx_buf[0] = reg;
+ tx_buf[1] = src;
+
+ msg.addr = i2c->addr;
+ msg.buf = &tx_buf[0];
+ msg.len = 1 +1;
+ msg.flags = i2c->flags;
+ //msg.scl_rate = 100*1000;
+
+ ret = i2c_transfer(adap, &msg, 1);
+ return ret;
+}
+
+
+
+static int Mcu_i2c_readregister(struct i2c_client *i2c, char reg, int count, u8 *dest)
+{
+ int ret;
+ struct i2c_adapter *adap;
+ struct i2c_msg msgs[2];
+
+ if(!i2c)
+ return -EINVAL;
+
+ if (count != 1)
+ return -EIO;
+
+ adap = i2c->adapter;
+
+ msgs[0].addr = i2c->addr;
+ msgs[0].buf = ®
+ msgs[0].flags = i2c->flags;
+ msgs[0].len = 1;
+ //msgs[0].scl_rate = 100*1000;
+
+ msgs[1].buf = (u8 *)dest;
+ msgs[1].addr = i2c->addr;
+ msgs[1].flags = i2c->flags | I2C_M_RD;
+ msgs[1].len = 1;
+ //msgs[1].scl_rate = 100*1000;
+ ret = i2c_transfer(adap, msgs, 2);
+
+ //printk("***run in %s %d msgs[1].buf = %d\n",__FUNCTION__,__LINE__,*(msgs[1].buf));
+
+ return ret;
+}
+
+//ison e
+
+uint8_t get_value_func_cfg(uint8_t func, uint8_t value)
+{
+ uint8_t data = 0;
+ CORE_REG_FUNCTION *value_func;
+ CORE_REG_FUNCTION1 *value_func1;
+ value_func = (CORE_REG_FUNCTION *)&value;
+ value_func1 = (CORE_REG_FUNCTION1 *)&value;
+ if(func < 100 || func > CORE_FUNC_MAX)
+ return 0;
+ switch(func){
+ case CORE_FUNC_ALARM:
+ data = value_func->bit.alarmWakeup;
+ break;
+ case CORE_FUNC_WDT:
+ data = value_func->bit.watchdog;
+ break;
+ case CORE_FUNC_IRDA:
+ data = value_func->bit.irdaWakeup;
+ break;
+ case CORE_FUNC_NET_WK:
+ data = value_func->bit.net_wakeup;
+ break;
+ case CORE_FUNC_CEC:
+ data = value_func->bit.hdmi_cec;
+ break;
+ case CORE_FUNC_POWER_LOSS:
+ data = value_func->bit.powerloss;
+ break;
+ case CORE_FUNC_USB_CHARGER:
+ data = value_func->bit.usbCharger;
+ break;
+ case CORE_FUNC_LAST_STATE:
+ data = value_func1->bit.last_state;
+ break;
+ case CORE_FUNC_PWR_WK_EN:
+ data = value_func1->bit.pwr_wk_en;
+ case CORE_FUNC_PWR_OFF_EN:
+ data = value_func1->bit.pwr_opwer_en;
+ default:
+ break;
+ }
+ return data;
+}
+
+uint8_t set_value_func_cfg(uint8_t func, uint8_t value,uint8_t value_data)
+{
+ uint8_t data = 0;
+ CORE_REG_FUNCTION *value_func;
+ CORE_REG_FUNCTION1 *value_func1;
+ value_func = (CORE_REG_FUNCTION *)&value;
+ value_func1 = (CORE_REG_FUNCTION1 *)&value;
+ if(func < 100 || func > CORE_FUNC_MAX)
+ return 0;
+ switch(func){
+ case CORE_FUNC_POWER_LOSS:
+ value_func->bit.powerloss = value_data;
+ break;
+ case CORE_FUNC_WDT:
+ value_func->bit.watchdog = value_data;
+ break;
+ case CORE_FUNC_ALARM:
+ value_func->bit.alarmWakeup = value_data;
+ break;
+ case CORE_FUNC_PWR_WK_EN:
+ value_func1->bit.pwr_wk_en = value_data;
+ break;
+ case CORE_FUNC_PWR_OFF_EN:
+ value_func1->bit.pwr_opwer_en = value_data;
+ break;
+ default:
+ break;
+ }
+ data = *((uint8_t *)value_func);
+ return data;
+}
+
+
+//add spirit class s------------------------
+#if 1
+
+static ssize_t mcu_driver_version(struct class *cls,
+ struct class_attribute *attr,
+ char *buf)
+{
+ u8 newversion=0x04; //if MCU firmware need to update ,set newversion to latest MCU firmware version
+
+ return snprintf(buf, 4, "%02x\n",newversion);
+}
+
+static ssize_t spirit_version(struct class *cls,
+ struct class_attribute *attr,
+ char *buf)
+{
+ int ret = 0;
+ u8 read_mcu_id = 0;
+ ret = Mcu_i2c_readregister(gClient, CORE_FW_VERSION, 1,&read_mcu_id);
+ if (ret < 0) {
+ printk("jw_mcu read fail\n");
+ return -EINVAL;
+ }
+ printk("spirit_version = %d ------------ison\n",read_mcu_id);
+
+ return snprintf(buf, 4, "%02x\n",read_mcu_id);
+}
+
+static void MCU_UPDATE(void){
+ int ret = 0;
+ u8 tmp ;
+
+ tmp=1;
+ ret = Mcu_i2c_writeregister(gClient, CORE_FW_UPDATE, 1, tmp);
+ if (ret < 0) {
+ printk("Mcu_i2c_writeregister fail\n");
+ return;
+ }
+ msleep(100);
+ kernel_restart(NULL);
+ printk("CORE_FW_UPDATE ret = %d ------------ison\n",ret);
+
+}
+
+static ssize_t set_mcu_update(struct class *cls,
+ struct class_attribute *attr,
+ const char *buf, size_t size)
+{
+ u32 enable;
+ sscanf(buf, "%d", &enable);
+ printk("Spirit UPDATE enable =%d----ison\n",enable);
+ if (enable)
+ {
+ printk("Spirit UPDATE------ISON\n");
+ MCU_UPDATE();
+ }
+ return size;
+}
+#endif
+static ssize_t get_mcu_state_autopower(struct class *class,struct class_attribute *attr, char *buf)
+{
+ int ret = 0;
+ u8 autopower_state=0;
+ ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1, &autopower_state);
+ if (ret < 0) {
+ printk("Mcu_i2c_readregister fail\n");
+ return -1;
+ }
+ printk("get_autopower autopower_reg = %d ------------ison\n",autopower_state);
+ if(get_value_func_cfg(CORE_FUNC_POWER_LOSS,autopower_state)){
+ autopower_state = 1;
+ }else{
+ autopower_state = 0;
+ }
+ printk("get_autopower autopower_state = %d ------------ison\n",autopower_state);
+ return snprintf(buf, 3, "%02x\n",autopower_state);
+}
+
+static void MCU_EnableAutopower(void){
+ int ret = 0;
+ u8 tmp ;
+ u8 autopower_state=0;
+ ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1, &autopower_state);
+ if (ret < 0) {
+ printk("Mcu_i2c_readregister fail\n");
+ return;
+ }
+ tmp = set_value_func_cfg(CORE_FUNC_POWER_LOSS,autopower_state,1);
+ ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG0, 1, tmp);
+ if (ret < 0) {
+ printk("Mcu_i2c_writeregister fail\n");
+ return;
+ }
+ msleep(10);
+ printk("EnableAutopower ret = %d ------------ison\n",ret);
+
+}
+
+static void MCU_disableAutopower(void){
+ int ret = 0;
+ u8 tmp ;
+ u8 autopower_state=0;
+ ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1, &autopower_state);
+ if (ret < 0) {
+ printk("Mcu_i2c_readregister fail\n");
+ return;
+ }
+ tmp = set_value_func_cfg(CORE_FUNC_POWER_LOSS,autopower_state,0);
+ ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG0, 1, tmp);
+ if (ret < 0) {
+ printk("Mcu_i2c_writeregister fail\n");
+ return;
+ }
+ msleep(10);
+ printk("disableAutopower ret = %d ------------ison\n",ret);
+
+}
+
+static ssize_t set_mcu_enable_autopower(struct class *cls,
+ struct class_attribute *attr,
+ const char *buf, size_t size)
+{
+ u32 enable;
+ sscanf(buf, "%d", &enable);
+ printk("set_autopower enable =%d----ison\n",enable);
+ if (enable)
+ {
+ //printk("set_mcu_enable_autopower ENABLE------ISON\n");
+ MCU_EnableAutopower();
+ }
+ else {
+ MCU_disableAutopower();
+ //printk("set_mcu_enable_autopower DISABLE------ISON\n");
+ }
+ return size;
+}
+
+static ssize_t get_mcu_state_watchdog(struct class *class,struct class_attribute *attr, char *buf)
+{
+ int ret = 0;
+ u8 watchdog_state=0;
+ ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1, &watchdog_state);
+ if (ret < 0) {
+ printk("Mcu_i2c_readregister fail\n");
+ return -1;
+ }
+ printk("get_watchdog watchdog_state = %d ------------ison\n",watchdog_state);
+ if(get_value_func_cfg(CORE_FUNC_WDT,watchdog_state)){
+ watchdog_state = 1;
+ }else{
+ watchdog_state = 0;
+ }
+ printk("get_watchdog watchdog_state = %d ------------ison\n",watchdog_state);
+ return snprintf(buf, 3, "%02x\n",watchdog_state);
+}
+
+static void MCU_EnableWatchdog(void){
+ int ret = 0;
+ u8 tmp ;
+ u8 watchdog_state=0;
+ ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1, &watchdog_state);
+ if (ret < 0) {
+ printk("Mcu_i2c_readregister fail\n");
+ return;
+ }
+ tmp = set_value_func_cfg(CORE_FUNC_WDT,watchdog_state,1);
+ ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG0, 1, tmp);
+ if (ret < 0) {
+ printk("Mcu_i2c_writeregister fail\n");
+ return;
+ }
+ msleep(10);
+ printk("EnableWatchdog ret = %d ------------ison\n",ret);
+
+}
+
+static void MCU_disableWatchdog(void){
+ int ret = 0;
+ u8 tmp ;
+ u8 watchdog_state=0;
+ ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1, &watchdog_state);
+ if (ret < 0) {
+ printk("Mcu_i2c_readregister fail\n");
+ return;
+ }
+ tmp = set_value_func_cfg(CORE_FUNC_WDT,watchdog_state,0);
+ ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG0, 1, tmp);
+ if (ret < 0) {
+ printk("Mcu_i2c_writeregister fail\n");
+ return;
+ }
+ msleep(10);
+ printk("disableWatchdog ret = %d ------------ison\n",ret);
+
+}
+
+static void watchdog_work(void){
+ int ret;
+
+ ret = gpio_direction_output(mcu_watchdog_gpio, 1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input mcu_watchdog_gpio set ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(mcu_watchdog_gpio, 0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input mcu_watchdog_gpio set ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(mcu_watchdog_gpio, 1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input mcu_watchdog_gpio set ERROR\n", __FUNCTION__);
+ }
+
+}
+
+static void watchdog_timer_work(struct work_struct *work)
+{
+ watchdog_work();
+ schedule_delayed_work(&watchdog_delay_work, msecs_to_jiffies(WATCHDOG_FEED_COUNT));
+}
+
+
+void watchdog_init(void){
+ int ret = 0;
+ enum of_gpio_flags flags;
+ ret = of_get_named_gpio_flags(node_MCU, "mcu_watchdog_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property mcu_watchdog_gpio\n", __FUNCTION__);
+ } else {
+ mcu_watchdog_gpio = ret;
+ ret = devm_gpio_request(dev_MCU, mcu_watchdog_gpio, "mcu_watchdog_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request mcu_watchdog_gpio request ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(mcu_watchdog_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input mcu_watchdog_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+ INIT_DELAYED_WORK(&watchdog_delay_work, watchdog_timer_work);
+ schedule_delayed_work(&watchdog_delay_work, msecs_to_jiffies(WATCHDOG_FEED_COUNT));
+}
+
+static ssize_t set_mcu_enable_watchdog(struct class *cls,
+ struct class_attribute *attr,
+ const char *buf, size_t size)
+{
+ u32 enable;
+ sscanf(buf, "%d", &enable);
+ printk("set_autopower enable =%d----\n",enable);
+ if (enable)
+ {
+ printk("set_mcu_enable_autopower ENABLE------\n");
+ MCU_EnableWatchdog();
+
+
+ schedule_delayed_work(&watchdog_delay_work, msecs_to_jiffies(WATCHDOG_FEED_COUNT));
+
+ }
+ else {
+ MCU_disableWatchdog();
+ schedule_delayed_work(&watchdog_delay_work, msecs_to_jiffies(0));
+
+
+ printk("set_mcu_enable_autopower DISABLE------\n");
+ }
+ return size;
+}
+
+static ssize_t set_watchdog_test(struct class *cls,
+ struct class_attribute *attr,
+ const char *buf, size_t size)
+{
+ u32 enable;
+ sscanf(buf, "%d", &enable);
+ printk("set_watchdog_test enable =%d----ison\n",enable);
+ if (enable)
+ {
+ //printk("set_mcu_enable_autopower ENABLE------ISON\n");
+ schedule_delayed_work(&watchdog_delay_work, msecs_to_jiffies(WATCHDOG_FEED_COUNT));
+ }
+ else {
+ cancel_delayed_work(&watchdog_delay_work);
+ //printk("set_mcu_enable_autopower DISABLE------ISON\n");
+ }
+ return size;
+}
+
+static ssize_t get_mcu_state_rtcpower(struct class *class,struct class_attribute *attr, char *buf)
+{
+ int ret = 0;
+ u8 rtcpower_state=0;
+ ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1, &rtcpower_state);
+ if (ret < 0) {
+ printk("Mcu_i2c_readregister fail\n");
+ return -1;
+ }
+ printk("get_rtcpower rtcpower_state = %d ------------ison\n",rtcpower_state);
+ if(get_value_func_cfg(CORE_FUNC_ALARM,rtcpower_state)){
+ rtcpower_state = 1;
+ }else{
+ rtcpower_state = 0;
+ }
+ printk("get_rtcpower rtcpower_state = %d ------------ison\n",rtcpower_state);
+ return snprintf(buf, 3, "%02x\n",rtcpower_state);
+}
+
+static void MCU_EnableRtcpower(void){
+ int ret = 0;
+ u8 tmp ;
+ u8 rtcpower_state=0;
+ ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1, &rtcpower_state);
+ if (ret < 0) {
+ printk("Mcu_i2c_readregister fail\n");
+ return;
+ }
+ tmp = set_value_func_cfg(CORE_FUNC_ALARM,rtcpower_state,1);
+ ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG0, 1, tmp);
+ if (ret < 0) {
+ printk("Mcu_i2c_writeregister fail\n");
+ return;
+ }
+ msleep(10);
+ printk("EnableRtcpower ret = %d ------------ison\n",ret);
+
+}
+
+static void MCU_disableRtcpower(void){
+ int ret = 0;
+ u8 tmp ;
+ u8 rtcpower_state=0;
+ ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG0, 1, &rtcpower_state);
+ if (ret < 0) {
+ printk("Mcu_i2c_readregister fail\n");
+ return;
+ }
+ tmp = set_value_func_cfg(CORE_FUNC_ALARM,rtcpower_state,0);
+ ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG0, 1, tmp);
+ if (ret < 0) {
+ printk("Mcu_i2c_writeregister fail\n");
+ return;
+ }
+ msleep(10);
+ printk("disableRtcpower ret = %d ------------ison\n",ret);
+
+}
+
+static ssize_t set_mcu_enable_rtcpower(struct class *cls,
+ struct class_attribute *attr,
+ const char *buf, size_t size)
+{
+ u32 enable;
+ sscanf(buf, "%d", &enable);
+ printk("set_rtcpower enable =%d----ison\n",enable);
+ if (enable)
+ {
+ //printk("set_mcu_enable_autopower ENABLE------ISON\n");
+ MCU_EnableRtcpower();
+ }
+ else {
+ MCU_disableRtcpower();
+ //printk("set_mcu_enable_autopower DISABLE------ISON\n");
+ }
+ return size;
+}
+
+static ssize_t get_mcu_state_ethwol(struct class *class,struct class_attribute *attr, char *buf)
+{
+ int ret = 0;
+ u8 ethwol_state=0;
+ ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG1, 1, ðwol_state);
+ if (ret < 0) {
+ printk("Mcu_i2c_readregister fail\n");
+ return -1;
+ }
+ printk("get_ethwol ethwol_state = %d ------------ison\n",ethwol_state);
+ if(get_value_func_cfg(CORE_FUNC_PWR_WK_EN,ethwol_state)){
+ ethwol_state = 1;
+ }else{
+ ethwol_state = 0;
+ }
+ printk("get_ethwol ethwol_state = %d ------------ison\n",ethwol_state);
+ return snprintf(buf, 3, "%02x\n",ethwol_state);
+}
+
+static void MCU_EnableEthwol(void){
+ int ret = 0;
+ u8 tmp ;
+ u8 ethwol_state=0;
+ ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG1, 1, ðwol_state);
+ if (ret < 0) {
+ printk("Mcu_i2c_readregister fail\n");
+ return;
+ }
+ tmp = set_value_func_cfg(CORE_FUNC_PWR_WK_EN,ethwol_state,1);
+ ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG1, 1, tmp);
+ if (ret < 0) {
+ printk("Mcu_i2c_writeregister fail\n");
+ return;
+ }
+ msleep(10);
+ printk("EnableEthwol ret = %d ------------ison\n",ret);
+
+}
+
+static void MCU_disableEthwol(void){
+ int ret = 0;
+ u8 tmp ;
+ u8 ethwol_state=0;
+ ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG1, 1, ðwol_state);
+ if (ret < 0) {
+ printk("Mcu_i2c_readregister fail\n");
+ return;
+ }
+ tmp = set_value_func_cfg(CORE_FUNC_PWR_WK_EN,ethwol_state,0);
+ ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG1, 1, tmp);
+ if (ret < 0) {
+ printk("Mcu_i2c_writeregister fail\n");
+ return;
+ }
+ msleep(10);
+ printk("disableEthwol ret = %d ------------ison\n",ret);
+
+}
+
+static ssize_t set_mcu_enable_ethwol(struct class *cls,
+ struct class_attribute *attr,
+ const char *buf, size_t size)
+{
+ u32 enable;
+ sscanf(buf, "%d", &enable);
+ printk("set_ethwol enable =%d----ison\n",enable);
+ if (enable)
+ {
+ //printk("set_mcu_enable_autopower ENABLE------ISON\n");
+ MCU_EnableEthwol();
+ }
+ else {
+ MCU_disableEthwol();
+ //printk("set_mcu_enable_autopower DISABLE------ISON\n");
+ }
+ return size;
+}
+
+
+static struct class *spirit_class;
+static CLASS_ATTR(Update, 0666, NULL, set_mcu_update);
+static CLASS_ATTR(SpiritEnableAutopower, 0666, get_mcu_state_autopower, set_mcu_enable_autopower);
+static CLASS_ATTR(Verison, 0666, mcu_driver_version, NULL);
+static CLASS_ATTR(SpiritVerison, 0666, spirit_version, NULL);
+static CLASS_ATTR(Watchdog, 0666, get_mcu_state_watchdog, set_mcu_enable_watchdog);
+static CLASS_ATTR(Watchdog_test, 0666, NULL, set_watchdog_test);
+static CLASS_ATTR(Rtcpower, 0666, get_mcu_state_rtcpower, set_mcu_enable_rtcpower);
+static CLASS_ATTR(EthWol, 0666, get_mcu_state_ethwol, set_mcu_enable_ethwol);
+
+
+//add spirit class e------------------------
+
+int jw_mcu_get_cc_status(u8 *role, u8 *direction){
+ u8 ret_role,ret_direction;
+ int ret;
+ ret = Mcu_i2c_readregister(gClient, CORE_ANX7411_CC_ROLE, 1,&ret_role);
+ if (ret < 0) {
+ printk("jw_mcu_get_cc_status read fail\n");
+ return -EINVAL;
+ }
+ ret = Mcu_i2c_readregister(gClient, CORE_ANX7411_CC_DIRECTION, 1,&ret_direction);
+ if (ret < 0) {
+ printk("jw_mcu_get_cc_status read fail\n");
+ return -EINVAL;
+ }
+ printk("jw_mcu_get_cc_status ret_role=%d,ret_direction=%d---ison\n",ret_role,ret_direction);
+ *role = ret_role;
+ *direction = ret_direction;
+ return ret;
+}
+
+
+void MCU_Set_EthPhyAddr(char *addr){
+ int ret = 0,i;
+ //u8 tmp =0;
+ char *addr_l = addr;
+ for(i = 0;i < 6;i++){
+ printk("MCU_Set_EthPhyAddr %d------------ison\n",addr_l[i]);
+ ret = Mcu_i2c_writeregister(gClient, CORE_ETH_PHY_ADDR0 + i, 1, addr_l[i]);
+ if (ret < 0) {
+ printk("Mcu_i2c_writeregister fail\n");
+ return;
+ }
+ }
+}
+///////////////andy add
+
+static int rtl8211_phy_power_off(struct notifier_block *this,
+ unsigned long code, void *unused)
+{
+ u8 ethwol_power=0,tmp;
+ int ret = 0;
+
+ if (code == SYS_POWER_OFF){
+ ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG1, 1,ðwol_power);
+ if (ret < 0) {
+ printk("Mcu_i2c_readregister fail\n");
+ return -1;
+ }
+ tmp = set_value_func_cfg(CORE_FUNC_PWR_OFF_EN,ethwol_power,0);
+ ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG1, 1, tmp);
+ if (ret < 0) {
+ printk("Mcu_i2c_writeregister fail\n");
+ return -1;
+ }
+ printk("write power off message to mcu ------------andy\n");
+ }
+ return NOTIFY_OK;
+}
+////////////////andy end
+static struct notifier_block rtl8211_phy_notifier = {
+ .notifier_call = rtl8211_phy_power_off,
+};
+
+
+static int jw_mcu_probe(struct i2c_client *client, const struct i2c_device_id *id)
+
+{
+ int ret = 0, err;
+ u8 read_mcu_id=0,ethwol_power=0,tmp;
+ //char tmp1[2];
+ //enum of_gpio_flags flags;
+ node_MCU = client->dev.of_node;
+ dev_MCU = &client->dev;
+ gClient = client;
+ printk("%s \n",__FUNCTION__);
+
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+ printk(KERN_ERR "jw_mcu_probe: need I2C_FUNC_I2C\n");
+ ret = -ENODEV;
+ }
+//ison s
+#if 1
+ ret=Mcu_i2c_readregister(client, CORE_FW_VERSION, 1,&read_mcu_id);
+ if (ret < 0) {
+ printk("jw_mcu read fail\n");
+ return -EINVAL;
+ }
+ printk("Mcu_i2c_readregister 1 read1 = %d ------------ison\n",read_mcu_id);
+#endif
+//ison e
+
+
+
+ spirit_class = class_create(THIS_MODULE, "spirit_class");
+ if (IS_ERR(spirit_class)) {
+ printk(KERN_ERR "Failed to create spirit_class\n");
+ spirit_class = NULL;
+ return -EINVAL;
+ }
+
+ ret = class_create_file(spirit_class, &class_attr_Update);
+ ret = class_create_file(spirit_class, &class_attr_SpiritEnableAutopower);
+ ret = class_create_file(spirit_class, &class_attr_Verison);
+ ret = class_create_file(spirit_class, &class_attr_SpiritVerison);
+ ret = class_create_file(spirit_class, &class_attr_Watchdog);
+ ret = class_create_file(spirit_class, &class_attr_Watchdog_test);
+ ret = class_create_file(spirit_class, &class_attr_Rtcpower);
+ ret = class_create_file(spirit_class, &class_attr_EthWol);
+
+ watchdog_init();
+
+ err = register_reboot_notifier(&rtl8211_phy_notifier);
+ if (err) {
+ printk("unable to register jw_mcu_probe reboot notifier\n");
+ }
+
+///////////////andy add
+ ret=Mcu_i2c_readregister(gClient, CORE_FUNC_CFG1, 1,ðwol_power);
+ if (ret < 0) {
+ printk("Mcu_i2c_readregister fail\n");
+ return -1;
+ }
+ tmp = set_value_func_cfg(CORE_FUNC_PWR_OFF_EN,ethwol_power,1);
+
+ ret = Mcu_i2c_writeregister(gClient, CORE_FUNC_CFG1, 1, tmp);
+ if (ret < 0) {
+ printk("Mcu_i2c_writeregister fail\n");
+ return -1;
+ }
+
+/////////////andy end
+
+ printk("%s: probe ok!!\n", __FUNCTION__);
+
+
+
+ return 0;
+
+}
+
+
+static const struct i2c_device_id jw_mcu_id[] = {
+ { "jw_mcu", 0 },
+ { }
+};
+
+static const struct of_device_id jw_mcu_of_match[] = {
+ { .compatible = "everest,jw_mcu", },
+ { }
+};
+MODULE_DEVICE_TABLE(of, jw_mcu_of_match);
+
+
+static struct i2c_driver jw_mcu_driver = {
+ .driver = {
+ .name = "jw_mcu",
+ .of_match_table = of_match_ptr(jw_mcu_of_match),
+ },
+ .probe = jw_mcu_probe,
+ .id_table = jw_mcu_id,
+ //.remove = __devexit_p(cec_input_control_remove),
+};
+
+module_i2c_driver(jw_mcu_driver);
+MODULE_AUTHOR("ison@jwele.com.cn");
+MODULE_DESCRIPTION("jw mcu driver");
+MODULE_LICENSE("GPL");
+
diff --git a/kernel/drivers/misc/nkio/mcu/jw_mcu.h b/kernel/drivers/misc/nkio/mcu/jw_mcu.h
new file mode 100755
index 0000000..446f2f5
--- /dev/null
+++ b/kernel/drivers/misc/nkio/mcu/jw_mcu.h
@@ -0,0 +1,85 @@
+
+/****************************RK3399 MINI58 Register Start***************************/
+#define REGISTER_MCU_VERSION 0x00
+
+
+typedef enum
+{
+ CORE_FW_VERSION = 0,
+ CORE_VID_LSB,
+ CORE_VID_MSB,
+ CORE_PID_LSB,
+ CORE_PID_MSB,
+ CORE_POWER_STATE,
+ CORE_FUNC_CFG0,
+ CORE_FUNC_CFG1,
+ CORE_FUNC_STATUS0,
+ CORE_FUNC_STATUS1,
+ CORE_RTC_TIME, //0xa
+ CORE_RTC_ALARM_TIME,
+ CORE_WDT_COUNT,
+ CORE_FW_UPDATE,
+ CORE_CEC_PHY_LSB,
+ CORE_CEC_PHY_MSB,
+ CORE_CEC_OSD_NAME, //0x10
+ CORE_NEW_FW_VERSION,
+ CORE_POWER_LEVEL,
+ CORE_ANX7411_CC_ROLE, //0x13
+ CORE_ANX7411_CC_DIRECTION, //0x14
+ CORE_ANX7411_HPD_STATUS, //0x15
+ CORE_ANX7411_DP_LANES, //0x16
+ CORE_ETH_PHY_ADDR0,
+ CORE_ETH_PHY_ADDR1,
+ CORE_ETH_PHY_ADDR2,
+ CORE_ETH_PHY_ADDR3,
+ CORE_ETH_PHY_ADDR4,
+ CORE_ETH_PHY_ADDR5,
+ CORE_REG_MAX
+} REGIST_CMD;
+
+typedef union
+ {
+ struct
+ {
+ uint8_t alarmWakeup:1; //bit 0
+ uint8_t watchdog:1;
+ uint8_t irdaWakeup:1;
+ uint8_t net_wakeup:1;
+ uint8_t hdmi_cec:1;
+ uint8_t powerloss:2;
+ uint8_t usbCharger:1;
+ } bit;
+ uint8_t reg_function;
+ } CORE_REG_FUNCTION;
+
+typedef union
+{
+ struct
+ {
+ uint8_t last_state:1;
+ uint8_t pwr_wk_en:1;
+ uint8_t pwr_opwer_en:1;
+ uint8_t reserved:5;
+ } bit;
+ uint8_t reg_function;
+} CORE_REG_FUNCTION1;
+
+typedef enum
+{
+ CORE_FUNC_ALARM = 100,
+ CORE_FUNC_WDT,
+ CORE_FUNC_IRDA,
+ CORE_FUNC_NET_WK,
+ CORE_FUNC_CEC,
+ CORE_FUNC_POWER_LOSS,
+ CORE_FUNC_USB_CHARGER,
+ CORE_FUNC_LAST_STATE,
+ CORE_FUNC_PWR_WK_EN,
+ CORE_FUNC_PWR_OFF_EN,
+ CORE_FUNC_MAX
+} REGIST_FUNC_FLAG;
+
+
+/****************************RK3399 MINI58 Regist end***************************/
+extern int jw_mcu_get_cc_status(u8 *role, u8 *direction);
+
diff --git a/kernel/drivers/misc/nkio/mcu/jw_mcu_isp.c b/kernel/drivers/misc/nkio/mcu/jw_mcu_isp.c
new file mode 100755
index 0000000..55e19a7
--- /dev/null
+++ b/kernel/drivers/misc/nkio/mcu/jw_mcu_isp.c
@@ -0,0 +1,238 @@
+/* drivers/rtc/rtc-jwwdt.c - driver for jwwdt
+ *
+ * Copyright (C) 2010 ROCKCHIP, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+//#define DEBUG
+//#define pr_fmt(fmt) "rtc: %s: " fmt, __func__
+//#include <mach/gpio.h>
+//#include <mach/iomux.h>
+//#include <mach/board.h>
+//#include <plat/board.h>
+
+
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/wakelock.h>
+#include <linux/slab.h>
+#include <linux/input.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/reboot.h>
+#include "jw_mcu_isp.h"
+#ifdef CONFIG_OF
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+#endif
+
+//----------------read bin s
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include <linux/vmalloc.h>
+#define ISP_FIRMWARE_FILE_SIZE (1024*12)
+//----------------read bin e
+
+static struct i2c_client *gClient_isp = NULL;
+struct device_node *node_MCU_isp = NULL;
+struct device *dev_MCU_isp= NULL;
+unsigned int pro_1=0;
+
+static unsigned char MCU_ISP_FIRMWARE[]={
+#include "jw_mcu_isp.dat"
+};
+
+
+static int Minix_Mcu_write_isp(struct i2c_client *i2c, char *buf,int count)
+{
+ int ret=-1;
+
+ struct i2c_adapter *adap;
+ struct i2c_msg msg;
+
+ if(!i2c)
+ return ret;
+ adap = i2c->adapter;
+
+ msg.addr = i2c->addr;
+ msg.buf =(char *)buf;
+ msg.len =count;
+ msg.flags = i2c->flags;
+
+ ret = i2c_transfer(adap, &msg, 1);
+ return ret;
+}
+
+static ssize_t minixIspUpdateState(struct class *cls,
+ struct class_attribute *attr,
+ char *buf)
+{
+ u8 state=1;
+ return snprintf(buf, 4, "%02x\n",state);
+}
+static struct class *minix_isp_class;
+
+static CLASS_ATTR(MCUIspState, 0666, minixIspUpdateState, NULL);
+
+static int isp_input_control_probe(struct i2c_client *client, const struct i2c_device_id *id)
+
+{
+
+ int ret = 0;
+ int i,lens;
+ int count_isp;
+ unsigned int pro=0;
+ unsigned char MCU_ISP_CMD[64];
+ node_MCU_isp = client->dev.of_node;
+ dev_MCU_isp = &client->dev;
+
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+ printk(KERN_ERR "isp_probe: need I2C_FUNC_I2C-----------ison\n");
+ ret = -ENODEV;
+ return ret;
+ }
+
+ gClient_isp = client;
+//--------------------------------read bin s
+count_isp = sizeof(MCU_ISP_FIRMWARE)/sizeof(char);
+printk("isp ret = %d-------------ison\n",count_isp);
+//----------------------------------------------------------------------
+memset(MCU_ISP_CMD,0,64);
+MCU_ISP_CMD[0] = CMD_UPDATE_APROM;
+ret = Minix_Mcu_write_isp(client, MCU_ISP_CMD, 64);
+if (ret < 0) {
+ printk("Minix_Mcu_write_isp fail CMD_UPDATE_APROM\n");
+ return -ENODEV;
+}
+
+msleep(500);
+
+memset(MCU_ISP_CMD,0,64);
+MCU_ISP_CMD[0] = CMD_UPDATE_APROM_DATA;
+MCU_ISP_CMD[1] = 0;
+MCU_ISP_CMD[2] = 0;
+MCU_ISP_CMD[3] = 0;
+
+for(i=4;i<64;i++){
+ MCU_ISP_CMD[i] = MCU_ISP_FIRMWARE[pro++];
+}
+
+ret = Minix_Mcu_write_isp(client, MCU_ISP_CMD, 64);
+if (ret < 0) {
+ printk("Minix_Mcu_write_isp fail CMD_UPDATE_APROM_DATA\n");
+ return -ENODEV;
+}
+
+//-------------------------------------------------------------------
+
+msleep(500);
+
+while(pro<count_isp){
+ lens = count_isp -pro;
+ if( lens > 60){
+ memset(MCU_ISP_CMD,0,64);
+ MCU_ISP_CMD[0] = CMD_UPDATE_CONTINUOUS;
+ MCU_ISP_CMD[1] = 0;
+ MCU_ISP_CMD[2] = 0;
+ MCU_ISP_CMD[3] = 0;
+ for(i=4;i<64;i++){
+ MCU_ISP_CMD[i] = MCU_ISP_FIRMWARE[pro++];
+ }
+
+ ret = Minix_Mcu_write_isp(client, MCU_ISP_CMD, 64);
+ if (ret < 0) {
+ printk("Minix_Mcu_write_isp fail CMD_UPDATE_CONTINUOUS\n");
+ return -ENODEV;
+ }
+
+ msleep(10);
+ }
+ else if(lens < 60){
+
+ memset(MCU_ISP_CMD,0,64);
+ MCU_ISP_CMD[0] = CMD_UPDATE_CONTINUOUS_END;
+ MCU_ISP_CMD[1] = 0;
+ MCU_ISP_CMD[2] = 0;
+ MCU_ISP_CMD[3] = 0;
+ for(i=4;i<lens+4;i++){
+ MCU_ISP_CMD[i] = MCU_ISP_FIRMWARE[pro++];
+ printk(" %d,",MCU_ISP_CMD[i]);
+
+ }
+ pro_1 = pro;
+ printk("pro = %d-----ison\n",pro_1);
+ for(i=lens+4;i<64;i++){
+ MCU_ISP_CMD[i] = 0xff;
+ pro++;
+ }
+
+ ret = Minix_Mcu_write_isp(client, MCU_ISP_CMD, 64);
+ if (ret < 0) {
+ printk("Minix_Mcu_write_isp fail CMD_UPDATE_CONTINUOUS_END\n");
+ return -ENODEV;
+ }
+
+ }
+}
+
+memset(MCU_ISP_CMD,0,64);
+MCU_ISP_CMD[0] = CMD_INTER_APROM;
+
+ret = Minix_Mcu_write_isp(client, MCU_ISP_CMD, 64);
+if (ret < 0) {
+ printk("Minix_Mcu_write_isp fail\n");
+ return -ENODEV;
+}
+
+
+ msleep(500);
+ minix_isp_class = class_create(THIS_MODULE, "minix-isp");
+ if (IS_ERR(minix_isp_class)) {
+ printk(KERN_ERR "Failed to create minix isp class\n");
+ minix_isp_class = NULL;
+ return -EINVAL;
+ }
+ ret = class_create_file(minix_isp_class, &class_attr_MCUIspState);
+
+ machine_restart(NULL);
+ return 0;
+
+
+}
+
+static const struct i2c_device_id jw_mcu_isp_id[] = {
+ { "jw_mcu_isp", 0 },
+ { }
+};
+
+static const struct of_device_id jw_mcu_isp_of_match[] = {
+ { .compatible = "everest,jw_mcu_isp", },
+ { }
+};
+
+static struct i2c_driver jw_mcu_isp_driver = {
+ .driver = {
+ .name = "jw_mcu_isp",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(jw_mcu_isp_of_match),
+ },
+ .probe = isp_input_control_probe,
+ .id_table = jw_mcu_isp_id,
+};
+
+module_i2c_driver(jw_mcu_isp_driver);
+MODULE_AUTHOR("ison@jwele.com.cn");
+MODULE_DESCRIPTION("jw mcu driver");
+MODULE_LICENSE("GPL");
+
+
diff --git a/kernel/drivers/misc/nkio/mcu/jw_mcu_isp.dat b/kernel/drivers/misc/nkio/mcu/jw_mcu_isp.dat
new file mode 100755
index 0000000..0f690c1
--- /dev/null
+++ b/kernel/drivers/misc/nkio/mcu/jw_mcu_isp.dat
@@ -0,0 +1,1606 @@
+0x00, 0x0A, 0x00, 0x20, 0xA9, 0x02, 0x00, 0x00, 0xAD, 0x02, 0x00, 0x00, 0x79, 0x01, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB1, 0x02, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB3, 0x02, 0x00, 0x00, 0xB5, 0x02, 0x00, 0x00,
+0xB7, 0x02, 0x00, 0x00, 0x55, 0x3D, 0x00, 0x00, 0x05, 0x40, 0x00, 0x00, 0x71, 0x3E, 0x00, 0x00,
+0xB9, 0x12, 0x00, 0x00, 0xFB, 0x12, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00,
+0x51, 0x51, 0x00, 0x00, 0xE9, 0x51, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00, 0xB7, 0x02, 0x00, 0x00,
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+0x02, 0x70, 0x40, 0x1C, 0x49, 0x1E, 0x02, 0x29, 0x04, 0xD3, 0x83, 0x07, 0x02, 0xD5, 0x02, 0x80,
+0x80, 0x1C, 0x89, 0x1E, 0xE3, 0xE7, 0x00, 0x22, 0xEE, 0xE7, 0x00, 0x22, 0xDF, 0xE7, 0x03, 0x78,
+0xC2, 0x78, 0x19, 0x46, 0x43, 0x78, 0x12, 0x06, 0x1B, 0x02, 0x19, 0x43, 0x83, 0x78, 0xC0, 0x78,
+0x1B, 0x04, 0x19, 0x43, 0x11, 0x43, 0x09, 0x02, 0x09, 0x0A, 0x00, 0x06, 0x08, 0x43, 0x70, 0x47,
+0x00, 0x22, 0x03, 0x09, 0x8B, 0x42, 0x2C, 0xD3, 0x03, 0x0A, 0x8B, 0x42, 0x11, 0xD3, 0x00, 0x23,
+0x9C, 0x46, 0x4E, 0xE0, 0x03, 0x46, 0x0B, 0x43, 0x3C, 0xD4, 0x00, 0x22, 0x43, 0x08, 0x8B, 0x42,
+0x31, 0xD3, 0x03, 0x09, 0x8B, 0x42, 0x1C, 0xD3, 0x03, 0x0A, 0x8B, 0x42, 0x01, 0xD3, 0x94, 0x46,
+0x3F, 0xE0, 0xC3, 0x09, 0x8B, 0x42, 0x01, 0xD3, 0xCB, 0x01, 0xC0, 0x1A, 0x52, 0x41, 0x83, 0x09,
+0x8B, 0x42, 0x01, 0xD3, 0x8B, 0x01, 0xC0, 0x1A, 0x52, 0x41, 0x43, 0x09, 0x8B, 0x42, 0x01, 0xD3,
+0x4B, 0x01, 0xC0, 0x1A, 0x52, 0x41, 0x03, 0x09, 0x8B, 0x42, 0x01, 0xD3, 0x0B, 0x01, 0xC0, 0x1A,
+0x52, 0x41, 0xC3, 0x08, 0x8B, 0x42, 0x01, 0xD3, 0xCB, 0x00, 0xC0, 0x1A, 0x52, 0x41, 0x83, 0x08,
+0x8B, 0x42, 0x01, 0xD3, 0x8B, 0x00, 0xC0, 0x1A, 0x52, 0x41, 0x43, 0x08, 0x8B, 0x42, 0x01, 0xD3,
+0x4B, 0x00, 0xC0, 0x1A, 0x52, 0x41, 0x41, 0x1A, 0x00, 0xD2, 0x01, 0x46, 0x52, 0x41, 0x10, 0x46,
+0x70, 0x47, 0x5D, 0xE0, 0xCA, 0x0F, 0x00, 0xD0, 0x49, 0x42, 0x03, 0x10, 0x00, 0xD3, 0x40, 0x42,
+0x53, 0x40, 0x00, 0x22, 0x9C, 0x46, 0x03, 0x09, 0x8B, 0x42, 0x2D, 0xD3, 0x03, 0x0A, 0x8B, 0x42,
+0x12, 0xD3, 0xFC, 0x22, 0x89, 0x01, 0x12, 0xBA, 0x03, 0x0A, 0x8B, 0x42, 0x0C, 0xD3, 0x89, 0x01,
+0x92, 0x11, 0x8B, 0x42, 0x08, 0xD3, 0x89, 0x01, 0x92, 0x11, 0x8B, 0x42, 0x04, 0xD3, 0x89, 0x01,
+0x3A, 0xD0, 0x92, 0x11, 0x00, 0xE0, 0x89, 0x09, 0xC3, 0x09, 0x8B, 0x42, 0x01, 0xD3, 0xCB, 0x01,
+0xC0, 0x1A, 0x52, 0x41, 0x83, 0x09, 0x8B, 0x42, 0x01, 0xD3, 0x8B, 0x01, 0xC0, 0x1A, 0x52, 0x41,
+0x43, 0x09, 0x8B, 0x42, 0x01, 0xD3, 0x4B, 0x01, 0xC0, 0x1A, 0x52, 0x41, 0x03, 0x09, 0x8B, 0x42,
+0x01, 0xD3, 0x0B, 0x01, 0xC0, 0x1A, 0x52, 0x41, 0xC3, 0x08, 0x8B, 0x42, 0x01, 0xD3, 0xCB, 0x00,
+0xC0, 0x1A, 0x52, 0x41, 0x83, 0x08, 0x8B, 0x42, 0x01, 0xD3, 0x8B, 0x00, 0xC0, 0x1A, 0x52, 0x41,
+0xD9, 0xD2, 0x43, 0x08, 0x8B, 0x42, 0x01, 0xD3, 0x4B, 0x00, 0xC0, 0x1A, 0x52, 0x41, 0x41, 0x1A,
+0x00, 0xD2, 0x01, 0x46, 0x63, 0x46, 0x52, 0x41, 0x5B, 0x10, 0x10, 0x46, 0x01, 0xD3, 0x40, 0x42,
+0x00, 0x2B, 0x00, 0xD5, 0x49, 0x42, 0x70, 0x47, 0x63, 0x46, 0x5B, 0x10, 0x00, 0xD3, 0x40, 0x42,
+0x01, 0xB5, 0x00, 0x20, 0xC0, 0x46, 0xC0, 0x46, 0x02, 0xBD, 0x70, 0x47, 0x70, 0x47, 0x70, 0x47,
+0xFF, 0xB5, 0x04, 0x46, 0x0D, 0x46, 0x81, 0xB0, 0x24, 0x30, 0x00, 0x90, 0x21, 0x68, 0x88, 0x06,
+0x04, 0xD5, 0x10, 0x22, 0xE0, 0x69, 0x91, 0x43, 0x21, 0x60, 0x00, 0xE0, 0x01, 0x20, 0xA8, 0x42,
+0x01, 0xDD, 0x47, 0x1B, 0x00, 0xE0, 0x00, 0x27, 0x04, 0x98, 0xA1, 0x69, 0x7A, 0x19, 0x10, 0x18,
+0x08, 0x1A, 0xA0, 0x61, 0x20, 0x68, 0xC0, 0x06, 0x02, 0xD4, 0x20, 0x46, 0xFF, 0xF7, 0x48, 0xFD,
+0x00, 0x26, 0x08, 0xE0, 0x03, 0x98, 0x62, 0x68, 0xA1, 0x68, 0x80, 0x5D, 0x90, 0x47, 0x20, 0x6A,
+0x40, 0x1C, 0x76, 0x1C, 0x20, 0x62, 0x04, 0x98, 0x86, 0x42, 0xF3, 0xDB, 0x20, 0x68, 0xC0, 0x06,
+0x0A, 0xD5, 0x20, 0x46, 0xFF, 0xF7, 0x34, 0xFD, 0x06, 0xE0, 0x62, 0x68, 0xA1, 0x68, 0x30, 0x20,
+0x90, 0x47, 0x20, 0x6A, 0x40, 0x1C, 0x20, 0x62, 0x38, 0x46, 0x7F, 0x1E, 0x00, 0x28, 0xF4, 0xDC,
+0x07, 0xE0, 0x00, 0x98, 0x62, 0x68, 0xA1, 0x68, 0x40, 0x5D, 0x90, 0x47, 0x20, 0x6A, 0x40, 0x1C,
+0x20, 0x62, 0x28, 0x46, 0x6D, 0x1E, 0x00, 0x28, 0xF3, 0xDC, 0x20, 0x46, 0xFF, 0xF7, 0x2E, 0xFD,
+0x20, 0x68, 0x00, 0x06, 0x02, 0xD5, 0x02, 0x20, 0x05, 0xB0, 0xF0, 0xBD, 0x01, 0x20, 0xFB, 0xE7,
+0x10, 0xB5, 0x43, 0x69, 0x00, 0x2B, 0x02, 0xD0, 0xC0, 0x46, 0xC0, 0x46, 0x01, 0xE0, 0xFF, 0xF7,
+0x2E, 0xFD, 0x01, 0x20, 0x10, 0xBD, 0x12, 0x68, 0x01, 0x46, 0x24, 0x31, 0x0A, 0x70, 0x00, 0x22,
+0x4A, 0x70, 0x01, 0x22, 0xEC, 0xE7, 0x11, 0x68, 0x00, 0x22, 0xD2, 0x43, 0xE8, 0xE7, 0x00, 0x00,
+0x08, 0x4B, 0x70, 0xB5, 0x0C, 0x46, 0x7B, 0x44, 0x00, 0xF0, 0x27, 0xF8, 0x05, 0x46, 0x20, 0x46,
+0xFA, 0xF7, 0x54, 0xFC, 0x00, 0x28, 0x02, 0xD0, 0x00, 0x20, 0xC0, 0x43, 0x70, 0xBD, 0x28, 0x46,
+0x70, 0xBD, 0x00, 0x00, 0xA5, 0xA8, 0xFF, 0xFF, 0x01, 0x46, 0x80, 0x08, 0x08, 0x1A, 0x02, 0x09,
+0x10, 0x18, 0x02, 0x0A, 0x10, 0x18, 0x02, 0x0C, 0x10, 0x18, 0xC0, 0x08, 0x82, 0x00, 0x12, 0x18,
+0x52, 0x00, 0x89, 0x1A, 0x01, 0xE0, 0x0A, 0x39, 0x40, 0x1C, 0x0A, 0x29, 0xFB, 0xD2, 0x70, 0x47,
+0x01, 0x69, 0x4A, 0x1C, 0x02, 0x61, 0x08, 0x78, 0x70, 0x47, 0x00, 0xB5, 0x8F, 0xB0, 0x02, 0x91,
+0x00, 0x21, 0x05, 0x91, 0x05, 0x49, 0x01, 0x93, 0x79, 0x44, 0x03, 0x91, 0x11, 0x46, 0x04, 0x90,
+0x68, 0x46, 0xFF, 0xF7, 0x6F, 0xFD, 0x0F, 0xB0, 0x00, 0xBD, 0x00, 0x00, 0xE5, 0xFF, 0xFF, 0xFF,
+0x75, 0x46, 0x00, 0xF0, 0x23, 0xF8, 0xAE, 0x46, 0x05, 0x00, 0x69, 0x46, 0x53, 0x46, 0xC0, 0x08,
+0xC0, 0x00, 0x85, 0x46, 0x18, 0xB0, 0x20, 0xB5, 0xFA, 0xF7, 0x3E, 0xF8, 0x60, 0xBC, 0x00, 0x27,
+0x49, 0x08, 0xB6, 0x46, 0x00, 0x26, 0xC0, 0xC5, 0xC0, 0xC5, 0xC0, 0xC5, 0xC0, 0xC5, 0xC0, 0xC5,
+0xC0, 0xC5, 0xC0, 0xC5, 0xC0, 0xC5, 0x40, 0x3D, 0x49, 0x00, 0x8D, 0x46, 0x70, 0x47, 0x04, 0x46,
+0xC0, 0x46, 0xC0, 0x46, 0x20, 0x46, 0xF9, 0xF7, 0x81, 0xFF, 0x00, 0x00, 0x00, 0x48, 0x70, 0x47,
+0x9C, 0x07, 0x00, 0x20, 0x70, 0xB5, 0x8C, 0x18, 0x05, 0x78, 0x40, 0x1C, 0x6B, 0x07, 0x5B, 0x0F,
+0x01, 0xD1, 0x03, 0x78, 0x40, 0x1C, 0x2A, 0x11, 0x06, 0xD1, 0x02, 0x78, 0x40, 0x1C, 0x03, 0xE0,
+0x06, 0x78, 0x40, 0x1C, 0x0E, 0x70, 0x49, 0x1C, 0x5B, 0x1E, 0xF9, 0xD1, 0x2B, 0x07, 0x05, 0xD4,
+0x00, 0x23, 0x52, 0x1E, 0x0D, 0xD4, 0x0B, 0x70, 0x49, 0x1C, 0xFA, 0xE7, 0x03, 0x78, 0x40, 0x1C,
+0xCB, 0x1A, 0x92, 0x1C, 0x03, 0xE0, 0x1D, 0x78, 0x5B, 0x1C, 0x0D, 0x70, 0x49, 0x1C, 0x52, 0x1E,
+0xF9, 0xD5, 0xA1, 0x42, 0xD8, 0xD3, 0x00, 0x20, 0x70, 0xBD, 0x30, 0xB4, 0x74, 0x46, 0x64, 0x1E,
+0x25, 0x78, 0x64, 0x1C, 0xAB, 0x42, 0x00, 0xD2, 0x1D, 0x46, 0x63, 0x5D, 0x5B, 0x00, 0xE3, 0x18,
+0x30, 0xBC, 0x18, 0x47, 0x30, 0x38, 0x0A, 0x28, 0x01, 0xD2, 0x01, 0x20, 0x70, 0x47, 0x00, 0x20,
+0x70, 0x47, 0x2C, 0x91, 0x01, 0x22, 0x2C, 0x91, 0x01, 0x02, 0x00, 0x00, 0x00, 0xFF, 0x01, 0x00,
+0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x5A, 0x90, 0x01, 0x2A, 0x78, 0x90, 0x41, 0x5A, 0x29, 0x1F,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x56, 0x34, 0x12, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35,
+0x36, 0x37, 0x38, 0x39, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x40, 0x30, 0x58, 0x00, 0x30, 0x31,
+0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x40, 0x30,
+0x78, 0x00, 0x04, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x01,
+0x00, 0x00, 0x10, 0x73, 0x6F, 0x63, 0x5F, 0x70, 0x6F, 0x77, 0x65, 0x72, 0x00, 0x73, 0x6F, 0x63,
+0x5F, 0x77, 0x64, 0x74, 0x00, 0x73, 0x6F, 0x63, 0x5F, 0x72, 0x74, 0x63, 0x70, 0x6F, 0x77, 0x65,
+0x72, 0x00, 0x73, 0x6F, 0x63, 0x5F, 0x65, 0x74, 0x68, 0x77, 0x6F, 0x6C, 0x00, 0x00, 0x00, 0x00,
+0xA0, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x0C, 0x02, 0x00, 0x00, 0x74, 0x62, 0x00, 0x00,
+0x60, 0x64, 0x00, 0x00, 0x0C, 0x02, 0x00, 0x20, 0xF4, 0x07, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00,
+0x11, 0x3C, 0x80, 0x51, 0x01, 0x04, 0x01, 0x2C, 0x03, 0x11, 0x04, 0x04, 0x24, 0xFF, 0xFF, 0xFF,
+0x2A, 0x01, 0x05, 0xF1, 0x82, 0x02, 0x12, 0x03, 0x30, 0x09, 0x41, 0x55, 0x42, 0x52, 0x43, 0x41,
+0x41, 0x55, 0x1B, 0x01, 0x02, 0x18, 0x3D, 0x29, 0x1F, 0x47, 0x74, 0x23, 0xB9, 0x7E, 0x0B, 0x14,
+0x44, 0x04, 0x18, 0x21, 0x14, 0x1F, 0x29, 0x1F, 0x1A, 0x74, 0x1B, 0x19, 0x6C, 0x2A, 0xFF, 0x1B,
+0x19, 0x0F, 0x11, 0x29, 0x2A, 0x29, 0x10, 0x41, 0xA9, 0x10, 0xE9, 0x20, 0x29, 0x87, 0x09, 0x1A,
+0x30, 0x09, 0x32, 0x10, 0x11, 0x1A, 0x02, 0x08, 0x1A, 0x06, 0x04, 0x1A, 0x0A, 0x04, 0x29, 0x0C,
+0xD9, 0x04, 0x29, 0xC8, 0xB0, 0x0E, 0x41, 0x6E, 0x61, 0x6C, 0x6F, 0x67, 0x69, 0x78, 0x28, 0x4D,
+0x43, 0x55, 0x29, 0xA3, 0x53, 0x63, 0x23, 0xE5, 0x3B, 0x9A, 0x5D, 0x10, 0x23, 0x23, 0x3D, 0x9A,
+0x65, 0x10, 0xE3, 0x0B, 0x3F, 0x9A, 0x72, 0x1C, 0x63, 0x43, 0x47, 0x29, 0xF0, 0x12, 0xFF, 0x12,
+0xA2, 0x14, 0x02, 0x02, 0xB2, 0x12, 0xDF, 0x12, 0x50, 0x14, 0xBD, 0x40, 0xA2, 0x14, 0xF7, 0x08,
+0xAF, 0x14, 0x7F, 0x80, 0xE7, 0x3C, 0xEE, 0x12, 0xAF, 0x20, 0x41, 0x13, 0xF0, 0x01, 0x2A, 0x20,
+0x04, 0x23, 0x4D, 0x55, 0x1A, 0xA3, 0x04, 0x23, 0x51, 0x56, 0x13, 0x04, 0x02, 0x2A, 0x20, 0x04,
diff --git a/kernel/drivers/misc/nkio/mcu/jw_mcu_isp.h b/kernel/drivers/misc/nkio/mcu/jw_mcu_isp.h
new file mode 100755
index 0000000..a8b342f
--- /dev/null
+++ b/kernel/drivers/misc/nkio/mcu/jw_mcu_isp.h
@@ -0,0 +1,12 @@
+
+
+
+#define CMD_UPDATE_APROM 0x000000A0
+#define CMD_UPDATE_APROM_DATA 0x000000A1
+#define CMD_UPDATE_CONTINUOUS 0x00000000
+#define CMD_INTER_APROM 0x000000A2
+#define CMD_UPDATE_CONTINUOUS_END 0x000000A3
+
+
+
+
diff --git a/kernel/drivers/misc/nkio/nk_io_core.c b/kernel/drivers/misc/nkio/nk_io_core.c
new file mode 100755
index 0000000..4f770bb
--- /dev/null
+++ b/kernel/drivers/misc/nkio/nk_io_core.c
@@ -0,0 +1,622 @@
+/*
+ * Copyright (C) 2014 Rockchip Corporation.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/i2c.h>
+#include <linux/spi/spi.h>
+#include <linux/platform_device.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/debugfs.h>
+#include <linux/of_gpio.h>
+#include <linux/gpio.h>
+#include <linux/iio/consumer.h>
+#include <linux/of.h>
+#include "nkio.h"
+
+/* Debug */
+#if 1
+#define DBG(x...) printk(x)
+#else
+#define DBG(x...) do { } while (0)
+#endif
+
+struct nk_io_pdata *NKpdata_info;
+u32 op0_enable,op1_enable,op2_enable,op3_enable,op4_enable,op5_enable,mic_enable;
+u32 ip0_enable,ip1_enable,ip2_enable,ip3_enable,ip4_enable,ip5_enable;
+u32 module_enable;
+//static struct class *nk_class;
+
+
+void MODULE_SET(int i)
+{
+ if(i==11){
+ gpio_direction_output(NKpdata_info->en_4g_gpio, 1);
+ }else{
+ gpio_direction_output(NKpdata_info->en_4g_gpio, 0);
+ }
+}
+
+EXPORT_SYMBOL_GPL(MODULE_SET);
+
+
+void LED_SET(int i)
+{
+ if(i==11){
+ gpio_direction_output(NKpdata_info->led_gpio, 1);
+ }else{
+ gpio_direction_output(NKpdata_info->led_gpio, 0);
+ }
+}
+
+EXPORT_SYMBOL_GPL(LED_SET);
+
+
+void Audio_SET(int i);
+
+ void Audio_SET(int i)
+ {
+ if(i==11){
+ gpio_direction_output(NKpdata_info->audio_switch_gpio, 1);
+ printk("Audio_SET ENABLE------andy\n");
+ }else{
+ gpio_direction_output(NKpdata_info->audio_switch_gpio, 0);
+ printk("Audio_SET DISABLE------andy\n");
+ }
+ }
+ EXPORT_SYMBOL_GPL(Audio_SET);
+
+static int nk_io_control_probe(struct platform_device *pdev)
+{
+ struct device_node *node = pdev->dev.of_node;
+ struct nk_io_pdata *pdata;
+ int gpio0, gpio1, gpio2, gpio3, reset_pin, ch342_reset;
+ int ret;
+ int lvds_index;
+ int i=0;
+ static int lvds_gpio[4] ;
+
+ enum of_gpio_flags flags;
+
+ printk(" #######nk_io_control_probe####### \n");
+
+ pdata = kzalloc(sizeof(struct nk_io_pdata), GFP_KERNEL);
+ if (pdata == NULL) {
+ printk("%s failed to allocate driver data\n",__FUNCTION__);
+ return -ENOMEM;
+ }
+ memset(pdata,0,sizeof(struct nk_io_pdata));
+
+ //vcc_5v_io
+ ret = of_get_named_gpio_flags(node, "vcc_5v_io", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property vcc_5v_io\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->vcc_5v_io = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->vcc_5v_io, "vcc_5v_io");
+ if(ret < 0){
+ printk("%s() devm_gpio_request vcc_5v_io request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->vcc_5v_io,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input vcc_5v_io set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //vcc3_io_en_gpio
+ ret = of_get_named_gpio_flags(node, "vcc3_io_en_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property tp_enable\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->vcc3_io_en_gpio = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->vcc3_io_en_gpio, "vcc3_io_en_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request vcc3_io_en_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->vcc3_io_en_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_output vcc3_io_en_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //vcc_12v_io
+ ret = of_get_named_gpio_flags(node, "vcc_12v_io", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property vcc_12v_io\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->vcc_12v_io = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->vcc_12v_io, "vcc_12v_io");
+ if(ret < 0){
+ printk("%s() devm_gpio_request vcc_12v_io request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->vcc_12v_io,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input vcc_12v_io set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+
+
+ //hub_host2_5v_gpio
+ ret = of_get_named_gpio_flags(node, "hub_host2_5v_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property hub_host2_5v_gpio\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->hub_host2_5v_gpio = ret;
+ gpio_free(ret);
+ ret = devm_gpio_request(&pdev->dev, pdata->hub_host2_5v_gpio, "hub_host2_5v_gpio");
+ if (ret < 0){
+ printk("%s() devm_gpio_request hub_host2_5v_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->hub_host2_5v_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_host2_5v_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //usb_en_oc_gpio
+ ret = of_get_named_gpio_flags(node, "usb_en_oc_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property usb_en_oc_gpio\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->usb_en_oc_gpio = ret;
+ gpio_free(ret);
+ ret = devm_gpio_request(&pdev->dev, pdata->usb_en_oc_gpio, "usb_en_oc_gpio");
+ if (ret < 0){
+ printk("%s() devm_gpio_request usb_en_oc_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->usb_en_oc_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input usb_en_oc_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //hub_host2_5V_rest_gpio
+ ret = of_get_named_gpio_flags(node, "hub_host2_5V_rest_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property hub_host2_5V_rest_gpio\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->hub_host2_5V_rest_gpio = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->hub_host2_5V_rest_gpio, "hub_host2_5V_rest_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request hub_host2_5V_rest_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->hub_host2_5V_rest_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_host2_5V_rest_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ msleep(800);
+ ret = gpio_direction_output(pdata->hub_host2_5V_rest_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_host2_5V_rest_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //hub_host3_5v_gpio
+ ret = of_get_named_gpio_flags(node, "hub_host3_5v_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property hub_host3_5v_gpio\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->hub_host3_5v_gpio = ret;
+ gpio_free(ret);
+ ret = devm_gpio_request(&pdev->dev, pdata->hub_host3_5v_gpio, "hub_host3_5v_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request hub_host3_5v_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->hub_host3_5v_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_host3_5v_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+#if 0
+ //hub_host3_5V_rest_gpio
+ ret = of_get_named_gpio_flags(node, "hub_host3_5V_rest_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property hub_host3_5V_rest_gpio\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->hub_host3_5V_rest_gpio = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->hub_host3_5V_rest_gpio, "hub_host3_5V_rest_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request hub_host3_5V_rest_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->hub_host3_5V_rest_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_host3_5V_rest_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ msleep(800);
+ ret = gpio_direction_output(pdata->hub_host3_5V_rest_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_host3_5V_rest_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+#endif
+ //wake_4g_gpio
+ ret = of_get_named_gpio_flags(node, "wake_4g_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property wake_4g_gpio\n", __FUNCTION__);
+ } else {
+ pdata->wake_4g_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->wake_4g_gpio, "wake_4g_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request wake_4g_gpio request ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(pdata->wake_4g_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input wake_4g_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+
+ //reset_4g_gpio
+ ret = of_get_named_gpio_flags(node, "reset_4g_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property reset_4g_gpio\n", __FUNCTION__);
+ } else {
+ pdata->reset_4g_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->reset_4g_gpio, "reset_4g_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request reset_4g_gpio request ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(pdata->reset_4g_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input reset_4g_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+ //en_4g_gpio
+ ret = of_get_named_gpio_flags(node, "en_4g_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property en_4g_gpio\n", __FUNCTION__);
+ } else {
+ pdata->en_4g_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->en_4g_gpio, "en_4g_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request en_4g_gpio request ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(pdata->en_4g_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input en_4g_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+
+ //air_mode_4g_gpio
+ ret = of_get_named_gpio_flags(node, "air_mode_4g_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property air_mode_4g_gpio\n", __FUNCTION__);
+ } else {
+ pdata->air_mode_4g_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->air_mode_4g_gpio, "air_mode_4g_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request air_mode_4g_gpio request ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(pdata->air_mode_4g_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input air_mode_4g_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+
+/*
+ //edp_power_supply_gpio;
+ ret = of_get_named_gpio_flags(node, "edp_power_supply_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_power_supply_gpio\n", __FUNCTION__);
+ } else {
+ pdata->edp_power_supply_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->edp_power_supply_gpio, "edp_power_supply_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_power_supply_gpio request ERROR\n", __FUNCTION__);
+ }
+
+ ret = gpio_direction_output(pdata->edp_power_supply_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input edp_power_supply_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+ //edp_enable-gpio;
+ ret = of_get_named_gpio_flags(node, "edp_enable_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_enable_gpio\n", __FUNCTION__);
+ } else {
+ pdata->edp_enable_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->edp_enable_gpio, "edp_enable_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_enable_gpio request ERROR\n", __FUNCTION__);
+ }
+
+ ret = gpio_direction_output(pdata->edp_enable_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input edp_enable_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+ //ch342_enable-gpio;
+ ret = of_get_named_gpio_flags(node, "ch342_power", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property ch342_gpio\n", __FUNCTION__);
+ } else {
+ pdata->ch342_power = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->ch342_power, "ch342_power");
+ if(ret < 0){
+ printk("%s() devm_gpio_request ch342_power request ERROR\n", __FUNCTION__);
+ }
+
+ ret = gpio_direction_output(pdata->ch342_power,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input ch342_power set ERROR\n", __FUNCTION__);
+ }
+ }
+*/
+
+ //edp_set_pixel-s
+ ret = of_get_named_gpio_flags(node, "edp_reset", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_reset\n", __FUNCTION__);
+ goto err;
+ }
+
+ reset_pin = ret;
+
+// enable lvds
+ ret = of_get_named_gpio_flags(node, "edp_gpio0", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_gpio0\n", __FUNCTION__);
+ goto err;
+ }
+ gpio0 = ret;
+
+
+
+ ret = of_get_named_gpio_flags(node, "edp_gpio1", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_gpio1\n", __FUNCTION__);
+ goto err;
+ }
+
+ gpio1 = ret;
+
+ ret = of_get_named_gpio_flags(node, "edp_gpio2", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_gpio2\n", __FUNCTION__);
+ goto err;
+ }
+
+ gpio2 = ret;
+
+ ret = of_get_named_gpio_flags(node, "edp_gpio3", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_gpio3\n", __FUNCTION__);
+ goto err;
+ }
+
+ gpio3 = ret;
+
+
+ ret = devm_gpio_request(&pdev->dev, reset_pin, "edp_reset");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_reset request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+
+ ret = devm_gpio_request(&pdev->dev, gpio0, "edp_gpio0");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_gpio0 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = devm_gpio_request(&pdev->dev, gpio1, "edp_gpio1");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_gpio1 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = devm_gpio_request(&pdev->dev, gpio2, "edp_gpio2");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_gpio2 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = devm_gpio_request(&pdev->dev, gpio3, "edp_gpio3");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_gpio3 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = of_property_read_u32(node, "nodka_lvds", &lvds_index);
+ if (ret < 0){
+ printk("%s() Can not read property nodka_lvds\n", __FUNCTION__);
+ }
+
+ printk("nodka_lvds_index = %d\n",lvds_index);
+
+ while ( i < 4 ){
+ if ( lvds_index > 0)
+ lvds_gpio[i] = lvds_index%2;
+ else
+ lvds_gpio[i] = 0;
+ printk("lvds_gpio[%d]=%d\n",i,lvds_gpio[i]);
+ lvds_index = lvds_index/2;
+ i++;
+ }
+
+ gpio_direction_output(reset_pin, 0);
+ usleep_range(80000, 100000);
+ gpio_direction_output(reset_pin, 1);
+ usleep_range(80000, 100000);
+
+ gpio_direction_output(gpio0, lvds_gpio[0]);
+ gpio_direction_output(gpio1, lvds_gpio[1]);
+ gpio_direction_output(gpio2, lvds_gpio[2]);
+ gpio_direction_output(gpio3, lvds_gpio[3]);
+
+ printk(" #######nk_io_control_probe end####### \n");
+ return 0;
+
+err:
+ kfree(pdata);
+ return ret;
+}
+
+
+static int nk_io_control_remove(struct platform_device *pdev)
+{
+ if(NKpdata_info)
+ kfree(NKpdata_info);
+ return 0;
+}
+
+static int nk_io_control_suspend(struct platform_device *pdev, pm_message_t state)
+{
+ int ret;
+ struct nk_io_pdata *pdata;
+ printk("nk_suspend !!!!\n");
+#if 0
+ ret = gpio_get_value(8);
+ printk("vcc12v gpio value : %d\n",ret);
+ usleep_range(80000, 100000);
+ gpio_set_value(8,0);
+ ret = gpio_get_value(8);
+ printk("vcc12v gpio value : %d\n",ret);
+#endif
+#if 0
+ ret = gpio_get_value(21);
+ printk("hub_host3_5v_gpio value : %d\n",ret);
+ usleep_range(80000, 100000);
+ gpio_set_value(21,0);
+ ret = gpio_get_value(21);
+ printk("hub_host3_5v_gpio value : %d\n",ret);
+ //enable = 0;
+ //LED_SET(0);
+#endif
+ return 0;
+}
+
+static int nk_io_control_resume(struct platform_device *pdev)
+{
+ int ret,reset_pin;
+ printk("nk_io resume !!!!\n");
+ ret = gpio_get_value(120);
+
+#if 0
+ gpio_set_value(8,1);
+ ret = gpio_get_value(8);
+ printk("vcc12v gpio value : %d\n",ret);
+#endif
+#if 0
+ gpio_set_value(15,1);
+ ret = gpio_get_value(15);
+ printk("edp_en gpio value : %d\n",ret);
+ gpio_set_value(21,1);
+ ret = gpio_get_value(21);
+ printk("hub_host3_5v_gpio value : %d\n",ret);
+#endif
+#if 0
+ usleep_range(80000, 100000);
+ gpio_set_value(120,0);
+// gpio_direction_output(120, 0);
+ usleep_range(80000, 100000);
+ ret = gpio_get_value(120);
+ printk("edp_reset gpio value : %d\n",ret);
+// gpio_direction_output(120, 1);
+ gpio_set_value(120,1);
+ usleep_range(80000, 100000);
+ ret = gpio_get_value(120);
+ printk("edp_reset gpio value : %d\n",ret);
+#endif
+ //enable = 1;
+ //LED_SET(11);
+ return 0;
+}
+
+static const struct of_device_id nk_io_control_of_match[] = {
+ { .compatible = "nk_io_control", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, nk_io_control_of_match);
+
+static struct platform_driver nk_io_control_driver = {
+ .probe = nk_io_control_probe,
+ .remove = nk_io_control_remove,
+ .resume = nk_io_control_resume,
+ .suspend = nk_io_control_suspend,
+ .driver = {
+ .name = "nk_io_control",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(nk_io_control_of_match),
+ },
+};
+
+static int __init nk_io_control_init(void)
+{
+ platform_driver_register(&nk_io_control_driver);
+ return 0;
+}
+
+static void __exit nk_io_control_exit(void)
+{
+ platform_driver_unregister(&nk_io_control_driver);
+}
+
+subsys_initcall(nk_io_control_init);
+
+//late_initcall(nk_io_control_init);
+MODULE_DESCRIPTION("nk io Core Driver");
+MODULE_LICENSE("GPL");
diff --git a/kernel/drivers/misc/nkio/nk_io_core.c_suspend b/kernel/drivers/misc/nkio/nk_io_core.c_suspend
new file mode 100755
index 0000000..14d9942
--- /dev/null
+++ b/kernel/drivers/misc/nkio/nk_io_core.c_suspend
@@ -0,0 +1,1882 @@
+/*
+ * Copyright (C) 2014 Rockchip Corporation.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/i2c.h>
+#include <linux/spi/spi.h>
+#include <linux/platform_device.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/debugfs.h>
+#include <linux/of_gpio.h>
+#include <linux/gpio.h>
+#include <linux/iio/consumer.h>
+#include <linux/of.h>
+#include "nkio.h"
+
+/* Debug */
+#if 1
+#define DBG(x...) printk(x)
+#else
+#define DBG(x...) do { } while (0)
+#endif
+
+struct nk_io_pdata *NKpdata_info;
+u32 op0_enable,op1_enable,op2_enable,op3_enable,op4_enable,op5_enable,mic_enable;
+u32 ip0_enable,ip1_enable,ip2_enable,ip3_enable,ip4_enable,ip5_enable;
+u32 module_enable;
+//static struct class *nk_class;
+
+
+#if 0
+
+ void mic_switch_control(int i)
+{
+if(i==11){
+ gpio_direction_output(NKpdata_info->mic_switch_gpio, 1);
+ printk("mic_switch_control ENABLE------andy\n");
+}else{
+ gpio_direction_output(NKpdata_info->mic_switch_gpio, 0);
+ printk("mic_switch_control DISABLE------andy\n");
+}
+}
+
+
+
+
+static ssize_t mic_switch_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
+{
+ sscanf(buf, "%d", &mic_enable);
+ printk("MIC_SWITCH enable =%d\n",mic_enable);
+
+ if (mic_enable)
+ {
+ printk("store_MIC_SWITCH ENABLE------andy\n");
+ mic_switch_control(11);
+ }
+ else {
+ mic_switch_control(0);
+ printk("store_MIC_SWITCH DISABLE------andy\n");
+ }
+ return count;
+}
+
+static ssize_t mic_switch_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+return snprintf(buf, 3, "%d\n",mic_enable);
+}
+
+static CLASS_ATTR(mic_switch, 0664, mic_switch_show, mic_switch_store);
+
+
+
+ void Audio_SET(int i)
+ {
+ if(i==11){
+ gpio_direction_output(NKpdata_info->audio_switch_gpio, 1);
+ printk("Audio_SET ENABLE------andy\n");
+ }else{
+ gpio_direction_output(NKWpdata_info->audio_switch_gpio, 0);
+ printk("Audio_SET DISABLE------andy\n");
+ }
+ }
+ EXPORT_SYMBOL_GPL(Audio_SET);
+
+
+
+static void LED_SET(int i)
+{
+ if(i==11){
+ gpio_direction_output(NKpdata_info->led_gpio, 1);
+ }else{
+ gpio_direction_output(NKpdata_info->led_gpio, 0);
+ }
+}
+
+
+
+static ssize_t led_display_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
+{
+ sscanf(buf, "%d", &enable);
+ printk("store_led enable =%d\n",enable);
+
+ if (enable)
+ {
+ printk("store_led ENABLE------andy\n");
+ LED_SET(11);
+ }
+ else {
+ LED_SET(0);
+ printk("store_led DISABLE------andy\n");
+ }
+ return count;
+}
+
+static ssize_t led_display_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+return snprintf(buf, 3, "%d\n",enable);
+}
+
+static CLASS_ATTR(led_display, 0664, led_display_show, led_display_store);
+
+#endif
+
+void MODULE_SET(int i)
+{
+ if(i==11){
+ gpio_direction_output(NKpdata_info->en_4g_gpio, 1);
+ }else{
+ gpio_direction_output(NKpdata_info->en_4g_gpio, 0);
+ }
+}
+
+EXPORT_SYMBOL_GPL(MODULE_SET);
+
+
+void LED_SET(int i)
+{
+ if(i==11){
+ gpio_direction_output(NKpdata_info->led_gpio, 1);
+ }else{
+ gpio_direction_output(NKpdata_info->led_gpio, 0);
+ }
+}
+
+EXPORT_SYMBOL_GPL(LED_SET);
+
+
+void Audio_SET(int i);
+
+ void Audio_SET(int i)
+ {
+ if(i==11){
+ gpio_direction_output(NKpdata_info->audio_switch_gpio, 1);
+ printk("Audio_SET ENABLE------andy\n");
+ }else{
+ gpio_direction_output(NKpdata_info->audio_switch_gpio, 0);
+ printk("Audio_SET DISABLE------andy\n");
+ }
+ }
+ EXPORT_SYMBOL_GPL(Audio_SET);
+
+
+//6 in 6 out-s
+static void GPIO_IO_SET(int i)
+{
+ if(i==11){
+ gpio_direction_output(NKpdata_info->gpio_op0, 1);
+ }
+ else if(i==10){
+ gpio_direction_output(NKpdata_info->gpio_op0, 0);
+ }
+ else if(i==21){
+ gpio_direction_output(NKpdata_info->gpio_op1, 1);
+ }
+ else if(i==20){
+ gpio_direction_output(NKpdata_info->gpio_op1, 0);
+ }
+ else if(i==31){
+ gpio_direction_output(NKpdata_info->gpio_op2, 1);
+ }
+ else if(i==30){
+ gpio_direction_output(NKpdata_info->gpio_op2, 0);
+ }
+ else if(i==41){
+ gpio_direction_output(NKpdata_info->gpio_op3, 1);
+ }
+ else if(i==40){
+ gpio_direction_output(NKpdata_info->gpio_op3, 0);
+ }
+ else if(i==51){
+ gpio_direction_output(NKpdata_info->gpio_op4, 1);
+ }
+ else if(i==50){
+ gpio_direction_output(NKpdata_info->gpio_op4, 0);
+ }
+ else if(i==61){
+ gpio_direction_output(NKpdata_info->gpio_op5, 1);
+ }
+ else if(i==60){
+ gpio_direction_output(NKpdata_info->gpio_op5, 0);
+ }
+ /*
+ else if(i==51){
+ gpio_direction_output(NKpdata_info->gpio_ip0, 1);
+ }
+ else if(i==50){
+ gpio_direction_output(NKpdata_info->gpio_ip0, 0);
+ }
+ else if(i==61){
+ gpio_direction_output(NKpdata_info->gpio_ip1, 1);
+ }
+ else if(i==60){
+ gpio_direction_output(NKpdata_info->gpio_ip1, 0);
+ }
+ else if(i==71){
+ gpio_direction_output(NKpdata_info->gpio_ip2, 1);
+ }
+ else if(i==70){
+ gpio_direction_output(NKpdata_info->gpio_ip2, 0);
+ }
+ else if(i==81){
+ gpio_direction_output(NKpdata_info->gpio_ip3, 1);
+ }
+ else if(i==80){
+ gpio_direction_output(NKpdata_info->gpio_ip3, 0);
+ }
+ */
+
+}
+
+EXPORT_SYMBOL_GPL(GPIO_IO_SET);
+
+#if 0
+static ssize_t en_4g_gpio_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
+{
+ sscanf(buf, "%d", &module_enable);
+ printk("store en_4g_gpio ouput =%d\n",module_enable);
+
+ if (module_enable)
+ {
+ printk("store en_4g_gpio output High \n");
+ MODULE_SET(11);
+ }
+ else {
+ MODULE_SET(10);
+ printk("store en_4g_gpio output Low \n");
+
+ }
+ return count;
+}
+
+static ssize_t en_4g_gpio_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+ module_enable = gpio_get_value(NKpdata_info->en_4g_gpio);
+ return snprintf(buf,3,"%d\n",module_enable);
+}
+
+
+
+static ssize_t gpio_op0_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
+{
+ sscanf(buf, "%d", &op0_enable);
+ printk("store_gpio_op0 ouput =%d\n",op0_enable);
+
+ if (op0_enable)
+ {
+ printk("store_gpio_op0 output High------konby\n");
+ GPIO_IO_SET(11);
+ }
+ else {
+ GPIO_IO_SET(10);
+ printk("tore_gpio_op0 output Low------konby\n");
+
+ }
+ return count;
+}
+
+static ssize_t gpio_op0_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+ op0_enable = gpio_get_value(NKpdata_info->gpio_op0);
+ return snprintf(buf,3,"%d\n",op0_enable);
+}
+
+static ssize_t gpio_op1_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
+{
+ sscanf(buf, "%d", &op1_enable);
+ printk("store_gpio_op1 ouput =%d\n",op1_enable);
+
+ if (op1_enable)
+ {
+ printk("store_gpio_op1 output High------konby\n");
+ GPIO_IO_SET(21);
+ }
+ else {
+ GPIO_IO_SET(20);
+ printk("tore_gpio_op1 output Low------konby\n");
+
+ }
+ return count;
+}
+
+static ssize_t gpio_op1_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+ op1_enable = gpio_get_value(NKpdata_info->gpio_op1);
+ return snprintf(buf,3,"%d\n",op1_enable);
+}
+
+static ssize_t gpio_op2_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
+{
+ sscanf(buf, "%d", &op2_enable);
+ printk("store_gpio_op2 ouput =%d\n",op2_enable);
+
+ if (op2_enable)
+ {
+ printk("store_gpio_op2 output High------konby\n");
+ GPIO_IO_SET(31);
+ }
+ else {
+ GPIO_IO_SET(30);
+ printk("tore_gpio_op2 output Low------konby\n");
+
+ }
+ return count;
+}
+
+static ssize_t gpio_op2_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+ op2_enable = gpio_get_value(NKpdata_info->gpio_op2);
+ return snprintf(buf,3,"%d\n",op2_enable);
+}
+
+static ssize_t gpio_op3_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
+{
+ sscanf(buf, "%d", &op3_enable);
+ printk("store_gpio_op3 ouput =%d\n",op3_enable);
+
+ if (op3_enable)
+ {
+ printk("store_gpio_op3 output High------konby\n");
+ GPIO_IO_SET(41);
+ }
+ else {
+ GPIO_IO_SET(40);
+ printk("tore_gpio_op3 output Low------konby\n");
+
+ }
+ return count;
+}
+
+static ssize_t gpio_op3_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+ op3_enable = gpio_get_value(NKpdata_info->gpio_op3);
+ return snprintf(buf,3,"%d\n",op3_enable);
+}
+
+static ssize_t gpio_op4_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
+{
+ sscanf(buf, "%d", &op4_enable);
+ printk("store_gpio_op3 ouput =%d\n",op4_enable);
+
+ if (op4_enable)
+ {
+ printk("store_gpio_op4 output High------konby\n");
+ GPIO_IO_SET(51);
+ }
+ else {
+ GPIO_IO_SET(50);
+ printk("tore_gpio_op4 output Low------konby\n");
+
+ }
+ return count;
+}
+
+static ssize_t gpio_op4_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+ op4_enable = gpio_get_value(NKpdata_info->gpio_op4);
+ return snprintf(buf,3,"%d\n",op4_enable);
+}
+
+static ssize_t gpio_op5_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
+{
+ sscanf(buf, "%d", &op5_enable);
+ printk("store_gpio_op5 ouput =%d\n",op5_enable);
+
+ if (op5_enable)
+ {
+ printk("store_gpio_op5 output High------konby\n");
+ GPIO_IO_SET(61);
+ }
+ else {
+ GPIO_IO_SET(60);
+ printk("tore_gpio_op5 output Low------konby\n");
+
+ }
+ return count;
+}
+
+static ssize_t gpio_op5_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+ op5_enable = gpio_get_value(NKpdata_info->gpio_op5);
+ return snprintf(buf,3,"%d\n",op5_enable);
+}
+
+
+
+
+static ssize_t gpio_ip0_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+ ip0_enable = gpio_get_value(NKpdata_info->gpio_ip0);
+ return snprintf(buf,3,"%d\n",ip0_enable);
+
+}
+
+static ssize_t gpio_ip1_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+ ip1_enable = gpio_get_value(NKpdata_info->gpio_ip1);
+ return snprintf(buf,3,"%d\n",ip1_enable);
+}
+
+static ssize_t gpio_ip2_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+ ip2_enable = gpio_get_value(NKpdata_info->gpio_ip2);
+ return snprintf(buf,3,"%d\n",ip2_enable);
+}
+
+static ssize_t gpio_ip3_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+ ip3_enable = gpio_get_value(NKpdata_info->gpio_ip3);
+ return snprintf(buf,3,"%d\n",ip3_enable);
+}
+
+static ssize_t gpio_ip4_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+ ip4_enable = gpio_get_value(NKpdata_info->gpio_ip4);
+ return snprintf(buf,3,"%d\n",ip4_enable);
+}
+
+static ssize_t gpio_ip5_show(struct class *class,struct class_attribute *attr, char *buf)
+{
+ ip5_enable = gpio_get_value(NKpdata_info->gpio_ip5);
+ return snprintf(buf,3,"%d\n",ip5_enable);
+}
+#endif
+
+
+#if 0
+static ssize_t gpio_ip0_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
+{
+ sscanf(buf, "%d", &ip0_enable);
+ printk("store_gpio_op3 ouput =%d\n",ip0_enable);
+
+ if (ip0_enable)
+ {
+ printk("store_gpio_op3 output High------konby\n");
+ GPIO_IO_SET(51);
+ }
+ else {
+ GPIO_IO_SET(50);
+ printk("tore_gpio_op3 output Low------konby\n");
+
+ }
+ return count;
+}
+
+static ssize_t gpio_ip1_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
+{
+ sscanf(buf, "%d", &ip1_enable);
+ printk("store_gpio_op3 ouput =%d\n",ip1_enable);
+
+ if (ip1_enable)
+ {
+ printk("store_gpio_op3 output High------konby\n");
+ GPIO_IO_SET(61);
+ }
+ else {
+ GPIO_IO_SET(60);
+ printk("tore_gpio_op3 output Low------konby\n");
+
+ }
+ return count;
+}
+
+static ssize_t gpio_ip2_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
+{
+ sscanf(buf, "%d", &ip2_enable);
+ printk("store_gpio_op3 ouput =%d\n",ip2_enable);
+
+ if (ip2_enable)
+ {
+ printk("store_gpio_op3 output High------konby\n");
+ GPIO_IO_SET(71);
+ }
+ else {
+ GPIO_IO_SET(70);
+ printk("tore_gpio_op3 output Low------konby\n");
+
+ }
+ return count;
+}
+
+static ssize_t gpio_ip3_store(struct class *class,struct class_attribute *attr, const char *buf, size_t count)
+{
+ sscanf(buf, "%d", &ip3_enable);
+ printk("store_gpio_op3 ouput =%d\n",ip3_enable);
+
+ if (ip3_enable)
+ {
+ printk("store_gpio_op3 output High------konby\n");
+ GPIO_IO_SET(81);
+ }
+ else {
+ GPIO_IO_SET(80);
+ printk("tore_gpio_op3 output Low------konby\n");
+
+ }
+ return count;
+}
+
+#endif
+
+
+
+#if 0
+
+//static CLASS_ATTR(en_4g_gpio, 0666, module_show, module_store);
+static CLASS_ATTR_RW(en_4g_gpio);
+
+
+//static CLASS_ATTR(gpio_op0, 0666, gpio_op0_show, gpio_op0_store);
+static CLASS_ATTR_RW(gpio_op0);
+//static CLASS_ATTR(gpio_op1, 0666, gpio_op1_show, gpio_op1_store);
+static CLASS_ATTR_RW(gpio_op1);
+//static CLASS_ATTR(gpio_op2, 0666, gpio_op2_show, gpio_op2_store);
+static CLASS_ATTR_RW(gpio_op2);
+//static CLASS_ATTR(gpio_op3, 0666, gpio_op3_show, gpio_op3_store);
+static CLASS_ATTR_RW(gpio_op3);
+//static CLASS_ATTR(gpio_op4, 0666, gpio_op4_show, gpio_op4_store);
+static CLASS_ATTR_RW(gpio_op4);
+//static CLASS_ATTR(gpio_op5, 0666, gpio_op5_show, gpio_op5_store);
+static CLASS_ATTR_RW(gpio_op5);
+
+
+
+//static CLASS_ATTR(gpio_ip0, 0666, gpio_ip0_show, NULL);
+static CLASS_ATTR_RO(gpio_ip0);
+//static CLASS_ATTR(gpio_ip1, 0666, gpio_ip1_show, NULL);
+static CLASS_ATTR_RO(gpio_ip1);
+//static CLASS_ATTR(gpio_ip2, 0666, gpio_ip2_show, NULL);
+static CLASS_ATTR_RO(gpio_ip2);
+//static CLASS_ATTR(gpio_ip3, 0666, gpio_ip3_show, NULL);
+static CLASS_ATTR_RO(gpio_ip3);
+//static CLASS_ATTR(gpio_ip4, 0666, gpio_ip4_show, NULL);
+static CLASS_ATTR_RO(gpio_ip4);
+//static CLASS_ATTR(gpio_ip5, 0666, gpio_ip5_show, NULL);
+static CLASS_ATTR_RO(gpio_ip5);
+
+
+#endif
+
+
+
+
+//ben
+static int nk_io_control_probe(struct platform_device *pdev)
+{
+ struct device_node *node = pdev->dev.of_node;
+ struct nk_io_pdata *pdata;
+ int gpio0, gpio1, gpio2, gpio3, reset_pin, ch342_reset;
+ int ret;
+ int lvds_index;
+ int i=0;
+ static int lvds_gpio[4] ;
+
+ enum of_gpio_flags flags;
+
+ printk(" #######nk_io_control_probe####### \n");
+
+ pdata = kzalloc(sizeof(struct nk_io_pdata), GFP_KERNEL);
+ if (pdata == NULL) {
+ printk("%s failed to allocate driver data\n",__FUNCTION__);
+ return -ENOMEM;
+ }
+ memset(pdata,0,sizeof(struct nk_io_pdata));
+
+ //vcc_5v_io
+#if 0
+ ret = of_get_named_gpio_flags(node, "vcc_5v_io", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property vcc_5v_io\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->vcc_5v_io = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->vcc_5v_io, "vcc_5v_io");
+ if(ret < 0){
+ printk("%s() devm_gpio_request vcc_5v_io request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->vcc_5v_io,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input vcc_5v_io set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+#endif
+ //tp_enable
+ ret = of_get_named_gpio_flags(node, "tp_enable", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property tp_enable\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->tp_enable = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->tp_enable, "tp_enable");
+ if(ret < 0){
+ printk("%s() devm_gpio_request tp_enable request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->tp_enable,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_output tp_enable set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //vcc_12v_io
+ ret = of_get_named_gpio_flags(node, "vcc_12v_io", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property vcc_12v_io\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->vcc_12v_io = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->vcc_12v_io, "vcc_12v_io");
+ if(ret < 0){
+ printk("%s() devm_gpio_request vcc_12v_io request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->vcc_12v_io,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input vcc_12v_io set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //hub_hos2_5V_gpio
+ ret = of_get_named_gpio_flags(node, "hub_host2_5v_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property hub_host2_5v_gpio\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->hub_host2_5v_gpio = ret;
+ gpio_free(ret);
+ ret = devm_gpio_request(&pdev->dev, pdata->hub_host2_5v_gpio, "hub_host2_5v_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request hub_host2_5v_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->hub_host2_5v_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_host2_5v_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //hub_host2_5V_rest_gpio
+ ret = of_get_named_gpio_flags(node, "hub_host2_5V_rest_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property hub_host2_5V_rest_gpio\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->hub_host2_5V_rest_gpio = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->hub_host2_5V_rest_gpio, "hub_host2_5V_rest_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request hub_host2_5V_rest_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->hub_host2_5V_rest_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_host2_5V_rest_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ msleep(800);
+ ret = gpio_direction_output(pdata->hub_host2_5V_rest_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_host2_5V_rest_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //hub_hos3_5V_gpio
+ ret = of_get_named_gpio_flags(node, "hub_host3_5v_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property hub_host3_5v_gpio\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->hub_host3_5v_gpio = ret;
+ gpio_free(ret);
+ ret = devm_gpio_request(&pdev->dev, pdata->hub_host3_5v_gpio, "hub_host3_5v_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request hub_host3_5v_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->hub_host3_5v_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_host3_5v_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //hub_host3_5V_rest_gpio
+ ret = of_get_named_gpio_flags(node, "hub_host3_5V_rest_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property hub_host3_5V_rest_gpio\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->hub_host3_5V_rest_gpio = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->hub_host3_5V_rest_gpio, "hub_host3_5V_rest_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request hub_host3_5V_rest_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->hub_host3_5V_rest_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_host3_5V_rest_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ msleep(800);
+ ret = gpio_direction_output(pdata->hub_host3_5V_rest_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_host3_5V_rest_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //wake_4g_gpio
+ ret = of_get_named_gpio_flags(node, "wake_4g_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property wake_4g_gpio\n", __FUNCTION__);
+ } else {
+ pdata->wake_4g_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->wake_4g_gpio, "wake_4g_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request wake_4g_gpio request ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(pdata->wake_4g_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input wake_4g_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+#if 0
+ //reset_4g_gpio
+ ret = of_get_named_gpio_flags(node, "reset_4g_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property reset_4g_gpio\n", __FUNCTION__);
+ } else {
+ pdata->reset_4g_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->reset_4g_gpio, "reset_4g_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request reset_4g_gpio request ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(pdata->reset_4g_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input reset_4g_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+ //en_4g_gpio
+ ret = of_get_named_gpio_flags(node, "en_4g_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property en_4g_gpio\n", __FUNCTION__);
+ } else {
+ pdata->en_4g_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->en_4g_gpio, "en_4g_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request en_4g_gpio request ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(pdata->en_4g_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input en_4g_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+
+ //air_mode_4g_gpio
+ ret = of_get_named_gpio_flags(node, "air_mode_4g_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property air_mode_4g_gpio\n", __FUNCTION__);
+ } else {
+ pdata->air_mode_4g_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->air_mode_4g_gpio, "air_mode_4g_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request air_mode_4g_gpio request ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(pdata->air_mode_4g_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input air_mode_4g_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+#endif
+/*
+ //edp_power_supply_gpio;
+ ret = of_get_named_gpio_flags(node, "edp_power_supply_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_power_supply_gpio\n", __FUNCTION__);
+ } else {
+ pdata->edp_power_supply_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->edp_power_supply_gpio, "edp_power_supply_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_power_supply_gpio request ERROR\n", __FUNCTION__);
+ }
+
+ ret = gpio_direction_output(pdata->edp_power_supply_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input edp_power_supply_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+*/
+ //edp_enable-gpio;
+#if 0
+ ret = of_get_named_gpio_flags(node, "edp_enable_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_enable_gpio\n", __FUNCTION__);
+ } else {
+ pdata->edp_enable_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->edp_enable_gpio, "edp_enable_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_enable_gpio request ERROR\n", __FUNCTION__);
+ }
+
+ ret = gpio_direction_output(pdata->edp_enable_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input edp_enable_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+#endif
+ //ch342_enable-gpio;
+ ret = of_get_named_gpio_flags(node, "ch342_power", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property ch342_gpio\n", __FUNCTION__);
+ } else {
+ pdata->ch342_power = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->ch342_power, "ch342_power");
+ if(ret < 0){
+ printk("%s() devm_gpio_request ch342_power request ERROR\n", __FUNCTION__);
+ }
+
+ ret = gpio_direction_output(pdata->ch342_power,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input ch342_power set ERROR\n", __FUNCTION__);
+ }
+ }
+
+
+ //edp_set_pixel-s
+ ret = of_get_named_gpio_flags(node, "edp_reset", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_reset\n", __FUNCTION__);
+ goto err;
+ }
+
+ reset_pin = ret;
+
+ // ch342_reset
+ ret = of_get_named_gpio_flags(node, "ch342_reset", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property ch342_reset\n", __FUNCTION__);
+ } else {
+ pdata->reset_ch342_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->reset_ch342_gpio, "ch342_reset");
+ if(ret < 0){
+ printk("%s() devm_gpio_request ch342_reset request ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(pdata->reset_ch342_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_output ch342_reset set ERROR\n", __FUNCTION__);
+ }
+// ch342_reset = ret;
+ }
+
+
+// enable lvds
+ ret = of_get_named_gpio_flags(node, "edp_gpio0", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_gpio0\n", __FUNCTION__);
+ goto err;
+ }
+ gpio0 = ret;
+
+
+
+ ret = of_get_named_gpio_flags(node, "edp_gpio1", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_gpio1\n", __FUNCTION__);
+ goto err;
+ }
+
+ gpio1 = ret;
+
+ ret = of_get_named_gpio_flags(node, "edp_gpio2", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_gpio2\n", __FUNCTION__);
+ goto err;
+ }
+
+ gpio2 = ret;
+
+ ret = of_get_named_gpio_flags(node, "edp_gpio3", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_gpio3\n", __FUNCTION__);
+ goto err;
+ }
+
+ gpio3 = ret;
+
+
+ ret = devm_gpio_request(&pdev->dev, reset_pin, "edp_reset");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_reset request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+
+ ret = devm_gpio_request(&pdev->dev, gpio0, "edp_gpio0");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_gpio0 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = devm_gpio_request(&pdev->dev, gpio1, "edp_gpio1");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_gpio1 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = devm_gpio_request(&pdev->dev, gpio2, "edp_gpio2");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_gpio2 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = devm_gpio_request(&pdev->dev, gpio3, "edp_gpio3");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_gpio3 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = of_property_read_u32(node, "nodka_lvds", &lvds_index);
+ if (ret < 0){
+ printk("%s() Can not read property nodka_lvds\n", __FUNCTION__);
+ }
+
+ printk("nodka_lvds_index = %d\n",lvds_index);
+
+ while ( i < 4 ){
+ if ( lvds_index > 0)
+ lvds_gpio[i] = lvds_index%2;
+ else
+ lvds_gpio[i] = 0;
+ printk("lvds_gpio[%d]=%d\n",i,lvds_gpio[i]);
+ lvds_index = lvds_index/2;
+ i++;
+ }
+
+ gpio_direction_output(reset_pin, 0);
+ usleep_range(80000, 100000);
+ gpio_direction_output(reset_pin, 1);
+ usleep_range(80000, 100000);
+
+// gpio_direction_output(ch342_reset, 0);
+// usleep_range(80000, 100000);
+// gpio_direction_output(ch342_reset, 1);
+// usleep_range(80000, 100000);
+
+/*
+ //gpio_op0
+ ret = of_get_named_gpio_flags(node, "gpio_op0", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property gpio_op0\n", __FUNCTION__);
+ goto err;
+ }
+
+ pdata->gpio_op0 = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->gpio_op0, "gpio_op0");
+ if(ret < 0){
+ printk("%s() devm_gpio_request gpio_op0 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ gpio_direction_output(pdata->gpio_op0, 1);
+*/
+
+ gpio_direction_output(gpio0, lvds_gpio[0]);
+ gpio_direction_output(gpio1, lvds_gpio[1]);
+ gpio_direction_output(gpio2, lvds_gpio[2]);
+ gpio_direction_output(gpio3, lvds_gpio[3]);
+
+ printk(" #######nk_io_control_probe end####### \n");
+ return 0;
+
+err:
+ kfree(pdata);
+ return ret;
+}
+
+//6 in 6 out-e
+#if 0
+static int nk_io_control_probe1(struct platform_device *pdev)
+{
+ struct device_node *node = pdev->dev.of_node;
+ struct nk_io_pdata *pdata;
+ int ret;
+ int gpio0, gpio1, gpio2, gpio3, reset_pin;
+ enum of_gpio_flags flags;
+ printk(" #######nk_io_control_probe####### \n");
+ //enable = 0 ;
+
+
+// ret = gpio_direction_output(74,0);
+// if(ret < 0){
+// printk("fuwei %s() gpio_direction_input vcc_12v_io set ERROR\n", __FUNCTION__);
+// goto err;
+// }
+
+
+ pdata = kzalloc(sizeof(struct nk_io_pdata), GFP_KERNEL);
+ if (pdata == NULL) {
+ printk("%s failed to allocate driver data\n",__FUNCTION__);
+ return -ENOMEM;
+ }
+ memset(pdata,0,sizeof(struct nk_io_pdata));
+
+
+ //edp_set_pixel-s
+ ret = of_get_named_gpio_flags(node, "edp_reset", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_reset\n", __FUNCTION__);
+ goto err;
+ }
+
+ reset_pin = ret;
+
+ ret = of_get_named_gpio_flags(node, "edp_gpio0", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_gpio0\n", __FUNCTION__);
+ goto err;
+ }
+
+ gpio0 = ret;
+
+ ret = of_get_named_gpio_flags(node, "edp_gpio1", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_gpio1\n", __FUNCTION__);
+ goto err;
+ }
+
+ gpio1 = ret;
+
+ ret = of_get_named_gpio_flags(node, "edp_gpio2", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_gpio2\n", __FUNCTION__);
+ goto err;
+ }
+
+ gpio2 = ret;
+
+ ret = of_get_named_gpio_flags(node, "edp_gpio3", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_gpio3\n", __FUNCTION__);
+ goto err;
+ }
+
+ gpio3 = ret;
+
+ ret = devm_gpio_request(&pdev->dev, reset_pin, "edp_reset");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_reset request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = devm_gpio_request(&pdev->dev, gpio0, "edp_gpio0");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_gpio0 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = devm_gpio_request(&pdev->dev, gpio1, "edp_gpio1");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_gpio1 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = devm_gpio_request(&pdev->dev, gpio2, "edp_gpio2");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_gpio2 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = devm_gpio_request(&pdev->dev, gpio3, "edp_gpio3");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_gpio3 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ gpio_direction_output(reset_pin, 0);
+ usleep_range(80000, 100000);
+ gpio_direction_output(reset_pin, 1);
+ usleep_range(80000, 100000);
+
+ gpio_direction_output(gpio0, 0);
+ gpio_direction_output(gpio1, 1);
+ gpio_direction_output(gpio2, 1);
+ gpio_direction_output(gpio3, 0);
+ printk("edp set pixels success.\r\n");
+
+ //edp_set_pixel-e
+
+ //6 in 6 out-s
+ //gpio_op0
+ ret = of_get_named_gpio_flags(node, "gpio_op0", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property gpio_op0\n", __FUNCTION__);
+ goto err;
+ }
+
+ pdata->gpio_op0 = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->gpio_op0, "gpio_op0");
+ if(ret < 0){
+ printk("%s() devm_gpio_request gpio_op0 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+
+ //gpio_op1
+ ret = of_get_named_gpio_flags(node, "gpio_op1", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property gpio_op1\n", __FUNCTION__);
+ goto err;
+ }
+
+ pdata->gpio_op1 = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->gpio_op1, "gpio_op1");
+ if(ret < 0){
+ printk("%s() devm_gpio_request gpio_op1 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+
+ //gpio_op2
+ ret = of_get_named_gpio_flags(node, "gpio_op2", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property gpio_op2\n", __FUNCTION__);
+ goto err;
+ }
+
+ pdata->gpio_op2 = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->gpio_op2, "gpio_op2");
+ if(ret < 0){
+ printk("%s() devm_gpio_request gpio_op2 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+
+
+ //gpio_op3
+ ret = of_get_named_gpio_flags(node, "gpio_op3", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property gpio_op3\n", __FUNCTION__);
+ goto err;
+ }
+
+ pdata->gpio_op3 = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->gpio_op3, "gpio_op3");
+ if(ret < 0){
+ printk("%s() devm_gpio_request gpio_op3 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ //gpio_op4
+ ret = of_get_named_gpio_flags(node, "gpio_op4", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property gpio_op4\n", __FUNCTION__);
+ goto err;
+ }
+
+ pdata->gpio_op4 = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->gpio_op4, "gpio_op4");
+ if(ret < 0){
+ printk("%s() devm_gpio_request gpio_op4 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ //gpio_op5
+ ret = of_get_named_gpio_flags(node, "gpio_op5", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property gpio_op5\n", __FUNCTION__);
+ goto err;
+ }
+
+ pdata->gpio_op5 = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->gpio_op5, "gpio_op5");
+ if(ret < 0){
+ printk("%s() devm_gpio_request gpio_op5 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+
+ //d4 low
+ gpio_direction_output(pdata->gpio_op0, 1);
+ gpio_direction_output(pdata->gpio_op1, 1);
+ gpio_direction_output(pdata->gpio_op2, 1);
+ gpio_direction_output(pdata->gpio_op3, 1);
+ gpio_direction_output(pdata->gpio_op4, 1);
+ gpio_direction_output(pdata->gpio_op5, 1);
+
+
+
+
+
+ //gpio_ip0
+ ret = of_get_named_gpio_flags(node, "gpio_ip0", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property gpio_ip0\n", __FUNCTION__);
+ goto err;
+ }
+
+ pdata->gpio_ip0 = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->gpio_ip0, "gpio_ip0");
+ if(ret < 0){
+ printk("%s() devm_gpio_request gpio_ip0 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ //gpio_ip1
+ ret = of_get_named_gpio_flags(node, "gpio_ip1", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property gpio_ip1\n", __FUNCTION__);
+ goto err;
+ }
+
+ pdata->gpio_ip1 = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->gpio_ip1, "gpio_ip1");
+ if(ret < 0){
+ printk("%s() devm_gpio_request gpio_ip1 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ //gpio_ip2
+ ret = of_get_named_gpio_flags(node, "gpio_ip2", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property gpio_ip2\n", __FUNCTION__);
+ goto err;
+ }
+
+ pdata->gpio_ip2 = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->gpio_ip2, "gpio_ip2");
+ if(ret < 0){
+ printk("%s() devm_gpio_request gpio_ip2 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ //gpio_ip3
+ ret = of_get_named_gpio_flags(node, "gpio_ip3", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property gpio_ip3\n", __FUNCTION__);
+ goto err;
+ }
+
+ pdata->gpio_ip3 = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->gpio_ip3, "gpio_ip3");
+ if(ret < 0){
+ printk("%s() devm_gpio_request gpio_ip3 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ //gpio_ip4
+ ret = of_get_named_gpio_flags(node, "gpio_ip4", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property gpio_ip4\n", __FUNCTION__);
+ goto err;
+ }
+
+ pdata->gpio_ip4 = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->gpio_ip4, "gpio_ip4");
+ if(ret < 0){
+ printk("%s() devm_gpio_request gpio_ip4 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ //gpio_ip5
+ ret = of_get_named_gpio_flags(node, "gpio_ip5", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property gpio_ip5\n", __FUNCTION__);
+ goto err;
+ }
+
+ pdata->gpio_ip5 = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->gpio_ip5, "gpio_ip3");
+ if(ret < 0){
+ printk("%s() devm_gpio_request gpio_ip5 request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ //d4 low
+ gpio_direction_input(pdata->gpio_ip0);
+ gpio_direction_input(pdata->gpio_ip1);
+ gpio_direction_input(pdata->gpio_ip2);
+ gpio_direction_input(pdata->gpio_ip3);
+ gpio_direction_input(pdata->gpio_ip4);
+ gpio_direction_input(pdata->gpio_ip5);
+
+
+ //6 in 6 out-e
+
+
+ //wake_4g_gpio
+ ret = of_get_named_gpio_flags(node, "wake_4g_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property wake_4g_gpio\n", __FUNCTION__);
+ } else {
+ pdata->wake_4g_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->wake_4g_gpio, "wake_4g_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request wake_4g_gpio request ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(pdata->wake_4g_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input wake_4g_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+
+ //reset_4g_gpio
+ ret = of_get_named_gpio_flags(node, "reset_4g_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property reset_4g_gpio\n", __FUNCTION__);
+ } else {
+ pdata->reset_4g_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->reset_4g_gpio, "reset_4g_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request reset_4g_gpio request ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(pdata->reset_4g_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input reset_4g_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+ //en_4g_gpio
+ ret = of_get_named_gpio_flags(node, "en_4g_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property en_4g_gpio\n", __FUNCTION__);
+ } else {
+ pdata->en_4g_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->en_4g_gpio, "en_4g_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request en_4g_gpio request ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(pdata->en_4g_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input en_4g_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+
+ //air_mode_4g_gpio
+ ret = of_get_named_gpio_flags(node, "air_mode_4g_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property air_mode_4g_gpio\n", __FUNCTION__);
+ } else {
+ pdata->air_mode_4g_gpio = ret;
+
+ ret = devm_gpio_request(&pdev->dev, pdata->air_mode_4g_gpio, "air_mode_4g_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request air_mode_4g_gpio request ERROR\n", __FUNCTION__);
+ }
+ ret = gpio_direction_output(pdata->air_mode_4g_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input air_mode_4g_gpio set ERROR\n", __FUNCTION__);
+ }
+ }
+
+
+
+
+
+ //mic_switch_gpio
+ ret = of_get_named_gpio_flags(node, "mic_switch_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property mic_switch_gpio\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->mic_switch_gpio = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->mic_switch_gpio, "mic_switch_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request mic_switch_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ ret = gpio_direction_output(pdata->mic_switch_gpio,0);
+ mic_enable = 0;
+ if(ret < 0){
+ printk("%s() gpio_direction_input mic_switch_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+#if 0
+ //vcc_5v_io
+ ret = of_get_named_gpio_flags(node, "vcc_5v_io", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property vcc_5v_io\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->vcc_5v_io = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->vcc_5v_io, "vcc_5v_io");
+ if(ret < 0){
+ printk("%s() devm_gpio_request vcc_5v_io request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->vcc_5v_io,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input vcc_5v_io set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+#endif
+ //vcc_3.3v_io
+ ret = of_get_named_gpio_flags(node, "vcc_3_3v_io", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property vcc_3_3v_io\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->vcc_3_3v_io = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->vcc_3_3v_io, "vcc_3_3v_io");
+ if(ret < 0){
+ printk("%s() devm_gpio_request vcc_3_3v_io request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->vcc_3_3v_io,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input vcc_3_3v_io set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //vcc_12v_io
+ ret = of_get_named_gpio_flags(node, "vcc_12v_io", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property vcc_12v_io\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->vcc_12v_io = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->vcc_12v_io, "vcc_12v_io");
+ if(ret < 0){
+ printk("%s() devm_gpio_request vcc_12v_io request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->vcc_12v_io,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input vcc_12v_io set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //hub_5V_gpio
+ ret = of_get_named_gpio_flags(node, "hub_5V_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property hub_5V_gpio\n", __FUNCTION__);
+ goto err;
+ } else {
+
+ pdata->hub_5V_gpio = ret;
+ gpio_free(ret);
+ ret = devm_gpio_request(&pdev->dev, pdata->hub_5V_gpio, "hub_5V_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request hub_5V_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->hub_5V_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_5V_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+
+ //hub_5V_rest_gpio
+ ret = of_get_named_gpio_flags(node, "hub_5V_rest_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property hub_5V_rest_gpio\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->hub_5V_rest_gpio = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->hub_5V_rest_gpio, "hub_5V_rest_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request hub_5V_rest_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->hub_5V_rest_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_5V_rest_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ msleep(800);
+ ret = gpio_direction_output(pdata->hub_5V_rest_gpio,1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input hub_5V_rest_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //audio_switch_gpio
+ ret = of_get_named_gpio_flags(node, "audio_switch_gpio", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property audio_switch_gpio\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->audio_switch_gpio = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->audio_switch_gpio, "audio_switch_gpio");
+ if(ret < 0){
+ printk("%s() devm_gpio_request audio_switch_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ ret = gpio_direction_output(pdata->audio_switch_gpio, !flags);
+ if(ret < 0){
+ printk("%s() gpio_direction_input audio_switch_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+ //led_ctl
+ ret = of_get_named_gpio_flags(node, "led_ctl", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property usb_5v_gpio\n", __FUNCTION__);
+ goto err;
+ } else {
+ pdata->led_gpio = ret;
+ ret = devm_gpio_request(&pdev->dev, pdata->led_gpio, "led_ctl");
+ if(ret < 0){
+ printk("%s() devm_gpio_request led_gpio request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(pdata->led_gpio,0);
+ if(ret < 0){
+ printk("%s() gpio_direction_input led_gpio set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+
+
+
+ printk("edp_bl_on ....\r\n");
+ ret = of_get_named_gpio_flags(node, "edp_bl_on", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_bl_on\n", __FUNCTION__);
+ goto err;
+ } else {
+ int gpio = ret;
+ ret = devm_gpio_request(&pdev->dev, gpio, "edp_bl_on");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_b1_on request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(gpio, !flags);
+ if(ret < 0){
+ printk("%s() gpio_direction_input edp_bl_on set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+ printk("edp_bl_on ....ok!\r\n");
+
+ printk("edp_bl_en ....\r\n");
+ ret = of_get_named_gpio_flags(node, "edp_bl_en", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property edp_bl_en\n", __FUNCTION__);
+ goto err;
+ } else {
+ int gpio = ret;
+ ret = devm_gpio_request(&pdev->dev, gpio, "edp_bl_en");
+ if(ret < 0){
+ printk("%s() devm_gpio_request edp_bl_en request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ ret = gpio_direction_output(gpio, !flags);
+ if(ret < 0){
+ printk("%s() gpio_direction_input edp_bl_en set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+ printk("edp_bl_en ....ok!\r\n");
+
+ printk("fan_io_en ....\r\n");
+ ret = of_get_named_gpio_flags(node, "fan_io_en", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property fan_io_en\n", __FUNCTION__);
+ goto err;
+ } else {
+ int gpio = ret;
+ ret = devm_gpio_request(&pdev->dev, gpio, "fan_io_en");
+ if(ret < 0){
+ printk("%s() devm_gpio_request fan_io_en request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(gpio, !flags);
+ if(ret < 0){
+ printk("%s() gpio_direction_input fan_io_en set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+ printk("fan_io_en ....ok!\r\n");
+
+
+ //pcie_wakeup for ap6256 BT_wake
+ /* Rfkill-bt.c bt driver config and set this pin already
+ printk("pcie_wakeup ....\r\n");
+
+ ret = of_get_named_gpio_flags(node, "pcie_wakeup", 0, &flags);
+ if (ret < 0) {
+ printk("%s() Can not read property pcie_wakeup\n", __FUNCTION__);
+ goto err;
+ } else {
+ int gpio = ret;
+ ret = devm_gpio_request(&pdev->dev, gpio, "pcie_wakeup");
+ if(ret < 0){
+ printk("%s() devm_gpio_request pcie_wakeup request ERROR\n", __FUNCTION__);
+ goto err;
+ }
+
+ ret = gpio_direction_output(gpio, 1);
+ if(ret < 0){
+ printk("%s() gpio_direction_input pcie_wakeup set ERROR\n", __FUNCTION__);
+ goto err;
+ }
+ }
+ printk("pcie_wakeup ....ok!\r\n");
+ */
+
+
+ nk_class = class_create(THIS_MODULE, "io_control");
+#if 0
+ ret = class_create_file(nk_class, &class_attr_en_4g_gpio);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat en_4g_gpio class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create io_control en_4g_gpio OK !!!!\n");
+
+ ret = class_create_file(nk_class, &class_attr_gpio_op0);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat gpio_op0 class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create io_control gpio_op0 OK !!!!\n");
+
+ ret = class_create_file(nk_class, &class_attr_gpio_op1);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat gpio_op1 class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create io_control gpio_op1 OK !!!!\n");
+
+ ret = class_create_file(nk_class, &class_attr_gpio_op2);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat gpio_op2 class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create io_control gpio_op2 OK !!!!\n");
+
+ ret = class_create_file(nk_class, &class_attr_gpio_op3);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat gpio_op3 class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create io_control gpio_op3 OK !!!!\n");
+
+ ret = class_create_file(nk_class, &class_attr_gpio_op4);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat gpio_op4 class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create io_control gpio_op4 OK !!!!\n");
+
+ ret = class_create_file(nk_class, &class_attr_gpio_op5);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat gpio_op5 class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create io_control gpio_op5 OK !!!!\n");
+
+ ret = class_create_file(nk_class, &class_attr_gpio_ip0);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat gpio_ip0 class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create io_control gpio_ip0 OK !!!!\n");
+
+ ret = class_create_file(nk_class, &class_attr_gpio_ip1);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat gpio_ip1 class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create io_control gpio_ip1 OK !!!!\n");
+
+ ret = class_create_file(nk_class, &class_attr_gpio_ip2);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat gpio_ip2 class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create io_control gpio_ip2 OK !!!!\n");
+
+ ret = class_create_file(nk_class, &class_attr_gpio_ip3);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat gpio_ip3 class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create io_control gpio_ip3 OK !!!!\n");
+
+ ret = class_create_file(nk_class, &class_attr_gpio_ip4);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat gpio_ip4 class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create io_control gpio_ip4 OK !!!!\n");
+
+ ret = class_create_file(nk_class, &class_attr_gpio_ip5);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat gpio_ip5 class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create io_control gpio_ip5 OK !!!!\n");
+
+ ret = class_create_file(nk_class, &class_attr_led_display);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat led_display class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create nk_io_control led OK !!!!\n");
+
+ ret = class_create_file(nk_class, &class_attr_mic_switch);
+ if (ret) {
+ printk(KERN_ERR "%s:Fail to creat mic_switch class file\n", __func__);
+ return ret;
+ }else
+ printk("class_create nk_io_control mic OK !!!!\n");
+#endif
+
+ NKpdata_info = pdata;
+
+ printk(" #######nk_io_control_probe end####### \n");
+ return 0;
+err:
+ kfree(pdata);
+ return ret;
+}
+#endif
+
+static int nk_io_control_remove(struct platform_device *pdev)
+{
+ if(NKpdata_info)
+ kfree(NKpdata_info);
+ return 0;
+}
+
+static int nk_io_control_suspend(struct platform_device *pdev, pm_message_t state)
+{
+ printk("LED_early_suspend LED_early_suspend LED_early_suspend !!!!\n");
+
+ //enable = 0;
+ //LED_SET(0);
+ return 0;
+}
+
+static int nk_io_control_resume(struct platform_device *pdev)
+{
+ int ret,reset_pin;
+ printk("nk_io resume !!!!\n");
+ ret = gpio_get_value(120);
+ printk("edp_reset gpio value : %d\n",ret);
+
+ usleep_range(80000, 100000);
+ gpio_set_value(120,0);
+// gpio_direction_output(120, 0);
+ usleep_range(80000, 100000);
+ ret = gpio_get_value(120);
+ printk("edp_reset gpio value : %d\n",ret);
+// gpio_direction_output(120, 1);
+ gpio_set_value(120,1);
+ usleep_range(80000, 100000);
+ ret = gpio_get_value(120);
+ printk("edp_reset gpio value : %d\n",ret);
+
+ //enable = 1;
+ //LED_SET(11);
+ return 0;
+}
+
+static const struct of_device_id nk_io_control_of_match[] = {
+ { .compatible = "nk_io_control", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, nk_io_control_of_match);
+
+static struct platform_driver nk_io_control_driver = {
+ .probe = nk_io_control_probe,
+ .remove = nk_io_control_remove,
+ .resume = nk_io_control_resume,
+ .suspend = nk_io_control_suspend,
+ .driver = {
+ .name = "nk_io_control",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(nk_io_control_of_match),
+ },
+};
+
+static int __init nk_io_control_init(void)
+{
+ platform_driver_register(&nk_io_control_driver);
+ return 0;
+}
+
+static void __exit nk_io_control_exit(void)
+{
+ platform_driver_unregister(&nk_io_control_driver);
+}
+
+subsys_initcall(nk_io_control_init);
+
+//late_initcall(nk_io_control_init);
+MODULE_DESCRIPTION("nk io Core Driver");
+MODULE_LICENSE("GPL");
diff --git a/kernel/drivers/misc/nkio/nkio.h b/kernel/drivers/misc/nkio/nkio.h
new file mode 100755
index 0000000..e94e17f
--- /dev/null
+++ b/kernel/drivers/misc/nkio/nkio.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef NK_IO_H
+#define NK_IO_H
+
+struct nk_io_pdata{
+ unsigned int vcc_5v_io;
+ unsigned int vcc_3_3v_io;
+ unsigned int vcc_12v_io;
+ unsigned int usb_5v_gpio;
+ //unsigned int hub_5V_rest_gpio;
+ //unsigned int hub_5V_gpio;
+ unsigned int led_gpio;
+ unsigned int mic_switch_gpio;
+ unsigned int audio_switch_gpio;
+ unsigned int wake_4g_gpio;
+ unsigned int reset_4g_gpio;
+ unsigned int en_4g_gpio;
+ unsigned int air_mode_4g_gpio;
+ unsigned int usb_en_oc_gpio;
+ unsigned int lcd_bk_en_gpio;
+ unsigned int lcd_pwblk_gpio;
+ unsigned int vcc3_io_en_gpio;
+
+ unsigned int hub_host2_5V_rest_gpio;
+ unsigned int hub_host2_5v_gpio;
+ unsigned int hub_host3_5V_rest_gpio;
+ unsigned int hub_host3_5v_gpio;
+ unsigned int edp_power_supply_gpio;
+ unsigned int edp_enable_gpio;
+ unsigned int tp_enable;
+ unsigned int vddio_mipi;
+// unsigned int tp_reset;
+};
+
+#endif
+
diff --git a/kernel/drivers/misc/nkmcu/Makefile b/kernel/drivers/misc/nkmcu/Makefile
new file mode 100644
index 0000000..aca06fb
--- /dev/null
+++ b/kernel/drivers/misc/nkmcu/Makefile
@@ -0,0 +1 @@
+obj-y += nk_mcu.o
diff --git a/kernel/drivers/misc/nkmcu/nk_mcu.c b/kernel/drivers/misc/nkmcu/nk_mcu.c
new file mode 100755
index 0000000..b0702be
--- /dev/null
+++ b/kernel/drivers/misc/nkmcu/nk_mcu.c
@@ -0,0 +1,161 @@
+#include <linux/module.h>
+#include <linux/clk-provider.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+
+static struct i2c_client s_m_client;
+static struct i2c_client* m_client;
+
+//写16位寄存器
+static inline int nkmcu_reg_write(struct i2c_client *client,int index,unsigned short reg, unsigned char val)
+{
+ unsigned char u8_buf[3] = { 0 };
+ unsigned int buf_len = 3;
+ int retry, timeout = 5;
+ int ret;
+
+ ret = 0;
+ u8_buf[0] = (reg >> 8) & 0xFF;//寄存器地址高位
+ u8_buf[1] = reg & 0xFF; //寄存器地址低位
+ u8_buf[2] = val; //要发送的数据
+
+ //pdata->client->addr = ADDR + index;
+ for (retry = 0; retry < timeout; retry++)
+ {
+ if (i2c_master_send(client, u8_buf, buf_len) < 0)
+ {
+ pr_err("%s:write reg error: reg=0x%x, val=0x%x, retry = %d.\n", __func__, reg, val, retry);
+ ret = -1;
+ msleep(5);
+ continue;
+ }
+ else
+ {
+ pr_err("%s:write reg ok: reg=0x%x, val=0x%x, retry = %d.\n", __func__, reg, val, retry);
+ ret = 0;
+ break;
+ }
+ }
+ return ret;
+}
+
+//16位读
+static inline int nkmcu_reg_read(struct i2c_client *client, int index, unsigned short reg)
+{
+ unsigned char u8_buf[2] = { 0 };
+ unsigned int buf_len = 2;
+ int retry, timeout = 5;
+ unsigned char u8_val = 0;
+
+ u8_buf[0] = (reg >> 8) & 0xFF;//寄存器地址高位
+ u8_buf[1] = reg & 0xFF;//寄存器地址低位
+
+ //pdata->client->addr = ADDR + index;
+ for (retry = 0; retry < timeout; retry++)
+ {
+ if (i2c_master_send(client, u8_buf, buf_len) < 0)
+ {
+ pr_err("%s:read reg error on send: reg=0x%x, retry = %d.\n", __func__, reg, retry);
+ msleep(5);
+ continue;
+ }
+ if (i2c_master_recv(client, &u8_val, 1) != 1) {
+ pr_err("%s:read reg error on recv: reg=0x%x, retry = %d.\n", __func__, reg, retry);
+ msleep(5);
+ continue;
+ }
+ break;
+ }
+
+ if (retry >= timeout) {
+ pr_err("%s:read reg error: reg=0x%x.\n", __func__, reg);
+ return -1;
+ }
+
+ return u8_val;
+}
+
+void nkmcu_device_shutdown(void)
+{
+ int ret;
+
+ pr_err("nkmcu_device_shutdown.. \n");
+
+ //powenoff
+ if (m_client != NULL)
+ {
+ ret = nkmcu_reg_write(m_client, 0x00, 0x06, 0x01);
+ if (ret < 0)
+ pr_err("nkmcu_device_shutdown..failed \n");
+ else
+ pr_err("nkmcu_device_shutdown.. ok \n");
+ }
+
+}
+EXPORT_SYMBOL(nkmcu_device_shutdown);
+
+static int nk_mcu_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+ struct device_node *np = client->dev.of_node;
+ int ret;
+
+ printk("%s: probe\n", __FUNCTION__);
+
+ /* check state of calendar information */
+ //device id
+ //i2c_smbus_read_word_data
+ msleep(100);
+ //ret = i2c_smbus_read_byte_data(client, 0x00);
+ ret = nkmcu_reg_read(client, 0x00, 0x00);
+ printk("device id:%x \n", ret);
+ if (ret != 0xaa)
+ goto error;
+
+ //powenon
+ msleep(100);
+ //ret = i2c_smbus_write_word_data(client, 0x07, 0x01);
+ ret = nkmcu_reg_write(client, 0x00, 0x07, 0x01);
+ printk("poweron command:%x \n", ret);
+ if (ret < 0)
+ goto error;
+
+ //m_client = client;
+ memcpy(&s_m_client, client, sizeof(struct i2c_client));
+ m_client = &s_m_client;
+ return 0;
+
+error:
+ return -1;
+}
+
+static const struct i2c_device_id nk_mcu_id[] = {
+ { "nk_mcu", 0 },
+ { }
+};
+
+static struct i2c_driver nk_mcu_driver = {
+ .driver = {
+ .name = "nk_mcu",
+ .owner = THIS_MODULE,
+ },
+ .probe = nk_mcu_probe,
+ .id_table = nk_mcu_id,
+};
+
+static int __init nk_mcu_init(void)
+{
+ return i2c_add_driver(&nk_mcu_driver);
+}
+
+static void __exit nk_mcu_exit(void)
+{
+ i2c_del_driver(&nk_mcu_driver);
+}
+
+
+MODULE_AUTHOR("ben@hotmail.com");
+MODULE_DESCRIPTION("nodka mcu driver");
+MODULE_LICENSE("GPL");
+
+late_initcall(nk_mcu_init);
+module_exit(nk_mcu_exit);
diff --git a/mk-rootfs.sh b/mk-rootfs.sh
new file mode 100755
index 0000000..c654dec
--- /dev/null
+++ b/mk-rootfs.sh
@@ -0,0 +1,50 @@
+#!/bin/bash -e
+TARGET_ROOTFS_DIR=./debian/debian_rootfs
+MOUNTPOINT=./temp
+ROOTFSIMAGE=rootfs.ext4
+OUT=$PWD/tools/linux/Linux_Pack_Firmware/rockdev/Image/
+
+echo Making rootfs!
+
+if [ -e ${ROOTFSIMAGE} ]; then
+ rm ${ROOTFSIMAGE}
+fi
+if [ -e ${MOUNTPOINT} ]; then
+ rm -r ${MOUNTPOINT}
+fi
+
+# Create directories
+mkdir ${MOUNTPOINT}
+dd if=/dev/zero of=${ROOTFSIMAGE} bs=1M count=0 seek=4300
+
+finish() {
+ sudo umount ${MOUNTPOINT} || true
+ echo -e "\e[31m MAKE ROOTFS FAILED.\e[0m"
+ exit -1
+}
+
+echo Format rootfs to ext4
+mkfs.ext4 ${ROOTFSIMAGE}
+
+echo Mount rootfs to ${MOUNTPOINT}
+sudo mount ${ROOTFSIMAGE} ${MOUNTPOINT}
+trap finish ERR
+
+echo Copy rootfs to ${MOUNTPOINT}
+sudo cp -rvfp ${TARGET_ROOTFS_DIR}/* ${MOUNTPOINT}
+sync
+
+
+echo Umount rootfs
+sudo umount ${MOUNTPOINT}
+
+echo Rootfs Image: ${ROOTFSIMAGE}
+
+e2fsck -p -f ${ROOTFSIMAGE}
+resize2fs -M ${ROOTFSIMAGE}
+
+#[ ! -d ${OUT} ] && mkdir ${OUT}
+cp $ROOTFSIMAGE ${OUT}
+
+unlink $ROOTFSIMAGE
+cd ..
--
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