From 08f87f769b595151be1afeff53e144f543faa614 Mon Sep 17 00:00:00 2001 From: hc <hc@nodka.com> Date: Wed, 06 Dec 2023 09:51:13 +0000 Subject: [PATCH] add dts config --- kernel/drivers/clk/renesas/r8a7791-cpg-mssr.c | 7 ++----- 1 files changed, 2 insertions(+), 5 deletions(-) diff --git a/kernel/drivers/clk/renesas/r8a7791-cpg-mssr.c b/kernel/drivers/clk/renesas/r8a7791-cpg-mssr.c index 1b91f03..a0de784 100644 --- a/kernel/drivers/clk/renesas/r8a7791-cpg-mssr.c +++ b/kernel/drivers/clk/renesas/r8a7791-cpg-mssr.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * r8a7791 Clock Pulse Generator / Module Standby and Software Reset * @@ -6,10 +7,6 @@ * Based on clk-rcar-gen2.c * * Copyright (C) 2013 Ideas On Board SPRL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. */ #include <linux/device.h> @@ -105,7 +102,7 @@ DEF_MOD("tmu0", 125, R8A7791_CLK_CP), DEF_MOD("vsp1du1", 127, R8A7791_CLK_ZS), DEF_MOD("vsp1du0", 128, R8A7791_CLK_ZS), - DEF_MOD("vsp1-sy", 131, R8A7791_CLK_ZS), + DEF_MOD("vsps", 131, R8A7791_CLK_ZS), DEF_MOD("scifa2", 202, R8A7791_CLK_MP), DEF_MOD("scifa1", 203, R8A7791_CLK_MP), DEF_MOD("scifa0", 204, R8A7791_CLK_MP), -- Gitblit v1.6.2