From 9370bb92b2d16684ee45cf24e879c93c509162da Mon Sep 17 00:00:00 2001 From: hc <hc@nodka.com> Date: Thu, 19 Dec 2024 01:47:39 +0000 Subject: [PATCH] add wifi6 8852be driver --- kernel/drivers/clk/rockchip/clk.c | 49 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 49 insertions(+), 0 deletions(-) diff --git a/kernel/drivers/clk/rockchip/clk.c b/kernel/drivers/clk/rockchip/clk.c index d0c32dd..1c91007 100644 --- a/kernel/drivers/clk/rockchip/clk.c +++ b/kernel/drivers/clk/rockchip/clk.c @@ -24,6 +24,10 @@ #include <linux/rational.h> #include "clk.h" +#ifdef MODULE +static HLIST_HEAD(clk_ctx_list); +#endif + /** * Register a clock branch. * Most clock branches have a form like @@ -185,6 +189,14 @@ struct clk_hw *p_parent; unsigned long scale; + if (rate == 0) { + pr_warn("%s p_rate(%ld), rate(%ld), maybe invalid frequency setting!\n", + clk_hw_get_name(hw), *parent_rate, rate); + *m = 0; + *n = 1; + return; + } + p_rate = clk_hw_get_rate(clk_hw_get_parent(hw)); if ((rate * 20 > p_rate) && (p_rate % rate != 0)) { p_parent = clk_hw_get_parent(clk_hw_get_parent(hw)); @@ -221,6 +233,13 @@ * for m and n. In the result it will be the nearest rate left shifted * by (scale - fd->nwidth) bits. */ + if (*parent_rate == 0) { + pr_warn("%s p_rate(%ld), rate(%ld), maybe invalid frequency setting!\n", + clk_hw_get_name(hw), *parent_rate, rate); + *m = 0; + *n = 1; + return; + } scale = fls_long(*parent_rate / rate - 1); if (scale > fd->nwidth) rate <<= scale - fd->nwidth; @@ -417,6 +436,10 @@ "rockchip,grf"); ctx->pmugrf = syscon_regmap_lookup_by_phandle(ctx->cru_node, "rockchip,pmugrf"); + +#ifdef MODULE + hlist_add_head(&ctx->list_node, &clk_ctx_list); +#endif return ctx; @@ -783,4 +806,30 @@ } EXPORT_SYMBOL_GPL(rockchip_clk_unprotect); + +void rockchip_clk_disable_unused(void) +{ + struct rockchip_clk_provider *ctx; + struct clk *clk; + struct clk_hw *hw; + int i = 0, flag = 0; + + hlist_for_each_entry(ctx, &clk_ctx_list, list_node) { + for (i = 0; i < ctx->clk_data.clk_num; i++) { + clk = ctx->clk_data.clks[i]; + if (clk && !IS_ERR(clk)) { + hw = __clk_get_hw(clk); + if (hw) + flag = clk_hw_get_flags(hw); + if (flag & CLK_IGNORE_UNUSED) + continue; + if (flag & CLK_IS_CRITICAL) + continue; + clk_prepare_enable(clk); + clk_disable_unprepare(clk); + } + } + } +} +EXPORT_SYMBOL_GPL(rockchip_clk_disable_unused); #endif /* MODULE */ -- Gitblit v1.6.2