From 9370bb92b2d16684ee45cf24e879c93c509162da Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Thu, 19 Dec 2024 01:47:39 +0000
Subject: [PATCH] add wifi6 8852be driver
---
kernel/drivers/clk/rockchip/clk-rk3568.c | 18 +++++++++++++++---
1 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/kernel/drivers/clk/rockchip/clk-rk3568.c b/kernel/drivers/clk/rockchip/clk-rk3568.c
index 5c10de9..0f5ed13 100644
--- a/kernel/drivers/clk/rockchip/clk-rk3568.c
+++ b/kernel/drivers/clk/rockchip/clk-rk3568.c
@@ -1068,13 +1068,13 @@
RK3568_CLKGATE_CON(20), 8, GFLAGS),
GATE(HCLK_VOP, "hclk_vop", "hclk_vo", 0,
RK3568_CLKGATE_CON(20), 9, GFLAGS),
- COMPOSITE(DCLK_VOP0, "dclk_vop0", hpll_vpll_gpll_cpll_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
+ COMPOSITE(DCLK_VOP0, "dclk_vop0", hpll_vpll_gpll_cpll_p, CLK_SET_RATE_NO_REPARENT,
RK3568_CLKSEL_CON(39), 10, 2, MFLAGS, 0, 8, DFLAGS,
RK3568_CLKGATE_CON(20), 10, GFLAGS),
- COMPOSITE(DCLK_VOP1, "dclk_vop1", hpll_vpll_gpll_cpll_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
+ COMPOSITE(DCLK_VOP1, "dclk_vop1", hpll_vpll_gpll_cpll_p, CLK_SET_RATE_NO_REPARENT,
RK3568_CLKSEL_CON(40), 10, 2, MFLAGS, 0, 8, DFLAGS,
RK3568_CLKGATE_CON(20), 11, GFLAGS),
- COMPOSITE(DCLK_VOP2, "dclk_vop2", hpll_vpll_gpll_cpll_p, 0,
+ COMPOSITE(DCLK_VOP2, "dclk_vop2", hpll_vpll_gpll_cpll_p, CLK_SET_RATE_NO_REPARENT,
RK3568_CLKSEL_CON(41), 10, 2, MFLAGS, 0, 8, DFLAGS,
RK3568_CLKGATE_CON(20), 12, GFLAGS),
GATE(CLK_VOP_PWM, "clk_vop_pwm", "xin24m", 0,
@@ -1618,6 +1618,16 @@
}
}
+static int protect_clocks[] = {
+ ACLK_VO,
+ HCLK_VO,
+ ACLK_VOP,
+ HCLK_VOP,
+ DCLK_VOP0,
+ DCLK_VOP1,
+ DCLK_VOP2,
+};
+
static void __init rk3568_pmu_clk_init(struct device_node *np)
{
struct rockchip_clk_provider *ctx;
@@ -1695,6 +1705,8 @@
if (!rk_dump_cru)
rk_dump_cru = rk3568_dump_cru;
+
+ rockchip_clk_protect(ctx, protect_clocks, ARRAY_SIZE(protect_clocks));
}
CLK_OF_DECLARE(rk3568_cru, "rockchip,rk3568-cru", rk3568_clk_init);
--
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