From 9370bb92b2d16684ee45cf24e879c93c509162da Mon Sep 17 00:00:00 2001 From: hc <hc@nodka.com> Date: Thu, 19 Dec 2024 01:47:39 +0000 Subject: [PATCH] add wifi6 8852be driver --- kernel/drivers/clk/rockchip/Kconfig | 171 +++++++++++++++++++++++++++++++++++++++++++++++++++----- 1 files changed, 155 insertions(+), 16 deletions(-) diff --git a/kernel/drivers/clk/rockchip/Kconfig b/kernel/drivers/clk/rockchip/Kconfig index cacc74e..3a1840f 100644 --- a/kernel/drivers/clk/rockchip/Kconfig +++ b/kernel/drivers/clk/rockchip/Kconfig @@ -9,10 +9,142 @@ Say y here to enable common clock controller for Rockchip platforms. if COMMON_CLK_ROCKCHIP +config CLK_PX30 + tristate "Rockchip PX30 clock controller support" + depends on CPU_PX30 || COMPILE_TEST + default y + help + Build the driver for PX30 Clock Driver. + +config CLK_RV1106 + tristate "Rockchip RV1106 clock controller support" + depends on CPU_RV1106 || COMPILE_TEST + default y + help + Build the driver for RV1106 Clock Driver. + +config CLK_RV1108 + tristate "Rockchip RV1108 clock controller support" + depends on CPU_RV1108 || COMPILE_TEST + default y + help + Build the driver for RV1108 Clock Driver. + +config CLK_RV1126 + tristate "Rockchip RV1126 clock controller support" + depends on CPU_RV1126 || COMPILE_TEST + default y + help + Build the driver for RV1126 Clock Driver. + +config CLK_RK1808 + tristate "Rockchip RK1808 clock controller support" + depends on CPU_RK1808 || COMPILE_TEST + default y + help + Build the driver for RK1808 Clock Driver. + +config CLK_RK3036 + tristate "Rockchip RK3036 clock controller support" + depends on CPU_RK3036 || COMPILE_TEST + default y + help + Build the driver for RK3036 Clock Driver. + +config CLK_RK312X + tristate "Rockchip RK312x clock controller support" + depends on CPU_RK312X || COMPILE_TEST + default y + help + Build the driver for RK312x Clock Driver. + +config CLK_RK3188 + tristate "Rockchip RK3188 clock controller support" + depends on CPU_RK3188 || COMPILE_TEST + default y + help + Build the driver for RK3188 Clock Driver. + +config CLK_RK322X + tristate "Rockchip RK322x clock controller support" + depends on CPU_RK322X || COMPILE_TEST + default y + help + Build the driver for RK322x Clock Driver. + +config CLK_RK3288 + tristate "Rockchip RK3288 clock controller support" + depends on CPU_RK3288 || COMPILE_TEST + default y + help + Build the driver for RK3288 Clock Driver. + +config CLK_RK3308 + tristate "Rockchip RK3308 clock controller support" + depends on CPU_RK3308 || COMPILE_TEST + default y + help + Build the driver for RK3308 Clock Driver. + +config CLK_RK3328 + tristate "Rockchip RK3328 clock controller support" + depends on CPU_RK3328 || COMPILE_TEST + default y + help + Build the driver for RK3328 Clock Driver. + +config CLK_RK3368 + tristate "Rockchip RK3368 clock controller support" + depends on CPU_RK3368 || COMPILE_TEST + default y + help + Build the driver for RK3368 Clock Driver. + +config CLK_RK3399 + tristate "Rockchip RK3399 clock controller support" + depends on CPU_RK3399 || COMPILE_TEST + default y + help + Build the driver for RK3399 Clock Driver. + +config CLK_RK3528 + tristate "Rockchip RK3528 clock controller support" + depends on CPU_RK3528 || COMPILE_TEST + default y + help + Build the driver for RK3528 Clock Driver. + +config CLK_RK3562 + tristate "Rockchip RK3562 clock controller support" + depends on CPU_RK3562 || COMPILE_TEST + default y + help + Build the driver for RK3562 Clock Driver. + +config CLK_RK3568 + tristate "Rockchip RK3568 clock controller support" + depends on CPU_RK3568 || COMPILE_TEST + default y + help + Build the driver for RK3568 Clock Driver. + +config CLK_RK3588 + tristate "Rockchip RK3588 clock controller support" + depends on CPU_RK3588 || COMPILE_TEST + default y + help + Build the driver for RK3588 Clock Driver. + config ROCKCHIP_CLK_COMPENSATION bool "Rockchip Clk Compensation" help Say y here to enable clk compensation(+/- 1000 ppm). + +config ROCKCHIP_CLK_LINK + tristate "Rockchip clock link support" + default CLK_RK3562 || CLK_RK3588 + help + Say y here to enable clock link for Rockchip. config ROCKCHIP_CLK_BOOST bool "Rockchip Clk Boost" @@ -22,39 +154,39 @@ config ROCKCHIP_CLK_INV bool "Rockchip Clk Inverter" - default y if !CPU_RV1126 + default y if !CPU_RV1126 && !CPU_RV1106 help Say y here to enable clk Inverter. config ROCKCHIP_CLK_OUT tristate "Rockchip Clk Out / Input Switch" - default y if !CPU_RV1126 + default y if !ROCKCHIP_MINI_KERNEL help Say y here to enable clk out / input switch. config ROCKCHIP_CLK_PVTM bool "Rockchip Clk Pvtm" - default y if !CPU_RV1126 + default y if !CPU_RV1126 && !CPU_RV1106 help Say y here to enable clk pvtm. -config ROCKCHIP_DCLK_DIV - bool "Rockchip Dclk Divider" - default y if !CPU_RV1126 - help - Say y here to enable dclk divider. - -config ROCKCHIP_DDRCLK_SCPI - bool "Rockchip DDR Clk SCPI" - default y if RK3368_SCPI_PROTOCOL - help - Say y here to enable ddr clk scpi. +config ROCKCHIP_DDRCLK + bool config ROCKCHIP_DDRCLK_SIP bool "Rockchip DDR Clk SIP" default y if CPU_RK3399 + select ROCKCHIP_DDRCLK help Say y here to enable ddr clk sip. + +config ROCKCHIP_DDRCLK_SIP_V2 + bool "Rockchip DDR Clk SIP V2" + default y if CPU_PX30 || CPU_RK1808 || CPU_RK312X || CPU_RK322X || \ + CPU_RK3288 || CPU_RK3308 || CPU_RK3328 || CPU_RV1126 + select ROCKCHIP_DDRCLK + help + Say y here to enable ddr clk sip v2. config ROCKCHIP_PLL_RK3066 bool "Rockchip PLL Type RK3066" @@ -65,9 +197,16 @@ config ROCKCHIP_PLL_RK3399 bool "Rockchip PLL Type RK3399" - default y if CPU_RK3399 || CPU_RV110X + default y if CPU_RK3399 || CPU_RV1108 help Say y here to enable pll type is rk3399. -endif + +config ROCKCHIP_PLL_RK3588 + bool "Rockchip PLL Type RK3588" + default y if CPU_RK3588 + help + Say y here to enable pll type is rk3588. source "drivers/clk/rockchip/regmap/Kconfig" + +endif -- Gitblit v1.6.2