From f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 Mon Sep 17 00:00:00 2001 From: hc <hc@nodka.com> Date: Wed, 31 Jan 2024 01:04:47 +0000 Subject: [PATCH] add driver 5G --- kernel/drivers/pinctrl/tegra/pinctrl-tegra20.c | 16 ++++------------ 1 files changed, 4 insertions(+), 12 deletions(-) diff --git a/kernel/drivers/pinctrl/tegra/pinctrl-tegra20.c b/kernel/drivers/pinctrl/tegra/pinctrl-tegra20.c index 1fc82a9..0dc2cf0 100644 --- a/kernel/drivers/pinctrl/tegra/pinctrl-tegra20.c +++ b/kernel/drivers/pinctrl/tegra/pinctrl-tegra20.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Pinctrl data for the NVIDIA Tegra20 pinmux * @@ -8,15 +9,6 @@ * Derived from code: * Copyright (C) 2010 Google, Inc. * Copyright (C) 2010 NVIDIA Corporation - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. */ #include <linux/clk-provider.h> @@ -1997,13 +1989,13 @@ .tri_reg = ((tri_r) - TRISTATE_REG_A), \ .tri_bank = 0, \ .tri_bit = tri_b, \ - .parked_bit = -1, \ .einput_bit = -1, \ .odrain_bit = -1, \ .lock_bit = -1, \ .ioreset_bit = -1, \ .rcv_sel_bit = -1, \ .drv_reg = -1, \ + .parked_bitmask = 0, \ } /* Pin groups with only pull up and pull down control */ @@ -2017,7 +2009,7 @@ .pupd_bank = 2, \ .pupd_bit = pupd_b, \ .drv_reg = -1, \ - .parked_bit = -1, \ + .parked_bitmask = 0, \ } /* Pin groups for drive strength registers (configurable version) */ @@ -2033,7 +2025,7 @@ .tri_reg = -1, \ .drv_reg = ((r) - PINGROUP_REG_A), \ .drv_bank = 3, \ - .parked_bit = -1, \ + .parked_bitmask = 0, \ .hsm_bit = hsm_b, \ .schmitt_bit = schmitt_b, \ .lpmd_bit = lpmd_b, \ -- Gitblit v1.6.2