From f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 31 Jan 2024 01:04:47 +0000
Subject: [PATCH] add driver 5G
---
kernel/arch/arm/mach-shmobile/setup-rcar-gen2.c | 30 +++++++++++++++++++++++++-----
1 files changed, 25 insertions(+), 5 deletions(-)
diff --git a/kernel/arch/arm/mach-shmobile/setup-rcar-gen2.c b/kernel/arch/arm/mach-shmobile/setup-rcar-gen2.c
index 013acc9..d42d934 100644
--- a/kernel/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/kernel/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -7,24 +7,26 @@
* Copyright (C) 2014 Ulrich Hecht
*/
-#include <linux/clk-provider.h>
#include <linux/clocksource.h>
#include <linux/device.h>
-#include <linux/dma-contiguous.h>
+#include <linux/dma-map-ops.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/memblock.h>
#include <linux/of.h>
+#include <linux/of_clk.h>
#include <linux/of_fdt.h>
#include <linux/of_platform.h>
+#include <linux/psci.h>
#include <asm/mach/arch.h>
#include <asm/secure_cntvoff.h>
#include "common.h"
#include "rcar-gen2.h"
static const struct of_device_id cpg_matches[] __initconst = {
- { .compatible = "renesas,rcar-gen2-cpg-clocks", },
+ { .compatible = "renesas,r8a7742-cpg-mssr", .data = "extal" },
{ .compatible = "renesas,r8a7743-cpg-mssr", .data = "extal" },
+ { .compatible = "renesas,r8a7744-cpg-mssr", .data = "extal" },
{ .compatible = "renesas,r8a7790-cpg-mssr", .data = "extal" },
{ .compatible = "renesas,r8a7791-cpg-mssr", .data = "extal" },
{ .compatible = "renesas,r8a7793-cpg-mssr", .data = "extal" },
@@ -57,10 +59,25 @@
#define CNTCR 0
#define CNTFID0 0x20
-void __init rcar_gen2_timer_init(void)
+static void __init rcar_gen2_timer_init(void)
{
+ bool need_update = true;
void __iomem *base;
u32 freq;
+
+ /*
+ * If PSCI is available then most likely we are running on PSCI-enabled
+ * U-Boot which, we assume, has already taken care of resetting CNTVOFF
+ * and updating counter module before switching to non-secure mode
+ * and we don't need to.
+ */
+#ifdef CONFIG_ARM_PSCI_FW
+ if (psci_ops.cpu_on)
+ need_update = false;
+#endif
+
+ if (need_update == false)
+ goto skip_update;
secure_cntvoff_init();
@@ -101,6 +118,7 @@
iounmap(base);
+skip_update:
of_clk_init(NULL);
timer_probe();
}
@@ -156,7 +174,7 @@
return 0;
}
-void __init rcar_gen2_reserve(void)
+static void __init rcar_gen2_reserve(void)
{
struct memory_reserve_config mrc;
@@ -192,7 +210,9 @@
MACHINE_END
static const char * const rz_g1_boards_compat_dt[] __initconst = {
+ "renesas,r8a7742",
"renesas,r8a7743",
+ "renesas,r8a7744",
"renesas,r8a7745",
"renesas,r8a77470",
NULL,
--
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