From f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 31 Jan 2024 01:04:47 +0000
Subject: [PATCH] add driver 5G

---
 kernel/arch/arm/mach-omap2/clkt2xxx_dpllcore.c |    5 +----
 1 files changed, 1 insertions(+), 4 deletions(-)

diff --git a/kernel/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/kernel/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index e8d4173..8a9983c 100644
--- a/kernel/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/kernel/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0-only
 /*
  * DPLL + CORE_CLK composite clock functions
  *
@@ -10,10 +11,6 @@
  *
  * Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
  * Gordon McNutt and RidgeRun, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
  *
  * XXX The DPLL and CORE clocks should be split into two separate clock
  * types.

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