From f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 Mon Sep 17 00:00:00 2001 From: hc <hc@nodka.com> Date: Wed, 31 Jan 2024 01:04:47 +0000 Subject: [PATCH] add driver 5G --- kernel/arch/arm/mach-exynos/exynos.c | 35 +++++++++++++++++++++++++++-------- 1 files changed, 27 insertions(+), 8 deletions(-) diff --git a/kernel/arch/arm/mach-exynos/exynos.c b/kernel/arch/arm/mach-exynos/exynos.c index 865dcc4..1276585 100644 --- a/kernel/arch/arm/mach-exynos/exynos.c +++ b/kernel/arch/arm/mach-exynos/exynos.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 // -// SAMSUNG EXYNOS Flattened Device Tree enabled machine +// Samsung Exynos Flattened Device Tree enabled machine // // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd. // http://www.samsung.com @@ -19,10 +19,11 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/map.h> -#include <plat/cpu.h> - #include "common.h" + +#define S3C_ADDR_BASE 0xF6000000 +#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) +#define S5P_VA_CHIPID S3C_ADDR(0x02000000) static struct platform_device exynos_cpuidle = { .name = "exynos_cpuidle", @@ -33,7 +34,16 @@ }; void __iomem *sysram_base_addr __ro_after_init; +phys_addr_t sysram_base_phys __ro_after_init; void __iomem *sysram_ns_base_addr __ro_after_init; + +unsigned long exynos_cpu_id; +static unsigned int exynos_cpu_rev; + +unsigned int exynos_rev(void) +{ + return exynos_cpu_rev; +} void __init exynos_sysram_init(void) { @@ -43,6 +53,9 @@ if (!of_device_is_available(node)) continue; sysram_base_addr = of_iomap(node, 0); + sysram_base_phys = of_translate_address(node, + of_get_address(node, 0, NULL, NULL)); + of_node_put(node); break; } @@ -50,6 +63,7 @@ if (!of_device_is_available(node)) continue; sysram_ns_base_addr = of_iomap(node, 0); + of_node_put(node); break; } } @@ -83,7 +97,11 @@ of_scan_flat_dt(exynos_fdt_map_chipid, NULL); /* detect cpu id and rev. */ - s5p_init_cpu(S5P_VA_CHIPID); + exynos_cpu_id = readl_relaxed(S5P_VA_CHIPID); + exynos_cpu_rev = exynos_cpu_id & 0xFF; + + pr_info("Samsung CPU ID: 0x%08lx\n", exynos_cpu_id); + } /* @@ -131,6 +149,7 @@ np = of_find_matching_node(NULL, exynos_dt_pmu_match); if (np) pmu_base_addr = of_iomap(np, 0); + of_node_put(np); } static void __init exynos_init_irq(void) @@ -189,9 +208,9 @@ of_fdt_limit_memory(8); } -DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)") - .l2c_aux_val = 0x3c400001, - .l2c_aux_mask = 0xc20fffff, +DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)") + .l2c_aux_val = 0x38400000, + .l2c_aux_mask = 0xc60fffff, .smp = smp_ops(exynos_smp_ops), .map_io = exynos_init_io, .init_early = exynos_firmware_init, -- Gitblit v1.6.2