From f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 31 Jan 2024 01:04:47 +0000
Subject: [PATCH] add driver 5G
---
kernel/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 203 ++++++++++++++++++++++++++++++++++++--------------
1 files changed, 146 insertions(+), 57 deletions(-)
diff --git a/kernel/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/kernel/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
index 96e281c..099ed43 100644
--- a/kernel/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/kernel/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Hardkernel Odroid XU3 board device tree source
+ * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
@@ -44,15 +44,13 @@
fan0: pwm-fan {
compatible = "pwm-fan";
pwms = <&pwm 0 20972 0>;
- cooling-min-state = <0>;
- cooling-max-state = <3>;
#cooling-cells = <2>;
cooling-levels = <0 130 170 230>;
};
thermal-zones {
cpu0_thermal: cpu0-thermal {
- thermal-sensors = <&tmu_cpu0 0>;
+ thermal-sensors = <&tmu_cpu0>;
polling-delay-passive = <250>;
polling-delay = <0>;
trips {
@@ -109,33 +107,39 @@
/*
* When reaching cpu0_alert3, reduce CPU
* by 2 steps. On Exynos5422/5800 that would
- * be: 1600 MHz and 1100 MHz.
+ * (usually) be: 1800 MHz and 1200 MHz.
*/
map3 {
trip = <&cpu0_alert3>;
- cooling-device = <&cpu0 0 2>;
- };
- map4 {
- trip = <&cpu0_alert3>;
- cooling-device = <&cpu4 0 2>;
+ cooling-device = <&cpu0 0 2>,
+ <&cpu1 0 2>,
+ <&cpu2 0 2>,
+ <&cpu3 0 2>,
+ <&cpu4 0 2>,
+ <&cpu5 0 2>,
+ <&cpu6 0 2>,
+ <&cpu7 0 2>;
};
/*
* When reaching cpu0_alert4, reduce CPU
- * further, down to 600 MHz (12 steps for big,
- * 7 steps for LITTLE).
+ * further, down to 600 MHz (14 steps for big,
+ * 8 steps for LITTLE).
*/
- map5 {
+ cpu0_cooling_map4: map4 {
trip = <&cpu0_alert4>;
- cooling-device = <&cpu0 3 7>;
- };
- map6 {
- trip = <&cpu0_alert4>;
- cooling-device = <&cpu4 3 12>;
+ cooling-device = <&cpu0 3 8>,
+ <&cpu1 3 8>,
+ <&cpu2 3 8>,
+ <&cpu3 3 8>,
+ <&cpu4 3 14>,
+ <&cpu5 3 14>,
+ <&cpu6 3 14>,
+ <&cpu7 3 14>;
};
};
};
cpu1_thermal: cpu1-thermal {
- thermal-sensors = <&tmu_cpu1 0>;
+ thermal-sensors = <&tmu_cpu1>;
polling-delay-passive = <250>;
polling-delay = <0>;
trips {
@@ -185,24 +189,30 @@
};
map3 {
trip = <&cpu1_alert3>;
- cooling-device = <&cpu0 0 2>;
+ cooling-device = <&cpu0 0 2>,
+ <&cpu1 0 2>,
+ <&cpu2 0 2>,
+ <&cpu3 0 2>,
+ <&cpu4 0 2>,
+ <&cpu5 0 2>,
+ <&cpu6 0 2>,
+ <&cpu7 0 2>;
};
- map4 {
- trip = <&cpu1_alert3>;
- cooling-device = <&cpu4 0 2>;
- };
- map5 {
+ cpu1_cooling_map4: map4 {
trip = <&cpu1_alert4>;
- cooling-device = <&cpu0 3 7>;
- };
- map6 {
- trip = <&cpu1_alert4>;
- cooling-device = <&cpu4 3 12>;
+ cooling-device = <&cpu0 3 8>,
+ <&cpu1 3 8>,
+ <&cpu2 3 8>,
+ <&cpu3 3 8>,
+ <&cpu4 3 14>,
+ <&cpu5 3 14>,
+ <&cpu6 3 14>,
+ <&cpu7 3 14>;
};
};
};
cpu2_thermal: cpu2-thermal {
- thermal-sensors = <&tmu_cpu2 0>;
+ thermal-sensors = <&tmu_cpu2>;
polling-delay-passive = <250>;
polling-delay = <0>;
trips {
@@ -252,24 +262,30 @@
};
map3 {
trip = <&cpu2_alert3>;
- cooling-device = <&cpu0 0 2>;
+ cooling-device = <&cpu0 0 2>,
+ <&cpu1 0 2>,
+ <&cpu2 0 2>,
+ <&cpu3 0 2>,
+ <&cpu4 0 2>,
+ <&cpu5 0 2>,
+ <&cpu6 0 2>,
+ <&cpu7 0 2>;
};
- map4 {
- trip = <&cpu2_alert3>;
- cooling-device = <&cpu4 0 2>;
- };
- map5 {
+ cpu2_cooling_map4: map4 {
trip = <&cpu2_alert4>;
- cooling-device = <&cpu0 3 7>;
- };
- map6 {
- trip = <&cpu2_alert4>;
- cooling-device = <&cpu4 3 12>;
+ cooling-device = <&cpu0 3 8>,
+ <&cpu1 3 8>,
+ <&cpu2 3 8>,
+ <&cpu3 3 8>,
+ <&cpu4 3 14>,
+ <&cpu5 3 14>,
+ <&cpu6 3 14>,
+ <&cpu7 3 14>;
};
};
};
cpu3_thermal: cpu3-thermal {
- thermal-sensors = <&tmu_cpu3 0>;
+ thermal-sensors = <&tmu_cpu3>;
polling-delay-passive = <250>;
polling-delay = <0>;
trips {
@@ -319,28 +335,94 @@
};
map3 {
trip = <&cpu3_alert3>;
- cooling-device = <&cpu0 0 2>;
+ cooling-device = <&cpu0 0 2>,
+ <&cpu1 0 2>,
+ <&cpu2 0 2>,
+ <&cpu3 0 2>,
+ <&cpu4 0 2>,
+ <&cpu5 0 2>,
+ <&cpu6 0 2>,
+ <&cpu7 0 2>;
+ };
+ cpu3_cooling_map4: map4 {
+ trip = <&cpu3_alert4>;
+ cooling-device = <&cpu0 3 8>,
+ <&cpu1 3 8>,
+ <&cpu2 3 8>,
+ <&cpu3 3 8>,
+ <&cpu4 3 14>,
+ <&cpu5 3 14>,
+ <&cpu6 3 14>,
+ <&cpu7 3 14>;
+ };
+ };
+ };
+ gpu_thermal: gpu-thermal {
+ thermal-sensors = <&tmu_gpu>;
+ polling-delay-passive = <250>;
+ polling-delay = <0>;
+ trips {
+ gpu_alert0: gpu-alert-0 {
+ temperature = <50000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+ gpu_alert1: gpu-alert-1 {
+ temperature = <60000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+ gpu_alert2: gpu-alert-2 {
+ temperature = <70000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+ gpu_crit0: gpu-crit-0 {
+ temperature = <120000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ gpu_alert3: gpu-alert-3 {
+ temperature = <70000>;
+ hysteresis = <10000>;
+ type = "passive";
+ };
+ gpu_alert4: gpu-alert-4 {
+ temperature = <85000>;
+ hysteresis = <10000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ map0 {
+ trip = <&gpu_alert0>;
+ cooling-device = <&fan0 0 1>;
+ };
+ map1 {
+ trip = <&gpu_alert1>;
+ cooling-device = <&fan0 1 2>;
+ };
+ map2 {
+ trip = <&gpu_alert2>;
+ cooling-device = <&fan0 2 3>;
+ };
+ map3 {
+ trip = <&gpu_alert3>;
+ cooling-device = <&gpu 0 2>;
};
map4 {
- trip = <&cpu3_alert3>;
- cooling-device = <&cpu4 0 2>;
- };
- map5 {
- trip = <&cpu3_alert4>;
- cooling-device = <&cpu0 3 7>;
- };
- map6 {
- trip = <&cpu3_alert4>;
- cooling-device = <&cpu4 3 12>;
+ trip = <&gpu_alert4>;
+ cooling-device = <&gpu 3 6>;
};
};
};
};
};
-&adc {
- vdd-supply = <&ldo4_reg>;
- status = "okay";
+&buck10_reg {
+ /* Supplies vmmc-supply of mmc_0 */
+ regulator-always-on;
+ regulator-boot-on;
};
&hdmi {
@@ -367,6 +449,12 @@
status = "okay";
};
+&ldo26_reg {
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+};
+
&mixer {
status = "okay";
};
@@ -386,6 +474,7 @@
cap-mmc-highspeed;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
+ max-frequency = <200000000>;
vmmc-supply = <&ldo18_reg>;
vqmmc-supply = <&ldo3_reg>;
};
--
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