From f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 31 Jan 2024 01:04:47 +0000
Subject: [PATCH] add driver 5G
---
kernel/arch/arm/boot/dts/at91sam9g20.dtsi | 31 ++++++-------------------------
1 files changed, 6 insertions(+), 25 deletions(-)
diff --git a/kernel/arch/arm/boot/dts/at91sam9g20.dtsi b/kernel/arch/arm/boot/dts/at91sam9g20.dtsi
index 90705ee..708e164 100644
--- a/kernel/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/kernel/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
*
* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- *
- * Licensed under GPLv2.
*/
#include "at91sam9260.dtsi"
@@ -12,7 +11,7 @@
model = "Atmel AT91SAM9G20 family SoC";
compatible = "atmel,at91sam9g20";
- memory {
+ memory@20000000 {
reg = <0x20000000 0x08000000>;
};
@@ -23,6 +22,9 @@
sram1: sram@2fc000 {
compatible = "mmio-sram";
reg = <0x002fc000 0x8000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x002fc000 0x8000>;
};
ahb {
@@ -40,28 +42,7 @@
};
pmc: pmc@fffffc00 {
- plla: pllack {
- atmel,clk-input-range = <2000000 32000000>;
- atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
- <695000000 750000000 1 0>,
- <645000000 700000000 2 0>,
- <595000000 650000000 3 0>,
- <545000000 600000000 0 1>,
- <495000000 550000000 1 1>,
- <445000000 500000000 2 1>,
- <400000000 450000000 3 1>;
- };
-
- pllb: pllbck {
- compatible = "atmel,at91sam9g20-clk-pllb";
- atmel,clk-input-range = <2000000 32000000>;
- atmel,pll-clk-output-ranges = <30000000 100000000 0 0>;
- };
-
- mck: masterck {
- atmel,clk-output-range = <0 133000000>;
- atmel,clk-divisors = <1 2 4 6>;
- };
+ compatible = "atmel,at91sam9g20-pmc", "atmel,at91sam9260-pmc", "syscon";
};
};
};
--
Gitblit v1.6.2