From f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 31 Jan 2024 01:04:47 +0000
Subject: [PATCH] add driver 5G
---
kernel/arch/arm/boot/dts/am4372.dtsi | 1305 +++++++++++++++--------------------------------------------
1 files changed, 332 insertions(+), 973 deletions(-)
diff --git a/kernel/arch/arm/boot/dts/am4372.dtsi b/kernel/arch/arm/boot/dts/am4372.dtsi
index 09e58fb..878406b 100644
--- a/kernel/arch/arm/boot/dts/am4372.dtsi
+++ b/kernel/arch/arm/boot/dts/am4372.dtsi
@@ -1,13 +1,14 @@
/*
* Device Tree Source for AM4372 SoC
*
- * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
+#include <dt-bindings/bus/ti-sysc.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/am4.h>
@@ -34,8 +35,8 @@
serial3 = &uart3;
serial4 = &uart4;
serial5 = &uart5;
- ethernet0 = &cpsw_emac0;
- ethernet1 = &cpsw_emac1;
+ ethernet0 = &cpsw_port1;
+ ethernet1 = &cpsw_port2;
spi0 = &qspi;
};
@@ -44,6 +45,7 @@
#size-cells = <0>;
cpu: cpu@0 {
compatible = "arm,cortex-a9";
+ enable-method = "ti,am4372";
device_type = "cpu";
reg = <0>;
@@ -53,6 +55,17 @@
operating-points-v2 = <&cpu0_opp_table>;
clock-latency = <300000>; /* From omap-cpufreq driver */
+ cpu-idle-states = <&mpu_gate>;
+ };
+
+ idle-states {
+ mpu_gate: mpu_gate {
+ compatible = "arm,idle-state";
+ entry-latency-us = <40>;
+ exit-latency-us = <100>;
+ min-residency-us = <300>;
+ local-timer-stop;
+ };
};
};
@@ -140,7 +153,7 @@
clocks = <&mpu_periphclk>;
};
- l2-cache-controller@48242000 {
+ cache-controller@48242000 {
compatible = "arm,pl310-cache";
reg = <0x48242000 0x1000>;
cache-unified;
@@ -159,12 +172,7 @@
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- l4_wkup: l4_wkup@44c00000 {
- compatible = "ti,am4-l4-wkup", "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x44c00000 0x287000>;
-
+ l4_wkup: interconnect@44c00000 {
wkup_m3: wkup_m3@100000 {
compatible = "ti,am4372-wkup-m3";
reg = <0x100000 0x4000>,
@@ -173,75 +181,10 @@
ti,hwmods = "wkup_m3";
ti,pm-firmware = "am335x-pm-firmware.elf";
};
-
- prcm: prcm@1f0000 {
- compatible = "ti,am4-prcm", "simple-bus";
- reg = <0x1f0000 0x11000>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x1f0000 0x11000>;
-
- prcm_clocks: clocks {
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- prcm_clockdomains: clockdomains {
- };
- };
-
- scm: scm@210000 {
- compatible = "ti,am4-scm", "simple-bus";
- reg = <0x210000 0x4000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x210000 0x4000>;
-
- am43xx_pinmux: pinmux@800 {
- compatible = "ti,am437-padconf",
- "pinctrl-single";
- reg = <0x800 0x31c>;
- #address-cells = <1>;
- #size-cells = <0>;
- #pinctrl-cells = <1>;
- #interrupt-cells = <1>;
- interrupt-controller;
- pinctrl-single,register-width = <32>;
- pinctrl-single,function-mask = <0xffffffff>;
- };
-
- scm_conf: scm_conf@0 {
- compatible = "syscon";
- reg = <0x0 0x800>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- scm_clocks: clocks {
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-
- wkup_m3_ipc: wkup_m3_ipc@1324 {
- compatible = "ti,am4372-wkup-m3-ipc";
- reg = <0x1324 0x44>;
- interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
- ti,rproc = <&wkup_m3>;
- mboxes = <&mailbox &mbox_wkupm3>;
- };
-
- edma_xbar: dma-router@f90 {
- compatible = "ti,am335x-edma-crossbar";
- reg = <0xf90 0x40>;
- #dma-cells = <3>;
- dma-requests = <64>;
- dma-masters = <&edma>;
- };
-
- scm_clockdomains: clockdomains {
- };
- };
+ };
+ l4_per: interconnect@48000000 {
+ };
+ l4_fast: interconnect@4a000000 {
};
emif: emif@4c000000 {
@@ -254,735 +197,241 @@
&pm_sram_data>;
};
- edma: edma@49000000 {
- compatible = "ti,edma3-tpcc";
- ti,hwmods = "tpcc";
- reg = <0x49000000 0x10000>;
- reg-names = "edma3_cc";
- interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "edma3_ccint", "edma3_mperr",
- "edma3_ccerrint";
- dma-requests = <64>;
- #dma-cells = <2>;
-
- ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
- <&edma_tptc2 0>;
-
- ti,edma-memcpy-channels = <58 59>;
- };
-
- edma_tptc0: tptc@49800000 {
- compatible = "ti,edma3-tptc";
- ti,hwmods = "tptc0";
- reg = <0x49800000 0x100000>;
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "edma3_tcerrint";
- };
-
- edma_tptc1: tptc@49900000 {
- compatible = "ti,edma3-tptc";
- ti,hwmods = "tptc1";
- reg = <0x49900000 0x100000>;
- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "edma3_tcerrint";
- };
-
- edma_tptc2: tptc@49a00000 {
- compatible = "ti,edma3-tptc";
- ti,hwmods = "tptc2";
- reg = <0x49a00000 0x100000>;
- interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "edma3_tcerrint";
- };
-
- uart0: serial@44e09000 {
- compatible = "ti,am4372-uart","ti,omap2-uart";
- reg = <0x44e09000 0x2000>;
- interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "uart1";
- };
-
- uart1: serial@48022000 {
- compatible = "ti,am4372-uart","ti,omap2-uart";
- reg = <0x48022000 0x2000>;
- interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "uart2";
- status = "disabled";
- };
-
- uart2: serial@48024000 {
- compatible = "ti,am4372-uart","ti,omap2-uart";
- reg = <0x48024000 0x2000>;
- interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "uart3";
- status = "disabled";
- };
-
- uart3: serial@481a6000 {
- compatible = "ti,am4372-uart","ti,omap2-uart";
- reg = <0x481a6000 0x2000>;
- interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "uart4";
- status = "disabled";
- };
-
- uart4: serial@481a8000 {
- compatible = "ti,am4372-uart","ti,omap2-uart";
- reg = <0x481a8000 0x2000>;
- interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "uart5";
- status = "disabled";
- };
-
- uart5: serial@481aa000 {
- compatible = "ti,am4372-uart","ti,omap2-uart";
- reg = <0x481aa000 0x2000>;
- interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "uart6";
- status = "disabled";
- };
-
- mailbox: mailbox@480c8000 {
- compatible = "ti,omap4-mailbox";
- reg = <0x480C8000 0x200>;
- interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "mailbox";
- #mbox-cells = <1>;
- ti,mbox-num-users = <4>;
- ti,mbox-num-fifos = <8>;
- mbox_wkupm3: wkup_m3 {
- ti,mbox-send-noirq;
- ti,mbox-tx = <0 0 0>;
- ti,mbox-rx = <0 0 3>;
- };
- };
-
- timer1: timer@44e31000 {
- compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
- reg = <0x44e31000 0x400>;
- interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
- ti,timer-alwon;
- ti,hwmods = "timer1";
- clocks = <&timer1_fck>;
+ target-module@49000000 {
+ compatible = "ti,sysc-omap4", "ti,sysc";
+ reg = <0x49000000 0x4>;
+ reg-names = "rev";
+ clocks = <&l3_clkctrl AM4_L3_TPCC_CLKCTRL 0>;
clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x49000000 0x10000>;
+
+ edma: dma@0 {
+ compatible = "ti,edma3-tpcc";
+ reg = <0 0x10000>;
+ reg-names = "edma3_cc";
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "edma3_ccint", "edma3_mperr",
+ "edma3_ccerrint";
+ dma-requests = <64>;
+ #dma-cells = <2>;
+
+ ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
+ <&edma_tptc2 0>;
+
+ ti,edma-memcpy-channels = <58 59>;
+ };
};
- timer2: timer@48040000 {
- compatible = "ti,am4372-timer","ti,am335x-timer";
- reg = <0x48040000 0x400>;
- interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "timer2";
- clocks = <&timer2_fck>;
+ target-module@49800000 {
+ compatible = "ti,sysc-omap4", "ti,sysc";
+ reg = <0x49800000 0x4>,
+ <0x49800010 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+ ti,sysc-midle = <SYSC_IDLE_FORCE>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_SMART>;
+ clocks = <&l3_clkctrl AM4_L3_TPTC0_CLKCTRL 0>;
clock-names = "fck";
- };
-
- timer3: timer@48042000 {
- compatible = "ti,am4372-timer","ti,am335x-timer";
- reg = <0x48042000 0x400>;
- interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "timer3";
- status = "disabled";
- };
-
- timer4: timer@48044000 {
- compatible = "ti,am4372-timer","ti,am335x-timer";
- reg = <0x48044000 0x400>;
- interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
- ti,timer-pwm;
- ti,hwmods = "timer4";
- status = "disabled";
- };
-
- timer5: timer@48046000 {
- compatible = "ti,am4372-timer","ti,am335x-timer";
- reg = <0x48046000 0x400>;
- interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
- ti,timer-pwm;
- ti,hwmods = "timer5";
- status = "disabled";
- };
-
- timer6: timer@48048000 {
- compatible = "ti,am4372-timer","ti,am335x-timer";
- reg = <0x48048000 0x400>;
- interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
- ti,timer-pwm;
- ti,hwmods = "timer6";
- status = "disabled";
- };
-
- timer7: timer@4804a000 {
- compatible = "ti,am4372-timer","ti,am335x-timer";
- reg = <0x4804a000 0x400>;
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- ti,timer-pwm;
- ti,hwmods = "timer7";
- status = "disabled";
- };
-
- timer8: timer@481c1000 {
- compatible = "ti,am4372-timer","ti,am335x-timer";
- reg = <0x481c1000 0x400>;
- interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "timer8";
- status = "disabled";
- };
-
- timer9: timer@4833d000 {
- compatible = "ti,am4372-timer","ti,am335x-timer";
- reg = <0x4833d000 0x400>;
- interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "timer9";
- status = "disabled";
- };
-
- timer10: timer@4833f000 {
- compatible = "ti,am4372-timer","ti,am335x-timer";
- reg = <0x4833f000 0x400>;
- interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "timer10";
- status = "disabled";
- };
-
- timer11: timer@48341000 {
- compatible = "ti,am4372-timer","ti,am335x-timer";
- reg = <0x48341000 0x400>;
- interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "timer11";
- status = "disabled";
- };
-
- counter32k: counter@44e86000 {
- compatible = "ti,am4372-counter32k","ti,omap-counter32k";
- reg = <0x44e86000 0x40>;
- ti,hwmods = "counter_32k";
- };
-
- rtc: rtc@44e3e000 {
- compatible = "ti,am4372-rtc", "ti,am3352-rtc",
- "ti,da830-rtc";
- reg = <0x44e3e000 0x1000>;
- interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "rtc";
- clocks = <&clk_32768_ck>;
- clock-names = "int-clk";
- system-power-controller;
- status = "disabled";
- };
-
- wdt: wdt@44e35000 {
- compatible = "ti,am4372-wdt","ti,omap3-wdt";
- reg = <0x44e35000 0x1000>;
- interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "wd_timer2";
- };
-
- gpio0: gpio@44e07000 {
- compatible = "ti,am4372-gpio","ti,omap4-gpio";
- reg = <0x44e07000 0x1000>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- ti,hwmods = "gpio1";
- status = "disabled";
- };
-
- gpio1: gpio@4804c000 {
- compatible = "ti,am4372-gpio","ti,omap4-gpio";
- reg = <0x4804c000 0x1000>;
- interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- ti,hwmods = "gpio2";
- status = "disabled";
- };
-
- gpio2: gpio@481ac000 {
- compatible = "ti,am4372-gpio","ti,omap4-gpio";
- reg = <0x481ac000 0x1000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- ti,hwmods = "gpio3";
- status = "disabled";
- };
-
- gpio3: gpio@481ae000 {
- compatible = "ti,am4372-gpio","ti,omap4-gpio";
- reg = <0x481ae000 0x1000>;
- interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- ti,hwmods = "gpio4";
- status = "disabled";
- };
-
- gpio4: gpio@48320000 {
- compatible = "ti,am4372-gpio","ti,omap4-gpio";
- reg = <0x48320000 0x1000>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- ti,hwmods = "gpio5";
- status = "disabled";
- };
-
- gpio5: gpio@48322000 {
- compatible = "ti,am4372-gpio","ti,omap4-gpio";
- reg = <0x48322000 0x1000>;
- interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- ti,hwmods = "gpio6";
- status = "disabled";
- };
-
- hwspinlock: spinlock@480ca000 {
- compatible = "ti,omap4-hwspinlock";
- reg = <0x480ca000 0x1000>;
- ti,hwmods = "spinlock";
- #hwlock-cells = <1>;
- };
-
- i2c0: i2c@44e0b000 {
- compatible = "ti,am4372-i2c","ti,omap4-i2c";
- reg = <0x44e0b000 0x1000>;
- interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "i2c1";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c1: i2c@4802a000 {
- compatible = "ti,am4372-i2c","ti,omap4-i2c";
- reg = <0x4802a000 0x1000>;
- interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "i2c2";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c2: i2c@4819c000 {
- compatible = "ti,am4372-i2c","ti,omap4-i2c";
- reg = <0x4819c000 0x1000>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "i2c3";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi0: spi@48030000 {
- compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
- reg = <0x48030000 0x400>;
- interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "spi0";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- mmc1: mmc@48060000 {
- compatible = "ti,omap4-hsmmc";
- reg = <0x48060000 0x1000>;
- ti,hwmods = "mmc1";
- ti,dual-volt;
- ti,needs-special-reset;
- dmas = <&edma 24 0>,
- <&edma 25 0>;
- dma-names = "tx", "rx";
- interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- mmc2: mmc@481d8000 {
- compatible = "ti,omap4-hsmmc";
- reg = <0x481d8000 0x1000>;
- ti,hwmods = "mmc2";
- ti,needs-special-reset;
- dmas = <&edma 2 0>,
- <&edma 3 0>;
- dma-names = "tx", "rx";
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- mmc3: mmc@47810000 {
- compatible = "ti,omap4-hsmmc";
- reg = <0x47810000 0x1000>;
- ti,hwmods = "mmc3";
- ti,needs-special-reset;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- spi1: spi@481a0000 {
- compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
- reg = <0x481a0000 0x400>;
- interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "spi1";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi2: spi@481a2000 {
- compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
- reg = <0x481a2000 0x400>;
- interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "spi2";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi3: spi@481a4000 {
- compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
- reg = <0x481a4000 0x400>;
- interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "spi3";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi4: spi@48345000 {
- compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
- reg = <0x48345000 0x400>;
- interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "spi4";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- mac: ethernet@4a100000 {
- compatible = "ti,am4372-cpsw","ti,cpsw";
- reg = <0x4a100000 0x800
- 0x4a101200 0x100>;
- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <1>;
- ti,hwmods = "cpgmac0";
- clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
- <&dpll_clksel_mac_clk>;
- clock-names = "fck", "cpts", "50mclk";
- assigned-clocks = <&dpll_clksel_mac_clk>;
- assigned-clock-rates = <50000000>;
- status = "disabled";
- cpdma_channels = <8>;
- ale_entries = <1024>;
- bd_ram_size = <0x2000>;
- mac_control = <0x20>;
- slaves = <2>;
- active_slave = <0>;
- cpts_clock_mult = <0x80000000>;
- cpts_clock_shift = <29>;
- ranges;
- syscon = <&scm_conf>;
+ ranges = <0x0 0x49800000 0x100000>;
- davinci_mdio: mdio@4a101000 {
- compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
- reg = <0x4a101000 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- ti,hwmods = "davinci_mdio";
- bus_freq = <1000000>;
- status = "disabled";
- };
-
- cpsw_emac0: slave@4a100200 {
- /* Filled in by U-Boot */
- mac-address = [ 00 00 00 00 00 00 ];
- };
-
- cpsw_emac1: slave@4a100300 {
- /* Filled in by U-Boot */
- mac-address = [ 00 00 00 00 00 00 ];
- };
-
- phy_sel: cpsw-phy-sel@44e10650 {
- compatible = "ti,am43xx-cpsw-phy-sel";
- reg= <0x44e10650 0x4>;
- reg-names = "gmii-sel";
+ edma_tptc0: dma@0 {
+ compatible = "ti,edma3-tptc";
+ reg = <0 0x100000>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "edma3_tcerrint";
};
};
- epwmss0: epwmss@48300000 {
- compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
- reg = <0x48300000 0x10>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- ti,hwmods = "epwmss0";
- status = "disabled";
-
- ecap0: ecap@48300100 {
- compatible = "ti,am4372-ecap",
- "ti,am3352-ecap",
- "ti,am33xx-ecap";
- #pwm-cells = <3>;
- reg = <0x48300100 0x80>;
- clocks = <&l4ls_gclk>;
- clock-names = "fck";
- status = "disabled";
- };
-
- ehrpwm0: pwm@48300200 {
- compatible = "ti,am4372-ehrpwm",
- "ti,am3352-ehrpwm",
- "ti,am33xx-ehrpwm";
- #pwm-cells = <3>;
- reg = <0x48300200 0x80>;
- clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
- clock-names = "tbclk", "fck";
- status = "disabled";
- };
- };
-
- epwmss1: epwmss@48302000 {
- compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
- reg = <0x48302000 0x10>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- ti,hwmods = "epwmss1";
- status = "disabled";
-
- ecap1: ecap@48302100 {
- compatible = "ti,am4372-ecap",
- "ti,am3352-ecap",
- "ti,am33xx-ecap";
- #pwm-cells = <3>;
- reg = <0x48302100 0x80>;
- clocks = <&l4ls_gclk>;
- clock-names = "fck";
- status = "disabled";
- };
-
- ehrpwm1: pwm@48302200 {
- compatible = "ti,am4372-ehrpwm",
- "ti,am3352-ehrpwm",
- "ti,am33xx-ehrpwm";
- #pwm-cells = <3>;
- reg = <0x48302200 0x80>;
- clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
- clock-names = "tbclk", "fck";
- status = "disabled";
- };
- };
-
- epwmss2: epwmss@48304000 {
- compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
- reg = <0x48304000 0x10>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- ti,hwmods = "epwmss2";
- status = "disabled";
-
- ecap2: ecap@48304100 {
- compatible = "ti,am4372-ecap",
- "ti,am3352-ecap",
- "ti,am33xx-ecap";
- #pwm-cells = <3>;
- reg = <0x48304100 0x80>;
- clocks = <&l4ls_gclk>;
- clock-names = "fck";
- status = "disabled";
- };
-
- ehrpwm2: pwm@48304200 {
- compatible = "ti,am4372-ehrpwm",
- "ti,am3352-ehrpwm",
- "ti,am33xx-ehrpwm";
- #pwm-cells = <3>;
- reg = <0x48304200 0x80>;
- clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
- clock-names = "tbclk", "fck";
- status = "disabled";
- };
- };
-
- epwmss3: epwmss@48306000 {
- compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
- reg = <0x48306000 0x10>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- ti,hwmods = "epwmss3";
- status = "disabled";
-
- ehrpwm3: pwm@48306200 {
- compatible = "ti,am4372-ehrpwm",
- "ti,am3352-ehrpwm",
- "ti,am33xx-ehrpwm";
- #pwm-cells = <3>;
- reg = <0x48306200 0x80>;
- clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>;
- clock-names = "tbclk", "fck";
- status = "disabled";
- };
- };
-
- epwmss4: epwmss@48308000 {
- compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
- reg = <0x48308000 0x10>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- ti,hwmods = "epwmss4";
- status = "disabled";
-
- ehrpwm4: pwm@48308200 {
- compatible = "ti,am4372-ehrpwm",
- "ti,am3352-ehrpwm",
- "ti,am33xx-ehrpwm";
- #pwm-cells = <3>;
- reg = <0x48308200 0x80>;
- clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>;
- clock-names = "tbclk", "fck";
- status = "disabled";
- };
- };
-
- epwmss5: epwmss@4830a000 {
- compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
- reg = <0x4830a000 0x10>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- ti,hwmods = "epwmss5";
- status = "disabled";
-
- ehrpwm5: pwm@4830a200 {
- compatible = "ti,am4372-ehrpwm",
- "ti,am3352-ehrpwm",
- "ti,am33xx-ehrpwm";
- #pwm-cells = <3>;
- reg = <0x4830a200 0x80>;
- clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>;
- clock-names = "tbclk", "fck";
- status = "disabled";
- };
- };
-
- tscadc: tscadc@44e0d000 {
- compatible = "ti,am3359-tscadc";
- reg = <0x44e0d000 0x1000>;
- ti,hwmods = "adc_tsc";
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&adc_tsc_fck>;
+ target-module@49900000 {
+ compatible = "ti,sysc-omap4", "ti,sysc";
+ reg = <0x49900000 0x4>,
+ <0x49900010 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+ ti,sysc-midle = <SYSC_IDLE_FORCE>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_SMART>;
+ clocks = <&l3_clkctrl AM4_L3_TPTC1_CLKCTRL 0>;
clock-names = "fck";
- status = "disabled";
- dmas = <&edma 53 0>, <&edma 57 0>;
- dma-names = "fifo0", "fifo1";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x49900000 0x100000>;
- tsc {
- compatible = "ti,am3359-tsc";
+ edma_tptc1: dma@0 {
+ compatible = "ti,edma3-tptc";
+ reg = <0 0x100000>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "edma3_tcerrint";
};
-
- adc {
- #io-channel-cells = <1>;
- compatible = "ti,am3359-adc";
- };
-
};
- sham: sham@53100000 {
- compatible = "ti,omap5-sham";
- ti,hwmods = "sham";
- reg = <0x53100000 0x300>;
- dmas = <&edma 36 0>;
- dma-names = "rx";
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- aes: aes@53501000 {
- compatible = "ti,omap4-aes";
- ti,hwmods = "aes";
- reg = <0x53501000 0xa0>;
- interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&edma 6 0>,
- <&edma 5 0>;
- dma-names = "tx", "rx";
- };
-
- des: des@53701000 {
- compatible = "ti,omap4-des";
- ti,hwmods = "des";
- reg = <0x53701000 0xa0>;
- interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&edma 34 0>,
- <&edma 33 0>;
- dma-names = "tx", "rx";
- };
-
- rng: rng@48310000 {
- compatible = "ti,omap4-rng";
- ti,hwmods = "rng";
- reg = <0x48310000 0x2000>;
- interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- mcasp0: mcasp@48038000 {
- compatible = "ti,am33xx-mcasp-audio";
- ti,hwmods = "mcasp0";
- reg = <0x48038000 0x2000>,
- <0x46000000 0x400000>;
- reg-names = "mpu", "dat";
- interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "tx", "rx";
- status = "disabled";
- dmas = <&edma 8 2>,
- <&edma 9 2>;
- dma-names = "tx", "rx";
- };
-
- mcasp1: mcasp@4803c000 {
- compatible = "ti,am33xx-mcasp-audio";
- ti,hwmods = "mcasp1";
- reg = <0x4803C000 0x2000>,
- <0x46400000 0x400000>;
- reg-names = "mpu", "dat";
- interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "tx", "rx";
- status = "disabled";
- dmas = <&edma 10 2>,
- <&edma 11 2>;
- dma-names = "tx", "rx";
- };
-
- elm: elm@48080000 {
- compatible = "ti,am3352-elm";
- reg = <0x48080000 0x2000>;
- interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "elm";
- clocks = <&l4ls_gclk>;
+ target-module@49a00000 {
+ compatible = "ti,sysc-omap4", "ti,sysc";
+ reg = <0x49a00000 0x4>,
+ <0x49a00010 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+ ti,sysc-midle = <SYSC_IDLE_FORCE>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_SMART>;
+ clocks = <&l3_clkctrl AM4_L3_TPTC2_CLKCTRL 0>;
clock-names = "fck";
- status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x49a00000 0x100000>;
+
+ edma_tptc2: dma@0 {
+ compatible = "ti,edma3-tptc";
+ reg = <0 0x100000>;
+ interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "edma3_tcerrint";
+ };
+ };
+
+ target-module@47810000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x478102fc 0x4>,
+ <0x47810110 0x4>,
+ <0x47810114 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_ENAWAKEUP |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ clocks = <&l3s_clkctrl AM4_L3S_MMC3_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x47810000 0x1000>;
+
+ mmc3: mmc@0 {
+ compatible = "ti,am437-sdhci";
+ ti,needs-special-reset;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x0 0x1000>;
+ status = "disabled";
+ };
+ };
+
+ sham_target: target-module@53100000 {
+ compatible = "ti,sysc-omap3-sham", "ti,sysc";
+ reg = <0x53100100 0x4>,
+ <0x53100110 0x4>,
+ <0x53100114 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ /* Domains (P, C): per_pwrdm, l3_clkdm */
+ clocks = <&l3_clkctrl AM4_L3_SHAM_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x53100000 0x1000>;
+
+ sham: sham@0 {
+ compatible = "ti,omap5-sham";
+ reg = <0 0x300>;
+ dmas = <&edma 36 0>;
+ dma-names = "rx";
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
+ aes_target: target-module@53501000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x53501080 0x4>,
+ <0x53501084 0x4>,
+ <0x53501088 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
+ ti,syss-mask = <1>;
+ /* Domains (P, C): per_pwrdm, l3_clkdm */
+ clocks = <&l3_clkctrl AM4_L3_AES_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x53501000 0x1000>;
+
+ aes: aes@0 {
+ compatible = "ti,omap4-aes";
+ reg = <0 0xa0>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&edma 6 0>,
+ <&edma 5 0>;
+ dma-names = "tx", "rx";
+ };
+ };
+
+ des_target: target-module@53701000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x53701030 0x4>,
+ <0x53701034 0x4>,
+ <0x53701038 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
+ ti,syss-mask = <1>;
+ /* Domains (P, C): per_pwrdm, l3_clkdm */
+ clocks = <&l3_clkctrl AM4_L3_DES_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x53701000 0x1000>;
+
+ des: des@0 {
+ compatible = "ti,omap4-des";
+ reg = <0 0xa0>;
+ interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&edma 34 0>,
+ <&edma 33 0>;
+ dma-names = "tx", "rx";
+ };
+ };
+
+ pruss_tm: target-module@54400000 {
+ compatible = "ti,sysc-pruss", "ti,sysc";
+ reg = <0x54426000 0x4>,
+ <0x54426004 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT |
+ SYSC_PRUSS_SUB_MWAIT)>;
+ ti,sysc-midle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ clocks = <&pruss_ocp_clkctrl AM4_PRUSS_OCP_PRUSS_CLKCTRL 0>;
+ clock-names = "fck";
+ resets = <&prm_per 1>;
+ reset-names = "rstctrl";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x54400000 0x80000>;
};
gpmc: gpmc@50000000 {
@@ -1005,215 +454,125 @@
status = "disabled";
};
- ocp2scp0: ocp2scp@483a8000 {
- compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- ti,hwmods = "ocp2scp0";
-
- usb2_phy1: phy@483a8000 {
- compatible = "ti,am437x-usb2";
- reg = <0x483a8000 0x8000>;
- syscon-phy-power = <&scm_conf 0x620>;
- clocks = <&usb_phy0_always_on_clk32k>,
- <&l4_per_clkctrl AM4_USB_OTG_SS0_CLKCTRL 8>;
- clock-names = "wkupclk", "refclk";
- #phy-cells = <0>;
- status = "disabled";
- };
- };
-
- ocp2scp1: ocp2scp@483e8000 {
- compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- ti,hwmods = "ocp2scp1";
-
- usb2_phy2: phy@483e8000 {
- compatible = "ti,am437x-usb2";
- reg = <0x483e8000 0x8000>;
- syscon-phy-power = <&scm_conf 0x628>;
- clocks = <&usb_phy1_always_on_clk32k>,
- <&l4_per_clkctrl AM4_USB_OTG_SS1_CLKCTRL 8>;
- clock-names = "wkupclk", "refclk";
- #phy-cells = <0>;
- status = "disabled";
- };
- };
-
- dwc3_1: omap_dwc3@48380000 {
- compatible = "ti,am437x-dwc3";
- ti,hwmods = "usb_otg_ss0";
- reg = <0x48380000 0x10000>;
- interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <1>;
- utmi-mode = <1>;
- ranges;
-
- usb1: usb@48390000 {
- compatible = "synopsys,dwc3";
- reg = <0x48390000 0x10000>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "peripheral",
- "host",
- "otg";
- phys = <&usb2_phy1>;
- phy-names = "usb2-phy";
- maximum-speed = "high-speed";
- dr_mode = "otg";
- status = "disabled";
- snps,dis_u3_susphy_quirk;
- snps,dis_u2_susphy_quirk;
- };
- };
-
- dwc3_2: omap_dwc3@483c0000 {
- compatible = "ti,am437x-dwc3";
- ti,hwmods = "usb_otg_ss1";
- reg = <0x483c0000 0x10000>;
- interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <1>;
- utmi-mode = <1>;
- ranges;
-
- usb2: usb@483d0000 {
- compatible = "synopsys,dwc3";
- reg = <0x483d0000 0x10000>;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "peripheral",
- "host",
- "otg";
- phys = <&usb2_phy2>;
- phy-names = "usb2-phy";
- maximum-speed = "high-speed";
- dr_mode = "otg";
- status = "disabled";
- snps,dis_u3_susphy_quirk;
- snps,dis_u2_susphy_quirk;
- };
- };
-
- qspi: spi@47900000 {
- compatible = "ti,am4372-qspi";
- reg = <0x47900000 0x100>,
- <0x30000000 0x4000000>;
- reg-names = "qspi_base", "qspi_mmap";
- #address-cells = <1>;
- #size-cells = <0>;
- ti,hwmods = "qspi";
- interrupts = <0 138 0x4>;
- num-cs = <4>;
- status = "disabled";
- };
-
- hdq: hdq@48347000 {
- compatible = "ti,am4372-hdq";
- reg = <0x48347000 0x1000>;
- interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&func_12m_clk>;
- clock-names = "fck";
- ti,hwmods = "hdq1w";
- status = "disabled";
- };
-
- dss: dss@4832a000 {
- compatible = "ti,omap3-dss";
- reg = <0x4832a000 0x200>;
- status = "disabled";
- ti,hwmods = "dss_core";
- clocks = <&disp_clk>;
+ target-module@47900000 {
+ compatible = "ti,sysc-omap4", "ti,sysc";
+ reg = <0x47900000 0x4>,
+ <0x47900010 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
+ clocks = <&l3s_clkctrl AM4_L3S_QSPI_CLKCTRL 0>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
- ranges;
+ ranges = <0x0 0x47900000 0x1000>,
+ <0x30000000 0x30000000 0x4000000>;
- dispc: dispc@4832a400 {
- compatible = "ti,omap3-dispc";
- reg = <0x4832a400 0x400>;
- interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "dss_dispc";
- clocks = <&disp_clk>;
+ qspi: spi@0 {
+ compatible = "ti,am4372-qspi";
+ reg = <0 0x100>,
+ <0x30000000 0x4000000>;
+ reg-names = "qspi_base", "qspi_mmap";
+ clocks = <&dpll_per_m2_div4_ck>;
clock-names = "fck";
-
- max-memory-bandwidth = <230000000>;
- };
-
- rfbi: rfbi@4832a800 {
- compatible = "ti,omap3-rfbi";
- reg = <0x4832a800 0x100>;
- ti,hwmods = "dss_rfbi";
- clocks = <&disp_clk>;
- clock-names = "fck";
- status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <0 138 0x4>;
+ num-cs = <4>;
};
};
- ocmcram: ocmcram@40300000 {
+ ocmcram: sram@40300000 {
compatible = "mmio-sram";
reg = <0x40300000 0x40000>; /* 256k */
ranges = <0x0 0x40300000 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
- pm_sram_code: pm-sram-code@0 {
+ pm_sram_code: pm-code-sram@0 {
compatible = "ti,sram";
reg = <0x0 0x1000>;
protect-exec;
};
- pm_sram_data: pm-sram-data@1000 {
+ pm_sram_data: pm-data-sram@1000 {
compatible = "ti,sram";
reg = <0x1000 0x1000>;
pool;
};
};
- dcan0: can@481cc000 {
- compatible = "ti,am4372-d_can", "ti,am3352-d_can";
- ti,hwmods = "d_can0";
- clocks = <&dcan0_fck>;
+ target-module@56000000 {
+ compatible = "ti,sysc-omap4", "ti,sysc";
+ reg = <0x5600fe00 0x4>,
+ <0x5600fe10 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-midle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ clocks = <&gfx_l3_clkctrl AM4_GFX_L3_GFX_CLKCTRL 0>;
clock-names = "fck";
- reg = <0x481cc000 0x2000>;
- syscon-raminit = <&scm_conf 0x644 0>;
- interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- dcan1: can@481d0000 {
- compatible = "ti,am4372-d_can", "ti,am3352-d_can";
- ti,hwmods = "d_can1";
- clocks = <&dcan1_fck>;
- clock-names = "fck";
- reg = <0x481d0000 0x2000>;
- syscon-raminit = <&scm_conf 0x644 1>;
- interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- vpfe0: vpfe@48326000 {
- compatible = "ti,am437x-vpfe";
- reg = <0x48326000 0x2000>;
- interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "vpfe0";
- status = "disabled";
- };
-
- vpfe1: vpfe@48328000 {
- compatible = "ti,am437x-vpfe";
- reg = <0x48328000 0x2000>;
- interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "vpfe1";
- status = "disabled";
+ power-domains = <&prm_gfx>;
+ resets = <&prm_gfx 0>;
+ reset-names = "rstctrl";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x56000000 0x1000000>;
};
};
};
+#include "am437x-l4.dtsi"
#include "am43xx-clocks.dtsi"
+
+&prcm {
+ prm_gfx: prm@400 {
+ compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
+ reg = <0x400 0x100>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
+
+ prm_per: prm@800 {
+ compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
+ reg = <0x800 0x100>;
+ #reset-cells = <1>;
+ };
+
+ prm_wkup: prm@2000 {
+ compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
+ reg = <0x2000 0x100>;
+ #reset-cells = <1>;
+ };
+
+ prm_device: prm@4000 {
+ compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
+ reg = <0x4000 0x100>;
+ #reset-cells = <1>;
+ };
+};
+
+/* Preferred always-on timer for clocksource */
+&timer1_target {
+ ti,no-reset-on-init;
+ ti,no-idle;
+ timer@0 {
+ assigned-clocks = <&timer1_fck>;
+ assigned-clock-parents = <&sys_clkin_ck>;
+ };
+};
+
+/* Preferred timer for clockevent */
+&timer2_target {
+ ti,no-reset-on-init;
+ ti,no-idle;
+ timer@0 {
+ assigned-clocks = <&timer2_fck>;
+ assigned-clock-parents = <&sys_clkin_ck>;
+ };
+};
--
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