From f70575805708cabdedea7498aaa3f710fde4d920 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 31 Jan 2024 03:29:01 +0000
Subject: [PATCH] add lvds1024*800
---
kernel/sound/soc/stm/stm32_spdifrx.c | 187 +++++++++++++++++++++++++++++++++-------------
1 files changed, 135 insertions(+), 52 deletions(-)
diff --git a/kernel/sound/soc/stm/stm32_spdifrx.c b/kernel/sound/soc/stm/stm32_spdifrx.c
index 07082f7..1bfa3b2 100644
--- a/kernel/sound/soc/stm/stm32_spdifrx.c
+++ b/kernel/sound/soc/stm/stm32_spdifrx.c
@@ -1,21 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* STM32 ALSA SoC Digital Audio Interface (SPDIF-rx) driver.
*
* Copyright (C) 2017, STMicroelectronics - All Rights Reserved
* Author(s): Olivier Moysan <olivier.moysan@st.com> for STMicroelectronics.
- *
- * License terms: GPL V2.0.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
- * details.
*/
+#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/completion.h>
#include <linux/delay.h>
@@ -35,6 +26,9 @@
#define STM32_SPDIFRX_DR 0x10
#define STM32_SPDIFRX_CSR 0x14
#define STM32_SPDIFRX_DIR 0x18
+#define STM32_SPDIFRX_VERR 0x3F4
+#define STM32_SPDIFRX_IDR 0x3F8
+#define STM32_SPDIFRX_SIDR 0x3FC
/* Bit definition for SPDIF_CR register */
#define SPDIFRX_CR_SPDIFEN_SHIFT 0
@@ -167,6 +161,18 @@
#define SPDIFRX_SPDIFEN_DISABLE 0x0
#define SPDIFRX_SPDIFEN_SYNC 0x1
#define SPDIFRX_SPDIFEN_ENABLE 0x3
+
+/* Bit definition for SPDIFRX_VERR register */
+#define SPDIFRX_VERR_MIN_MASK GENMASK(3, 0)
+#define SPDIFRX_VERR_MAJ_MASK GENMASK(7, 4)
+
+/* Bit definition for SPDIFRX_IDR register */
+#define SPDIFRX_IDR_ID_MASK GENMASK(31, 0)
+
+/* Bit definition for SPDIFRX_SIDR register */
+#define SPDIFRX_SIDR_SID_MASK GENMASK(31, 0)
+
+#define SPDIFRX_IPIDR_NUMBER 0x00130041
#define SPDIFRX_IN1 0x1
#define SPDIFRX_IN2 0x2
@@ -347,6 +353,8 @@
SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK | SPDIFRX_CR_RXSTEO;
cr_mask = cr;
+ cr |= SPDIFRX_CR_NBTRSET(SPDIFRX_NBTR_63);
+ cr_mask |= SPDIFRX_CR_NBTR_MASK;
cr |= SPDIFRX_CR_SPDIFENSET(SPDIFRX_SPDIFEN_SYNC);
cr_mask |= SPDIFRX_CR_SPDIFEN_MASK;
ret = regmap_update_bits(spdifrx->regmap, STM32_SPDIFRX_CR,
@@ -398,7 +406,9 @@
spdifrx->ctrl_chan = dma_request_chan(dev, "rx-ctrl");
if (IS_ERR(spdifrx->ctrl_chan)) {
- dev_err(dev, "dma_request_slave_channel failed\n");
+ if (PTR_ERR(spdifrx->ctrl_chan) != -EPROBE_DEFER)
+ dev_err(dev, "dma_request_slave_channel error %ld\n",
+ PTR_ERR(spdifrx->ctrl_chan));
return PTR_ERR(spdifrx->ctrl_chan);
}
@@ -497,7 +507,7 @@
if (wait_for_completion_interruptible_timeout(&spdifrx->cs_completion,
msecs_to_jiffies(100))
<= 0) {
- dev_err(&spdifrx->pdev->dev, "Failed to get control data\n");
+ dev_dbg(&spdifrx->pdev->dev, "Failed to get control data\n");
ret = -EAGAIN;
}
@@ -607,6 +617,9 @@
case STM32_SPDIFRX_DR:
case STM32_SPDIFRX_CSR:
case STM32_SPDIFRX_DIR:
+ case STM32_SPDIFRX_VERR:
+ case STM32_SPDIFRX_IDR:
+ case STM32_SPDIFRX_SIDR:
return true;
default:
return false;
@@ -615,10 +628,15 @@
static bool stm32_spdifrx_volatile_reg(struct device *dev, unsigned int reg)
{
- if (reg == STM32_SPDIFRX_DR)
+ switch (reg) {
+ case STM32_SPDIFRX_DR:
+ case STM32_SPDIFRX_CSR:
+ case STM32_SPDIFRX_SR:
+ case STM32_SPDIFRX_DIR:
return true;
-
- return false;
+ default:
+ return false;
+ }
}
static bool stm32_spdifrx_writeable_reg(struct device *dev, unsigned int reg)
@@ -637,11 +655,13 @@
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
- .max_register = STM32_SPDIFRX_DIR,
+ .max_register = STM32_SPDIFRX_SIDR,
.readable_reg = stm32_spdifrx_readable_reg,
.volatile_reg = stm32_spdifrx_volatile_reg,
.writeable_reg = stm32_spdifrx_writeable_reg,
+ .num_reg_defaults_raw = STM32_SPDIFRX_SIDR / sizeof(u32) + 1,
.fast_io = true,
+ .cache_type = REGCACHE_FLAT,
};
static irqreturn_t stm32_spdifrx_isr(int irq, void *devid)
@@ -649,7 +669,7 @@
struct stm32_spdifrx_data *spdifrx = (struct stm32_spdifrx_data *)devid;
struct platform_device *pdev = spdifrx->pdev;
unsigned int cr, mask, sr, imr;
- unsigned int flags;
+ unsigned int flags, sync_state;
int err = 0, err_xrun = 0;
regmap_read(spdifrx->regmap, STM32_SPDIFRX_SR, &sr);
@@ -709,10 +729,22 @@
}
if (err) {
- /* SPDIFRX in STATE_STOP. Disable SPDIFRX to clear errors */
+ regmap_read(spdifrx->regmap, STM32_SPDIFRX_CR, &cr);
+ sync_state = FIELD_GET(SPDIFRX_CR_SPDIFEN_MASK, cr) &&
+ SPDIFRX_SPDIFEN_SYNC;
+
+ /* SPDIFRX is in STATE_STOP. Disable SPDIFRX to clear errors */
cr = SPDIFRX_CR_SPDIFENSET(SPDIFRX_SPDIFEN_DISABLE);
regmap_update_bits(spdifrx->regmap, STM32_SPDIFRX_CR,
SPDIFRX_CR_SPDIFEN_MASK, cr);
+
+ /* If SPDIFRX was in STATE_SYNC, retry synchro */
+ if (sync_state) {
+ cr = SPDIFRX_CR_SPDIFENSET(SPDIFRX_SPDIFEN_SYNC);
+ regmap_update_bits(spdifrx->regmap, STM32_SPDIFRX_CR,
+ SPDIFRX_CR_SPDIFEN_MASK, cr);
+ return IRQ_HANDLED;
+ }
spin_lock(&spdifrx->irq_lock);
if (spdifrx->substream)
@@ -850,7 +882,8 @@
static const struct snd_pcm_hardware stm32_spdifrx_pcm_hw = {
.info = SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_MMAP,
.buffer_bytes_max = 8 * PAGE_SIZE,
- .period_bytes_max = 2048, /* MDMA constraint */
+ .period_bytes_min = 1024,
+ .period_bytes_max = 4 * PAGE_SIZE,
.periods_min = 2,
.periods_max = 8,
};
@@ -898,15 +931,31 @@
spdifrx->kclk = devm_clk_get(&pdev->dev, "kclk");
if (IS_ERR(spdifrx->kclk)) {
- dev_err(&pdev->dev, "Could not get kclk\n");
+ if (PTR_ERR(spdifrx->kclk) != -EPROBE_DEFER)
+ dev_err(&pdev->dev, "Could not get kclk: %ld\n",
+ PTR_ERR(spdifrx->kclk));
return PTR_ERR(spdifrx->kclk);
}
spdifrx->irq = platform_get_irq(pdev, 0);
- if (spdifrx->irq < 0) {
- dev_err(&pdev->dev, "No irq for node %s\n", pdev->name);
+ if (spdifrx->irq < 0)
return spdifrx->irq;
- }
+
+ return 0;
+}
+
+static int stm32_spdifrx_remove(struct platform_device *pdev)
+{
+ struct stm32_spdifrx_data *spdifrx = platform_get_drvdata(pdev);
+
+ if (spdifrx->ctrl_chan)
+ dma_release_channel(spdifrx->ctrl_chan);
+
+ if (spdifrx->dmab)
+ snd_dma_free_pages(spdifrx->dmab);
+
+ snd_dmaengine_pcm_unregister(&pdev->dev);
+ snd_soc_unregister_component(&pdev->dev);
return 0;
}
@@ -916,6 +965,7 @@
struct stm32_spdifrx_data *spdifrx;
struct reset_control *rst;
const struct snd_dmaengine_pcm_config *pcm_config = NULL;
+ u32 ver, idr;
int ret;
spdifrx = devm_kzalloc(&pdev->dev, sizeof(*spdifrx), GFP_KERNEL);
@@ -937,7 +987,9 @@
spdifrx->base,
spdifrx->regmap_conf);
if (IS_ERR(spdifrx->regmap)) {
- dev_err(&pdev->dev, "Regmap init failed\n");
+ if (PTR_ERR(spdifrx->regmap) != -EPROBE_DEFER)
+ dev_err(&pdev->dev, "Regmap init error %ld\n",
+ PTR_ERR(spdifrx->regmap));
return PTR_ERR(spdifrx->regmap);
}
@@ -948,61 +1000,92 @@
return ret;
}
- rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
- if (!IS_ERR(rst)) {
- reset_control_assert(rst);
- udelay(2);
- reset_control_deassert(rst);
+ rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
+ if (IS_ERR(rst)) {
+ if (PTR_ERR(rst) != -EPROBE_DEFER)
+ dev_err(&pdev->dev, "Reset controller error %ld\n",
+ PTR_ERR(rst));
+ return PTR_ERR(rst);
+ }
+ reset_control_assert(rst);
+ udelay(2);
+ reset_control_deassert(rst);
+
+ pcm_config = &stm32_spdifrx_pcm_config;
+ ret = snd_dmaengine_pcm_register(&pdev->dev, pcm_config, 0);
+ if (ret) {
+ if (ret != -EPROBE_DEFER)
+ dev_err(&pdev->dev, "PCM DMA register error %d\n", ret);
+ return ret;
}
- ret = devm_snd_soc_register_component(&pdev->dev,
- &stm32_spdifrx_component,
- stm32_spdifrx_dai,
- ARRAY_SIZE(stm32_spdifrx_dai));
- if (ret)
+ ret = snd_soc_register_component(&pdev->dev,
+ &stm32_spdifrx_component,
+ stm32_spdifrx_dai,
+ ARRAY_SIZE(stm32_spdifrx_dai));
+ if (ret) {
+ snd_dmaengine_pcm_unregister(&pdev->dev);
return ret;
+ }
ret = stm32_spdifrx_dma_ctrl_register(&pdev->dev, spdifrx);
if (ret)
goto error;
- pcm_config = &stm32_spdifrx_pcm_config;
- ret = devm_snd_dmaengine_pcm_register(&pdev->dev, pcm_config, 0);
- if (ret) {
- dev_err(&pdev->dev, "PCM DMA register returned %d\n", ret);
+ ret = regmap_read(spdifrx->regmap, STM32_SPDIFRX_IDR, &idr);
+ if (ret)
goto error;
+
+ if (idr == SPDIFRX_IPIDR_NUMBER) {
+ ret = regmap_read(spdifrx->regmap, STM32_SPDIFRX_VERR, &ver);
+ if (ret)
+ goto error;
+
+ dev_dbg(&pdev->dev, "SPDIFRX version: %lu.%lu registered\n",
+ FIELD_GET(SPDIFRX_VERR_MAJ_MASK, ver),
+ FIELD_GET(SPDIFRX_VERR_MIN_MASK, ver));
}
- return 0;
+ return ret;
error:
- if (!IS_ERR(spdifrx->ctrl_chan))
- dma_release_channel(spdifrx->ctrl_chan);
- if (spdifrx->dmab)
- snd_dma_free_pages(spdifrx->dmab);
+ stm32_spdifrx_remove(pdev);
return ret;
}
-static int stm32_spdifrx_remove(struct platform_device *pdev)
+MODULE_DEVICE_TABLE(of, stm32_spdifrx_ids);
+
+#ifdef CONFIG_PM_SLEEP
+static int stm32_spdifrx_suspend(struct device *dev)
{
- struct stm32_spdifrx_data *spdifrx = platform_get_drvdata(pdev);
+ struct stm32_spdifrx_data *spdifrx = dev_get_drvdata(dev);
- if (spdifrx->ctrl_chan)
- dma_release_channel(spdifrx->ctrl_chan);
-
- if (spdifrx->dmab)
- snd_dma_free_pages(spdifrx->dmab);
+ regcache_cache_only(spdifrx->regmap, true);
+ regcache_mark_dirty(spdifrx->regmap);
return 0;
}
-MODULE_DEVICE_TABLE(of, stm32_spdifrx_ids);
+static int stm32_spdifrx_resume(struct device *dev)
+{
+ struct stm32_spdifrx_data *spdifrx = dev_get_drvdata(dev);
+
+ regcache_cache_only(spdifrx->regmap, false);
+
+ return regcache_sync(spdifrx->regmap);
+}
+#endif /* CONFIG_PM_SLEEP */
+
+static const struct dev_pm_ops stm32_spdifrx_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(stm32_spdifrx_suspend, stm32_spdifrx_resume)
+};
static struct platform_driver stm32_spdifrx_driver = {
.driver = {
.name = "st,stm32-spdifrx",
.of_match_table = stm32_spdifrx_ids,
+ .pm = &stm32_spdifrx_pm_ops,
},
.probe = stm32_spdifrx_probe,
.remove = stm32_spdifrx_remove,
--
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