From f70575805708cabdedea7498aaa3f710fde4d920 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 31 Jan 2024 03:29:01 +0000
Subject: [PATCH] add lvds1024*800
---
kernel/sound/soc/codecs/wm8961.c | 70 +++++++++++++++++------------------
1 files changed, 34 insertions(+), 36 deletions(-)
diff --git a/kernel/sound/soc/codecs/wm8961.c b/kernel/sound/soc/codecs/wm8961.c
index 68b4cad..ef80d9f 100644
--- a/kernel/sound/soc/codecs/wm8961.c
+++ b/kernel/sound/soc/codecs/wm8961.c
@@ -1,13 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* wm8961.c -- WM8961 ALSA SoC Audio driver
*
* Copyright 2009-10 Wolfson Microelectronics, plc
*
* Author: Mark Brown
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*
* Currently unimplemented features:
* - ALC
@@ -195,10 +192,10 @@
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
- u16 hp_reg = snd_soc_component_read32(component, WM8961_ANALOGUE_HP_0);
- u16 cp_reg = snd_soc_component_read32(component, WM8961_CHARGE_PUMP_1);
- u16 pwr_reg = snd_soc_component_read32(component, WM8961_PWR_MGMT_2);
- u16 dcs_reg = snd_soc_component_read32(component, WM8961_DC_SERVO_1);
+ u16 hp_reg = snd_soc_component_read(component, WM8961_ANALOGUE_HP_0);
+ u16 cp_reg = snd_soc_component_read(component, WM8961_CHARGE_PUMP_1);
+ u16 pwr_reg = snd_soc_component_read(component, WM8961_PWR_MGMT_2);
+ u16 dcs_reg = snd_soc_component_read(component, WM8961_DC_SERVO_1);
int timeout = 500;
if (event & SND_SOC_DAPM_POST_PMU) {
@@ -232,7 +229,7 @@
snd_soc_component_write(component, WM8961_DC_SERVO_1, dcs_reg);
do {
msleep(1);
- dcs_reg = snd_soc_component_read32(component, WM8961_DC_SERVO_1);
+ dcs_reg = snd_soc_component_read(component, WM8961_DC_SERVO_1);
} while (--timeout &&
dcs_reg & (WM8961_DCS_TRIG_STARTUP_HPR |
WM8961_DCS_TRIG_STARTUP_HPL));
@@ -287,8 +284,8 @@
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
- u16 pwr_reg = snd_soc_component_read32(component, WM8961_PWR_MGMT_2);
- u16 spk_reg = snd_soc_component_read32(component, WM8961_CLASS_D_CONTROL_1);
+ u16 pwr_reg = snd_soc_component_read(component, WM8961_PWR_MGMT_2);
+ u16 spk_reg = snd_soc_component_read(component, WM8961_CLASS_D_CONTROL_1);
if (event & SND_SOC_DAPM_POST_PMU) {
/* Enable the PGA */
@@ -524,7 +521,7 @@
abs(wm8961_srate[best].rate - fs))
best = i;
}
- reg = snd_soc_component_read32(component, WM8961_ADDITIONAL_CONTROL_3);
+ reg = snd_soc_component_read(component, WM8961_ADDITIONAL_CONTROL_3);
reg &= ~WM8961_SAMPLE_RATE_MASK;
reg |= wm8961_srate[best].val;
snd_soc_component_write(component, WM8961_ADDITIONAL_CONTROL_3, reg);
@@ -557,12 +554,12 @@
wm8961_clk_sys_ratio[i].ratio, wm8961->sysclk, fs,
wm8961->sysclk / fs);
- reg = snd_soc_component_read32(component, WM8961_CLOCKING_4);
+ reg = snd_soc_component_read(component, WM8961_CLOCKING_4);
reg &= ~WM8961_CLK_SYS_RATE_MASK;
reg |= wm8961_clk_sys_ratio[i].val << WM8961_CLK_SYS_RATE_SHIFT;
snd_soc_component_write(component, WM8961_CLOCKING_4, reg);
- reg = snd_soc_component_read32(component, WM8961_AUDIO_INTERFACE_0);
+ reg = snd_soc_component_read(component, WM8961_AUDIO_INTERFACE_0);
reg &= ~WM8961_WL_MASK;
switch (params_width(params)) {
case 16:
@@ -582,7 +579,7 @@
snd_soc_component_write(component, WM8961_AUDIO_INTERFACE_0, reg);
/* Sloping stop-band filter is recommended for <= 24kHz */
- reg = snd_soc_component_read32(component, WM8961_ADC_DAC_CONTROL_2);
+ reg = snd_soc_component_read(component, WM8961_ADC_DAC_CONTROL_2);
if (fs <= 24000)
reg |= WM8961_DACSLOPE;
else
@@ -598,7 +595,7 @@
{
struct snd_soc_component *component = dai->component;
struct wm8961_priv *wm8961 = snd_soc_component_get_drvdata(component);
- u16 reg = snd_soc_component_read32(component, WM8961_CLOCKING1);
+ u16 reg = snd_soc_component_read(component, WM8961_CLOCKING1);
if (freq > 33000000) {
dev_err(component->dev, "MCLK must be <33MHz\n");
@@ -624,7 +621,7 @@
static int wm8961_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
struct snd_soc_component *component = dai->component;
- u16 aif = snd_soc_component_read32(component, WM8961_AUDIO_INTERFACE_0);
+ u16 aif = snd_soc_component_read(component, WM8961_AUDIO_INTERFACE_0);
aif &= ~(WM8961_BCLKINV | WM8961_LRP |
WM8961_MS | WM8961_FORMAT_MASK);
@@ -653,7 +650,7 @@
case SND_SOC_DAIFMT_DSP_B:
aif |= WM8961_LRP;
- /* fall through */
+ fallthrough;
case SND_SOC_DAIFMT_DSP_A:
aif |= 3;
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
@@ -691,7 +688,7 @@
static int wm8961_set_tristate(struct snd_soc_dai *dai, int tristate)
{
struct snd_soc_component *component = dai->component;
- u16 reg = snd_soc_component_read32(component, WM8961_ADDITIONAL_CONTROL_2);
+ u16 reg = snd_soc_component_read(component, WM8961_ADDITIONAL_CONTROL_2);
if (tristate)
reg |= WM8961_TRIS;
@@ -701,10 +698,10 @@
return snd_soc_component_write(component, WM8961_ADDITIONAL_CONTROL_2, reg);
}
-static int wm8961_digital_mute(struct snd_soc_dai *dai, int mute)
+static int wm8961_mute(struct snd_soc_dai *dai, int mute, int direction)
{
struct snd_soc_component *component = dai->component;
- u16 reg = snd_soc_component_read32(component, WM8961_ADC_DAC_CONTROL_1);
+ u16 reg = snd_soc_component_read(component, WM8961_ADC_DAC_CONTROL_1);
if (mute)
reg |= WM8961_DACMU;
@@ -723,14 +720,14 @@
switch (div_id) {
case WM8961_BCLK:
- reg = snd_soc_component_read32(component, WM8961_CLOCKING2);
+ reg = snd_soc_component_read(component, WM8961_CLOCKING2);
reg &= ~WM8961_BCLKDIV_MASK;
reg |= div;
snd_soc_component_write(component, WM8961_CLOCKING2, reg);
break;
case WM8961_LRCLK:
- reg = snd_soc_component_read32(component, WM8961_AUDIO_INTERFACE_2);
+ reg = snd_soc_component_read(component, WM8961_AUDIO_INTERFACE_2);
reg &= ~WM8961_LRCLK_RATE_MASK;
reg |= div;
snd_soc_component_write(component, WM8961_AUDIO_INTERFACE_2, reg);
@@ -760,12 +757,12 @@
case SND_SOC_BIAS_PREPARE:
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY) {
/* Enable bias generation */
- reg = snd_soc_component_read32(component, WM8961_ANTI_POP);
+ reg = snd_soc_component_read(component, WM8961_ANTI_POP);
reg |= WM8961_BUFIOEN | WM8961_BUFDCOPEN;
snd_soc_component_write(component, WM8961_ANTI_POP, reg);
/* VMID=2*50k, VREF */
- reg = snd_soc_component_read32(component, WM8961_PWR_MGMT_1);
+ reg = snd_soc_component_read(component, WM8961_PWR_MGMT_1);
reg &= ~WM8961_VMIDSEL_MASK;
reg |= (1 << WM8961_VMIDSEL_SHIFT) | WM8961_VREF;
snd_soc_component_write(component, WM8961_PWR_MGMT_1, reg);
@@ -775,17 +772,17 @@
case SND_SOC_BIAS_STANDBY:
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_PREPARE) {
/* VREF off */
- reg = snd_soc_component_read32(component, WM8961_PWR_MGMT_1);
+ reg = snd_soc_component_read(component, WM8961_PWR_MGMT_1);
reg &= ~WM8961_VREF;
snd_soc_component_write(component, WM8961_PWR_MGMT_1, reg);
/* Bias generation off */
- reg = snd_soc_component_read32(component, WM8961_ANTI_POP);
+ reg = snd_soc_component_read(component, WM8961_ANTI_POP);
reg &= ~(WM8961_BUFIOEN | WM8961_BUFDCOPEN);
snd_soc_component_write(component, WM8961_ANTI_POP, reg);
/* VMID off */
- reg = snd_soc_component_read32(component, WM8961_PWR_MGMT_1);
+ reg = snd_soc_component_read(component, WM8961_PWR_MGMT_1);
reg &= ~WM8961_VMIDSEL_MASK;
snd_soc_component_write(component, WM8961_PWR_MGMT_1, reg);
}
@@ -809,9 +806,10 @@
.hw_params = wm8961_hw_params,
.set_sysclk = wm8961_set_sysclk,
.set_fmt = wm8961_set_fmt,
- .digital_mute = wm8961_digital_mute,
+ .mute_stream = wm8961_mute,
.set_tristate = wm8961_set_tristate,
.set_clkdiv = wm8961_set_clkdiv,
+ .no_capture_mute = 1,
};
static struct snd_soc_dai_driver wm8961_dai = {
@@ -836,35 +834,35 @@
u16 reg;
/* Enable class W */
- reg = snd_soc_component_read32(component, WM8961_CHARGE_PUMP_B);
+ reg = snd_soc_component_read(component, WM8961_CHARGE_PUMP_B);
reg |= WM8961_CP_DYN_PWR_MASK;
snd_soc_component_write(component, WM8961_CHARGE_PUMP_B, reg);
/* Latch volume update bits (right channel only, we always
* write both out) and default ZC on. */
- reg = snd_soc_component_read32(component, WM8961_ROUT1_VOLUME);
+ reg = snd_soc_component_read(component, WM8961_ROUT1_VOLUME);
snd_soc_component_write(component, WM8961_ROUT1_VOLUME,
reg | WM8961_LO1ZC | WM8961_OUT1VU);
snd_soc_component_write(component, WM8961_LOUT1_VOLUME, reg | WM8961_LO1ZC);
- reg = snd_soc_component_read32(component, WM8961_ROUT2_VOLUME);
+ reg = snd_soc_component_read(component, WM8961_ROUT2_VOLUME);
snd_soc_component_write(component, WM8961_ROUT2_VOLUME,
reg | WM8961_SPKRZC | WM8961_SPKVU);
snd_soc_component_write(component, WM8961_LOUT2_VOLUME, reg | WM8961_SPKLZC);
- reg = snd_soc_component_read32(component, WM8961_RIGHT_ADC_VOLUME);
+ reg = snd_soc_component_read(component, WM8961_RIGHT_ADC_VOLUME);
snd_soc_component_write(component, WM8961_RIGHT_ADC_VOLUME, reg | WM8961_ADCVU);
- reg = snd_soc_component_read32(component, WM8961_RIGHT_INPUT_VOLUME);
+ reg = snd_soc_component_read(component, WM8961_RIGHT_INPUT_VOLUME);
snd_soc_component_write(component, WM8961_RIGHT_INPUT_VOLUME, reg | WM8961_IPVU);
/* Use soft mute by default */
- reg = snd_soc_component_read32(component, WM8961_ADC_DAC_CONTROL_2);
+ reg = snd_soc_component_read(component, WM8961_ADC_DAC_CONTROL_2);
reg |= WM8961_DACSMM;
snd_soc_component_write(component, WM8961_ADC_DAC_CONTROL_2, reg);
/* Use automatic clocking mode by default; for now this is all
* we support.
*/
- reg = snd_soc_component_read32(component, WM8961_CLOCKING_3);
+ reg = snd_soc_component_read(component, WM8961_CLOCKING_3);
reg &= ~WM8961_MANUAL_MODE;
snd_soc_component_write(component, WM8961_CLOCKING_3, reg);
--
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