From f70575805708cabdedea7498aaa3f710fde4d920 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 31 Jan 2024 03:29:01 +0000
Subject: [PATCH] add lvds1024*800
---
kernel/sound/soc/codecs/wm8958-dsp2.c | 53 +++++++++++++++++++++++------------------------------
1 files changed, 23 insertions(+), 30 deletions(-)
diff --git a/kernel/sound/soc/codecs/wm8958-dsp2.c b/kernel/sound/soc/codecs/wm8958-dsp2.c
index f0a4095..f725676 100644
--- a/kernel/sound/soc/codecs/wm8958-dsp2.c
+++ b/kernel/sound/soc/codecs/wm8958-dsp2.c
@@ -1,13 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* wm8958-dsp2.c -- WM8958 DSP2 support
*
* Copyright 2011 Wolfson Microelectronics plc
*
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#include <linux/module.h>
@@ -27,6 +24,8 @@
#include <linux/mfd/wm8994/registers.h>
#include <linux/mfd/wm8994/pdata.h>
#include <linux/mfd/wm8994/gpio.h>
+
+#include <asm/unaligned.h>
#include "wm8994.h"
@@ -61,18 +60,15 @@
}
if (memcmp(fw->data, "WMFW", 4) != 0) {
- memcpy(&data32, fw->data, sizeof(data32));
- data32 = be32_to_cpu(data32);
+ data32 = get_unaligned_be32(fw->data);
dev_err(component->dev, "%s: firmware has bad file magic %08x\n",
name, data32);
goto err;
}
- memcpy(&data32, fw->data + 4, sizeof(data32));
- len = be32_to_cpu(data32);
+ len = get_unaligned_be32(fw->data + 4);
+ data32 = get_unaligned_be32(fw->data + 8);
- memcpy(&data32, fw->data + 8, sizeof(data32));
- data32 = be32_to_cpu(data32);
if ((data32 >> 24) & 0xff) {
dev_err(component->dev, "%s: unsupported firmware version %d\n",
name, (data32 >> 24) & 0xff);
@@ -90,9 +86,8 @@
}
if (check) {
- memcpy(&data64, fw->data + 24, sizeof(u64));
- dev_info(component->dev, "%s timestamp %llx\n",
- name, be64_to_cpu(data64));
+ data64 = get_unaligned_be64(fw->data + 24);
+ dev_info(component->dev, "%s timestamp %llx\n", name, data64);
} else {
snd_soc_component_write(component, 0x102, 0x2);
snd_soc_component_write(component, 0x900, 0x2);
@@ -107,8 +102,7 @@
goto err;
}
- memcpy(&data32, data + 4, sizeof(data32));
- block_len = be32_to_cpu(data32);
+ block_len = get_unaligned_be32(data + 4);
if (block_len + 8 > len) {
dev_err(component->dev, "%zd byte block longer than file\n",
block_len);
@@ -119,8 +113,7 @@
goto err;
}
- memcpy(&data32, data, sizeof(data32));
- data32 = be32_to_cpu(data32);
+ data32 = get_unaligned_be32(data);
switch ((data32 >> 24) & 0xff) {
case WM_FW_BLOCK_INFO:
@@ -199,7 +192,7 @@
int i;
/* If the DSP is already running then noop */
- if (snd_soc_component_read32(component, WM8958_DSP2_PROGRAM) & WM8958_DSP2_ENA)
+ if (snd_soc_component_read(component, WM8958_DSP2_PROGRAM) & WM8958_DSP2_ENA)
return;
/* If we have MBC firmware download it */
@@ -331,7 +324,7 @@
static void wm8958_dsp_apply(struct snd_soc_component *component, int path, int start)
{
struct wm8994_priv *wm8994 = snd_soc_component_get_drvdata(component);
- int pwr_reg = snd_soc_component_read32(component, WM8994_POWER_MANAGEMENT_5);
+ int pwr_reg = snd_soc_component_read(component, WM8994_POWER_MANAGEMENT_5);
int ena, reg, aif;
switch (path) {
@@ -359,7 +352,7 @@
if (!pwr_reg)
ena = 0;
- reg = snd_soc_component_read32(component, WM8958_DSP2_PROGRAM);
+ reg = snd_soc_component_read(component, WM8958_DSP2_PROGRAM);
dev_dbg(component->dev, "DSP path %d %d startup: %d, power: %x, DSP: %x\n",
path, wm8994->dsp_active, start, pwr_reg, reg);
@@ -370,9 +363,9 @@
return;
/* If either AIFnCLK is not yet enabled postpone */
- if (!(snd_soc_component_read32(component, WM8994_AIF1_CLOCKING_1)
+ if (!(snd_soc_component_read(component, WM8994_AIF1_CLOCKING_1)
& WM8994_AIF1CLK_ENA_MASK) &&
- !(snd_soc_component_read32(component, WM8994_AIF2_CLOCKING_1)
+ !(snd_soc_component_read(component, WM8994_AIF2_CLOCKING_1)
& WM8994_AIF2CLK_ENA_MASK))
return;
@@ -467,7 +460,7 @@
int reg;
/* Don't allow on the fly reconfiguration */
- reg = snd_soc_component_read32(component, WM8994_CLOCKING_1);
+ reg = snd_soc_component_read(component, WM8994_CLOCKING_1);
if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
return -EBUSY;
@@ -537,7 +530,7 @@
wm8958_dsp_apply(component, mbc, wm8994->mbc_ena[mbc]);
- return 0;
+ return 1;
}
#define WM8958_MBC_SWITCH(xname, xval) {\
@@ -557,7 +550,7 @@
int reg;
/* Don't allow on the fly reconfiguration */
- reg = snd_soc_component_read32(component, WM8994_CLOCKING_1);
+ reg = snd_soc_component_read(component, WM8994_CLOCKING_1);
if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
return -EBUSY;
@@ -590,7 +583,7 @@
int reg;
/* Don't allow on the fly reconfiguration */
- reg = snd_soc_component_read32(component, WM8994_CLOCKING_1);
+ reg = snd_soc_component_read(component, WM8994_CLOCKING_1);
if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
return -EBUSY;
@@ -663,7 +656,7 @@
wm8958_dsp_apply(component, vss, wm8994->vss_ena[vss]);
- return 0;
+ return 1;
}
@@ -737,7 +730,7 @@
wm8958_dsp_apply(component, hpf % 3, ucontrol->value.integer.value[0]);
- return 0;
+ return 1;
}
#define WM8958_HPF_SWITCH(xname, xval) {\
@@ -757,7 +750,7 @@
int reg;
/* Don't allow on the fly reconfiguration */
- reg = snd_soc_component_read32(component, WM8994_CLOCKING_1);
+ reg = snd_soc_component_read(component, WM8994_CLOCKING_1);
if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
return -EBUSY;
@@ -831,7 +824,7 @@
wm8958_dsp_apply(component, eq, ucontrol->value.integer.value[0]);
- return 0;
+ return 1;
}
#define WM8958_ENH_EQ_SWITCH(xname, xval) {\
--
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