From f70575805708cabdedea7498aaa3f710fde4d920 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 31 Jan 2024 03:29:01 +0000
Subject: [PATCH] add lvds1024*800
---
kernel/drivers/net/ethernet/qlogic/qed/qed_dcbx.c | 66 +++++++++-----------------------
1 files changed, 19 insertions(+), 47 deletions(-)
diff --git a/kernel/drivers/net/ethernet/qlogic/qed/qed_dcbx.c b/kernel/drivers/net/ethernet/qlogic/qed/qed_dcbx.c
index ff8a775..e81dd34 100644
--- a/kernel/drivers/net/ethernet/qlogic/qed/qed_dcbx.c
+++ b/kernel/drivers/net/ethernet/qlogic/qed/qed_dcbx.c
@@ -1,33 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
/* QLogic qed NIC Driver
* Copyright (c) 2015-2017 QLogic Corporation
- *
- * This software is available to you under a choice of one of two
- * licenses. You may choose to be licensed under the terms of the GNU
- * General Public License (GPL) Version 2, available from the file
- * COPYING in the main directory of this source tree, or the
- * OpenIB.org BSD license below:
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- *
- * - Redistributions of source code must retain the above
- * copyright notice, this list of conditions and the following
- * disclaimer.
- *
- * - Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and /or other materials
- * provided with the distribution.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
+ * Copyright (c) 2019-2020 Marvell International Ltd.
*/
#include <linux/types.h>
@@ -204,9 +178,7 @@
else
p_data->arr[type].update = DONT_UPDATE_DCB_DSCP;
- /* Do not add vlan tag 0 when DCB is enabled and port in UFP/OV mode */
- if ((test_bit(QED_MF_8021Q_TAGGING, &p_hwfn->cdev->mf_bits) ||
- test_bit(QED_MF_8021AD_TAGGING, &p_hwfn->cdev->mf_bits)))
+ if (test_bit(QED_MF_DONT_ADD_VLAN0_TAG, &p_hwfn->cdev->mf_bits))
p_data->arr[type].dont_add_vlan0 = true;
/* QM reconf data */
@@ -262,8 +234,9 @@
*type = DCBX_PROTOCOL_ROCE_V2;
} else {
*type = DCBX_MAX_PROTOCOL_TYPE;
- DP_ERR(p_hwfn, "No action required, App TLV entry = 0x%x\n",
- app_prio_bitmap);
+ DP_VERBOSE(p_hwfn, QED_MSG_DCB,
+ "No action required, App TLV entry = 0x%x\n",
+ app_prio_bitmap);
return false;
}
@@ -574,7 +547,8 @@
struct dcbx_ets_feature *p_ets,
struct qed_dcbx_params *p_params)
{
- u32 bw_map[2], tsa_map[2], pri_map;
+ __be32 bw_map[2], tsa_map[2];
+ u32 pri_map;
int i;
p_params->ets_willing = QED_MFW_GET_FIELD(p_ets->flags,
@@ -600,11 +574,10 @@
/* 8 bit tsa and bw data corresponding to each of the 8 TC's are
* encoded in a type u32 array of size 2.
*/
- bw_map[0] = be32_to_cpu(p_ets->tc_bw_tbl[0]);
- bw_map[1] = be32_to_cpu(p_ets->tc_bw_tbl[1]);
- tsa_map[0] = be32_to_cpu(p_ets->tc_tsa_tbl[0]);
- tsa_map[1] = be32_to_cpu(p_ets->tc_tsa_tbl[1]);
+ cpu_to_be32_array(bw_map, p_ets->tc_bw_tbl, 2);
+ cpu_to_be32_array(tsa_map, p_ets->tc_tsa_tbl, 2);
pri_map = p_ets->pri_tc_tbl[0];
+
for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) {
p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i];
p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i];
@@ -1081,7 +1054,7 @@
struct dcbx_ets_feature *p_ets,
struct qed_dcbx_params *p_params)
{
- u8 *bw_map, *tsa_map;
+ __be32 bw_map[2], tsa_map[2];
u32 val;
int i;
@@ -1103,22 +1076,21 @@
p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK;
p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_SHIFT;
- bw_map = (u8 *)&p_ets->tc_bw_tbl[0];
- tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0];
p_ets->pri_tc_tbl[0] = 0;
+
for (i = 0; i < QED_MAX_PFC_PRIORITIES; i++) {
- bw_map[i] = p_params->ets_tc_bw_tbl[i];
- tsa_map[i] = p_params->ets_tc_tsa_tbl[i];
+ ((u8 *)bw_map)[i] = p_params->ets_tc_bw_tbl[i];
+ ((u8 *)tsa_map)[i] = p_params->ets_tc_tsa_tbl[i];
+
/* Copy the priority value to the corresponding 4 bits in the
* traffic class table.
*/
val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
p_ets->pri_tc_tbl[0] |= val;
}
- for (i = 0; i < 2; i++) {
- p_ets->tc_bw_tbl[i] = cpu_to_be32(p_ets->tc_bw_tbl[i]);
- p_ets->tc_tsa_tbl[i] = cpu_to_be32(p_ets->tc_tsa_tbl[i]);
- }
+
+ be32_to_cpu_array(p_ets->tc_bw_tbl, bw_map, 2);
+ be32_to_cpu_array(p_ets->tc_tsa_tbl, tsa_map, 2);
}
static void
--
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