From f70575805708cabdedea7498aaa3f710fde4d920 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 31 Jan 2024 03:29:01 +0000
Subject: [PATCH] add lvds1024*800
---
kernel/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 27 +--------------------------
1 files changed, 1 insertions(+), 26 deletions(-)
diff --git a/kernel/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h b/kernel/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
index 1240f50..234eb7d 100644
--- a/kernel/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
+++ b/kernel/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
@@ -1,13 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
*/
#ifndef _DPU_HW_UTIL_H
@@ -18,7 +10,6 @@
#include "dpu_hw_mdss.h"
#define REG_MASK(n) ((BIT(n)) - 1)
-struct dpu_format_extended;
/*
* This is the common struct maintained by each sub block
@@ -146,16 +137,6 @@
* Detail enhancer settings
*/
struct dpu_hw_scaler3_de_cfg de;
-};
-
-struct dpu_hw_scaler3_lut_cfg {
- bool is_configured;
- u32 *dir_lut;
- size_t dir_len;
- u32 *cir_lut;
- size_t cir_len;
- u32 *sep_lut;
- size_t sep_len;
};
/**
@@ -324,12 +305,6 @@
#define DPU_REG_WRITE(c, off, val) dpu_reg_write(c, off, val, #off)
#define DPU_REG_READ(c, off) dpu_reg_read(c, off)
-
-#define MISR_FRAME_COUNT_MASK 0xFF
-#define MISR_CTRL_ENABLE BIT(8)
-#define MISR_CTRL_STATUS BIT(9)
-#define MISR_CTRL_STATUS_CLEAR BIT(10)
-#define INTF_MISR_CTRL_FREE_RUN_MASK BIT(31)
void *dpu_hw_util_get_dir(void);
--
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