From f70575805708cabdedea7498aaa3f710fde4d920 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 31 Jan 2024 03:29:01 +0000
Subject: [PATCH] add lvds1024*800
---
kernel/drivers/clk/hisilicon/clkdivider-hi6220.c | 8 ++------
1 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/kernel/drivers/clk/hisilicon/clkdivider-hi6220.c b/kernel/drivers/clk/hisilicon/clkdivider-hi6220.c
index 535600f..5348baf 100644
--- a/kernel/drivers/clk/hisilicon/clkdivider-hi6220.c
+++ b/kernel/drivers/clk/hisilicon/clkdivider-hi6220.c
@@ -1,14 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* Hisilicon hi6220 SoC divider clock driver
*
* Copyright (c) 2015 Hisilicon Limited.
*
* Author: Bintian Wang <bintian.wang@huawei.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
*/
#include <linux/kernel.h>
@@ -107,7 +103,7 @@
{
struct hi6220_clk_divider *div;
struct clk *clk;
- struct clk_init_data init = {};
+ struct clk_init_data init;
struct clk_div_table *table;
u32 max_div, min_div;
int i;
--
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