From f70575805708cabdedea7498aaa3f710fde4d920 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 31 Jan 2024 03:29:01 +0000
Subject: [PATCH] add lvds1024*800

---
 kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi |  113 +++++++++++++++++++++++++++++++++++++++++---------------
 1 files changed, 82 insertions(+), 31 deletions(-)

diff --git a/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi b/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
index 92a194c..6fa4b51 100755
--- a/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
+++ b/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
@@ -137,7 +137,7 @@
 			};
 			
 			hp_en {
-				gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
+				gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3
 				gpio_function = <0>;
 			};
 			
@@ -145,6 +145,47 @@
 				gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
 				gpio_function = <0>;
 			};
+	#if 0		
+			do1 {
+				gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; 
+				gpio_function = <0>;
+			};
+			
+			do2 {
+				gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+				gpio_function = <0>;
+			};
+			
+			do3 {
+				gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
+				gpio_function = <0>;
+			};
+			
+			do4 {
+				gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
+				gpio_function = <0>;
+			};
+			
+			do5 {
+				gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>; 
+				gpio_function = <0>;
+			};
+			
+			do6 {
+				gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>; 
+				gpio_function = <0>;
+			};
+			
+			do7 {
+				gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>; 
+				gpio_function = <0>;
+			};
+			
+			di1 {
+				gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
+				gpio_function = <1>;
+			};
+	#endif
 		};
 #if 0			
 	    nk_io_init {
@@ -185,8 +226,8 @@
 				nodka-lvds = <15>;
 
 				display-timings {
-                native-mode = <&timing0>;
-                timing0: timing0 {
+                native-mode = <&timing>;
+                timing: timing {
 					clock-frequency = <72500000>;
 					hactive = <1280>;
 					vactive = <800>;
@@ -203,8 +244,8 @@
 					};
 				};
 				ports {
-					panel_in: endpoint {
-					remote-endpoint = <&edp_out>;
+					panel_in_lvds: endpoint {
+					remote-endpoint = <&lvds_out>;
 						};
 					};   
 				};
@@ -271,7 +312,7 @@
  * when dsi0 is enabled
  */
 &video_phy0 {
-	status = "disabled";
+	status = "okay";
 };
 
 &dsi0 {
@@ -296,7 +337,7 @@
  */
  
 &video_phy1 {
-	status = "okay";
+	status = "disabled";
 }; 
 &dsi1 {
 	status = "disabled";
@@ -307,11 +348,11 @@
 };
 
 &dsi1_in_vp1 {
-	status = "okay";
+	status = "disabled";
 };
 
 &dsi1_panel {
-	power-supply = <&vcc3v3_lcd1_n>;   //MIPI_3V3EN_GPIO3_A3_d_3V3
+//	power-supply = <&vcc3v3_lcd1_n>;   //MIPI_3V3EN_GPIO3_A3_d_3V3
     vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
     reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
     vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
@@ -331,20 +372,11 @@
 
 &edp {
     force-hpd;
-    status = "okay";
-    ports {
-        port@1 {
-            reg = <1>;
-            edp_out: endpoint {
-                remote-endpoint = <&panel_in>;
-            };
-        };
-    };
+	status = "disabled";
 };
 
 &edp_phy {
-  status = "okay";
-
+	status = "disabled";
 };
 
 &edp_in_vp0 {
@@ -352,18 +384,40 @@
 };
 
 &edp_in_vp1 {
-    status = "okay";
+    status = "disabled";
 
 };
 
 &route_edp {
-    status = "okay";
+    status = "disabled";
     connect = <&vp1_out_edp>;
 };
 
 &route_edp {
+	status = "disabled";
+};
+
+&lvds {
+	status = "okay";
+	ports {
+		port@1 {
+			reg = <1>;
+			lvds_out:endpoint {
+				remote-endpoint = <&panel_in_lvds>;
+			};
+		};
+	};
+};
+
+&route_lvds{
+	status = "okay";
+	connect = <&vp1_out_lvds>;
+};
+
+&lvds_in_vp1 {
 	status = "okay";
 };
+
 /*
 *  edp_end
 */
@@ -408,7 +462,7 @@
 	phy-mode = "rgmii";
 	clock_in_out = "output";
 
-	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
+	snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
 	snps,reset-active-low;
 	/* Reset time is 20ms, 100ms for rtl8211f */
 	snps,reset-delays-us = <0 20000 100000>;
@@ -428,7 +482,9 @@
 	rx_delay = <0x2f>;
 
 	phy-handle = <&rgmii_phy0>;
+	
 	status = "disabled";
+	
 };
 
 &gmac1 {
@@ -462,9 +518,7 @@
  * power-supply should switche to vcc3v3_lcd1_n
  * when mipi panel is connected to dsi1.
  */
-&gt1x {
-	power-supply = <&vcc3v3_lcd0_n>;
-};
+
 
 &i2c3 {
 	status = "okay";
@@ -483,7 +537,7 @@
 };
 
 &i2c4 {
-	status = "okay";
+	status = "disabled";
 	gc8034: gc8034@37 {
 		compatible = "galaxycore,gc8034";
 		status = "okay";
@@ -495,7 +549,6 @@
 		reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
 		pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
 		rockchip,grf = <&grf>;
-		power-domains = <&power RK3568_PD_VI>;
 		rockchip,camera-module-index = <0>;
 		rockchip,camera-module-facing = "back";
 		rockchip,camera-module-name = "RK-CMK-8M-2-v1";
@@ -529,7 +582,7 @@
 		};
 	};
 	ov5695: ov5695@36 {
-		status = "okay";
+		status = "disabled";
 		compatible = "ovti,ov5695";
 		reg = <0x36>;
 		clocks = <&cru CLK_CIF_OUT>;
@@ -672,8 +725,6 @@
 		};
 	};
 };
-
-
 
 
 

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