From ee930fffee469d076998274a2ca55e13dc1efb67 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 10 May 2024 08:50:54 +0000
Subject: [PATCH] enable tun/tap/iptables
---
u-boot/drivers/video/drm/rockchip_vop.c | 31 ++++++++++++++++++++++++++++---
1 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/u-boot/drivers/video/drm/rockchip_vop.c b/u-boot/drivers/video/drm/rockchip_vop.c
index e0ce7cf..fb90de8 100644
--- a/u-boot/drivers/video/drm/rockchip_vop.c
+++ b/u-boot/drivers/video/drm/rockchip_vop.c
@@ -97,6 +97,19 @@
return false;
}
+static bool is_rb_swap(uint32_t bus_format, uint32_t output_mode)
+{
+ /*
+ * The default component order of serial rgb3x8 formats
+ * is BGR. So it is needed to enable RB swap.
+ */
+ if (bus_format == MEDIA_BUS_FMT_SRGB888_3X8 ||
+ bus_format == MEDIA_BUS_FMT_SRGB888_DUMMY_4X8)
+ return true;
+ else
+ return false;
+}
+
static int rockchip_vop_init_gamma(struct vop *vop, struct display_state *state)
{
struct crtc_state *crtc_state = &state->crtc_state;
@@ -298,7 +311,7 @@
VOP_CTRL_SET(vop, win_channel[2], 0x56);
VOP_CTRL_SET(vop, dsp_blank, 0);
- dclk_inv = (mode->flags & DRM_MODE_FLAG_PPIXDATA) ? 0 : 1;
+ dclk_inv = (conn_state->bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) ? 1 : 0;
/* For improving signal quality, dclk need to be inverted by default on rv1106. */
if ((VOP_MAJOR(vop->version) == 2 && VOP_MINOR(vop->version) == 12))
dclk_inv = !dclk_inv;
@@ -403,8 +416,9 @@
VOP_CTRL_SET(vop, hdmi_dclk_out_en,
conn_state->output_mode == ROCKCHIP_OUT_MODE_YUV420 ? 1 : 0);
- if (is_uv_swap(conn_state->bus_format, conn_state->output_mode))
- VOP_CTRL_SET(vop, dsp_data_swap, DSP_RB_SWAP);
+ if (is_uv_swap(conn_state->bus_format, conn_state->output_mode) ||
+ is_rb_swap(conn_state->bus_format, conn_state->output_mode))
+ VOP_CTRL_SET(vop, dsp_rb_swap, 1);
else
VOP_CTRL_SET(vop, dsp_data_swap, 0);
@@ -888,6 +902,16 @@
return 0;
}
+static int rockchip_vop_mode_fixup(struct display_state *state)
+{
+ struct connector_state *conn_state = &state->conn_state;
+ struct drm_display_mode *mode = &conn_state->mode;
+
+ drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V | CRTC_STEREO_DOUBLE);
+
+ return 0;
+}
+
const struct rockchip_crtc_funcs rockchip_vop_funcs = {
.preinit = rockchip_vop_preinit,
.init = rockchip_vop_init,
@@ -899,4 +923,5 @@
.send_mcu_cmd = rockchip_vop_send_mcu_cmd,
.mode_valid = rockchip_vop_mode_valid,
.plane_check = rockchip_vop_plane_check,
+ .mode_fixup = rockchip_vop_mode_fixup,
};
--
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