From ee930fffee469d076998274a2ca55e13dc1efb67 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 10 May 2024 08:50:54 +0000
Subject: [PATCH] enable tun/tap/iptables
---
u-boot/arch/arm/dts/rk3588s.dtsi | 21 +++++++++++++++++++++
1 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/u-boot/arch/arm/dts/rk3588s.dtsi b/u-boot/arch/arm/dts/rk3588s.dtsi
index 53ccfba..ebe8761 100644
--- a/u-boot/arch/arm/dts/rk3588s.dtsi
+++ b/u-boot/arch/arm/dts/rk3588s.dtsi
@@ -44,6 +44,11 @@
spi3 = &spi3;
spi4 = &spi4;
spi5 = &sfc;
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ gpio2 = &gpio2;
+ gpio3 = &gpio3;
+ gpio4 = &gpio4;
};
cpus {
@@ -253,6 +258,8 @@
resets = <&cru SRST_A_USB3OTG0>;
reset-names = "usb3-otg";
dr_mode = "otg";
+ phys = <&u2phy0_otg>;
+ phy-names = "usb2-phy";
phy_type = "utmi_wide";
snps,dis_enblslpm_quirk;
snps,dis-u1-entry-quirk;
@@ -270,6 +277,8 @@
interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>;
clock-names = "usbhost", "arbiter";
+ phys = <&u2phy2_host>;
+ phy-names = "usb2-phy";
power-domains = <&power RK3588_PD_USB>;
status = "disabled";
};
@@ -280,6 +289,8 @@
interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>;
clock-names = "usbhost", "arbiter";
+ phys = <&u2phy2_host>;
+ phy-names = "usb2-phy";
power-domains = <&power RK3588_PD_USB>;
status = "disabled";
};
@@ -290,6 +301,8 @@
interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>;
clock-names = "usbhost", "arbiter";
+ phys = <&u2phy3_host>;
+ phy-names = "usb2-phy";
power-domains = <&power RK3588_PD_USB>;
status = "disabled";
};
@@ -300,6 +313,8 @@
interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>;
clock-names = "usbhost", "arbiter";
+ phys = <&u2phy3_host>;
+ phy-names = "usb2-phy";
power-domains = <&power RK3588_PD_USB>;
status = "disabled";
};
@@ -406,6 +421,8 @@
compatible = "rockchip,rk3588-usb2phy";
reg = <0x0 0x10>;
interrupts = <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&cru SRST_OTGPHY_U3_0>, <&cru SRST_P_USB2PHY_U3_0_GRF0>;
+ reset-names = "phy", "apb";
clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
clock-names = "phyclk";
#clock-cells = <0>;
@@ -429,6 +446,8 @@
compatible = "rockchip,rk3588-usb2phy";
reg = <0x8000 0x10>;
interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&cru SRST_OTGPHY_U2_0>, <&cru SRST_P_USB2PHY_U2_0_GRF0>;
+ reset-names = "phy", "apb";
clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
clock-names = "phyclk";
#clock-cells = <0>;
@@ -452,6 +471,8 @@
compatible = "rockchip,rk3588-usb2phy";
reg = <0xc000 0x10>;
interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&cru SRST_OTGPHY_U2_1>, <&cru SRST_P_USB2PHY_U2_1_GRF0>;
+ reset-names = "phy", "apb";
clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
clock-names = "phyclk";
#clock-cells = <0>;
--
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