From ea08eeccae9297f7aabd2ef7f0c2517ac4549acc Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Tue, 20 Feb 2024 01:18:26 +0000
Subject: [PATCH] write in 30M
---
kernel/drivers/firmware/rockchip_sip.c | 151 +++++++++++++++++++++++++++++++++++++++++++++----
1 files changed, 137 insertions(+), 14 deletions(-)
diff --git a/kernel/drivers/firmware/rockchip_sip.c b/kernel/drivers/firmware/rockchip_sip.c
index 8658fa6..e483899 100644
--- a/kernel/drivers/firmware/rockchip_sip.c
+++ b/kernel/drivers/firmware/rockchip_sip.c
@@ -262,6 +262,7 @@
return res;
}
+EXPORT_SYMBOL_GPL(sip_smc_lastlog_request);
int sip_smc_amp_config(u32 sub_func_id, u32 arg1, u32 arg2, u32 arg3)
{
@@ -271,6 +272,7 @@
0, 0, 0, &res);
return res.a0;
}
+EXPORT_SYMBOL_GPL(sip_smc_amp_config);
struct arm_smccc_res sip_smc_get_amp_info(u32 sub_func_id, u32 arg1)
{
@@ -279,8 +281,65 @@
arm_smccc_smc(RK_SIP_AMP_CFG, sub_func_id, arg1, 0, 0, 0, 0, 0, &res);
return res;
}
+EXPORT_SYMBOL_GPL(sip_smc_get_amp_info);
-EXPORT_SYMBOL_GPL(sip_smc_lastlog_request);
+struct arm_smccc_res sip_smc_get_pvtpll_info(u32 sub_func_id, u32 arg1)
+{
+ struct arm_smccc_res res;
+
+ /*
+ * res.a0: error code(0: success, !0: error).
+ * res.a1: low temp config flag(0: support, !0: don't support).
+ */
+ arm_smccc_smc(SIP_PVTPLL_CFG, sub_func_id, arg1, 0, 0, 0, 0, 0, &res);
+ return res;
+}
+EXPORT_SYMBOL_GPL(sip_smc_get_pvtpll_info);
+
+struct arm_smccc_res sip_smc_pvtpll_config(u32 sub_func_id, u32 arg1, u32 arg2,
+ u32 arg3, u32 arg4, u32 arg5, u32 arg6)
+{
+ struct arm_smccc_res res;
+
+ /*
+ * res.a0: error code(0: success, !0: error).
+ */
+ arm_smccc_smc(SIP_PVTPLL_CFG, sub_func_id, arg1, arg2, arg3, arg4, arg5,
+ arg6, &res);
+ return res;
+}
+EXPORT_SYMBOL_GPL(sip_smc_pvtpll_config);
+
+void __iomem *sip_hdcp_request_share_memory(int id)
+{
+ static void __iomem *base;
+ struct arm_smccc_res res;
+
+ if (id < 0 || id >= MAX_DEVICE) {
+ pr_err("%s: invalid device id\n", __func__);
+ return NULL;
+ }
+
+ if (!base) {
+ /* request page share memory */
+ res = sip_smc_request_share_mem(2, SHARE_PAGE_TYPE_HDCP);
+ if (IS_SIP_ERROR(res.a0))
+ return NULL;
+ base = (void __iomem *)res.a1;
+ }
+
+ return base + id * 1024;
+}
+EXPORT_SYMBOL_GPL(sip_hdcp_request_share_memory);
+
+struct arm_smccc_res sip_hdcp_config(u32 arg0, u32 arg1, u32 arg2)
+{
+ struct arm_smccc_res res;
+
+ res = __invoke_sip_fn_smc(SIP_HDCP_CONFIG, arg0, arg1, arg2);
+ return res;
+}
+EXPORT_SYMBOL_GPL(sip_hdcp_config);
/************************** fiq debugger **************************************/
/*
@@ -300,8 +359,7 @@
static int fiq_target_cpu;
static phys_addr_t ft_fiq_mem_phy;
static void __iomem *ft_fiq_mem_base;
-static void (*sip_fiq_debugger_uart_irq_tf)(struct pt_regs *_pt_regs,
- uint32_t cpu);
+static sip_fiq_debugger_uart_irq_tf_cb_t sip_fiq_debugger_uart_irq_tf;
static struct pt_regs fiq_pt_regs;
int sip_fiq_debugger_is_enabled(void)
@@ -388,7 +446,7 @@
static void sip_fiq_debugger_uart_irq_tf_cb(unsigned long sp_el1,
unsigned long offset,
- uint32_t cpu)
+ unsigned long cpu)
{
char *cpu_context;
@@ -403,9 +461,11 @@
__invoke_sip_fn_smc(SIP_UARTDBG_FN, 0, 0, UARTDBG_CFG_OSHDL_TO_OS);
}
-int sip_fiq_debugger_uart_irq_tf_init(u32 irq_id, void *callback_fn)
+int sip_fiq_debugger_uart_irq_tf_init(u32 irq_id, sip_fiq_debugger_uart_irq_tf_cb_t callback_fn)
{
struct arm_smccc_res res;
+
+ fiq_target_cpu = 0;
/* init fiq debugger callback */
sip_fiq_debugger_uart_irq_tf = callback_fn;
@@ -438,22 +498,33 @@
{
#ifdef MODULE
/* Empirically, local "cpu_logical_map()" for rockchip platforms */
- ulong mpidr = 0x00;
+ ulong mpidr = read_cpuid_mpidr();
- if (cpu < 4)
- /* 0x00, 0x01, 0x02, 0x03 */
- mpidr = cpu;
- else if (cpu < 8)
- /* 0x100, 0x101, 0x102, 0x103 */
- mpidr = 0x100 | (cpu - 4);
- else
- pr_err("Unsupported map cpu: %d\n", cpu);
+ if (mpidr & MPIDR_MT_BITMASK) {
+ /* 0x100, 0x200, 0x300, 0x400 ... */
+ mpidr = (cpu & 0xff) << 8;
+ } else {
+ if (cpu < 4)
+ /* 0x00, 0x01, 0x02, 0x03 */
+ mpidr = cpu;
+ else if (cpu < 8)
+ /* 0x100, 0x101, 0x102, 0x103 */
+ mpidr = 0x100 | (cpu - 4);
+ else
+ pr_err("Unsupported map cpu: %d\n", cpu);
+ }
return mpidr;
#else
return cpu_logical_map(cpu);
#endif
}
+
+ulong sip_cpu_logical_map_mpidr(u32 cpu)
+{
+ return cpu_logical_map_mpidr(cpu);
+}
+EXPORT_SYMBOL_GPL(sip_cpu_logical_map_mpidr);
int sip_fiq_debugger_switch_cpu(u32 cpu)
{
@@ -541,6 +612,58 @@
}
EXPORT_SYMBOL_GPL(sip_fiq_debugger_enable_fiq);
+int sip_fiq_control(u32 sub_func, u32 irq, unsigned long data)
+{
+ struct arm_smccc_res res;
+
+ res = __invoke_sip_fn_smc(RK_SIP_FIQ_CTRL,
+ sub_func, irq, data);
+ return res.a0;
+}
+EXPORT_SYMBOL_GPL(sip_fiq_control);
+
+int sip_wdt_config(u32 sub_func, u32 arg1, u32 arg2, u32 arg3)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc(SIP_WDT_CFG, sub_func, arg1, arg2, arg3,
+ 0, 0, 0, &res);
+
+ return res.a0;
+}
+EXPORT_SYMBOL_GPL(sip_wdt_config);
+
+int sip_hdmirx_config(u32 sub_func, u32 arg1, u32 arg2, u32 arg3)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc(SIP_HDMIRX_CFG, sub_func, arg1, arg2, arg3,
+ 0, 0, 0, &res);
+
+ return res.a0;
+}
+EXPORT_SYMBOL_GPL(sip_hdmirx_config);
+
+int sip_hdcpkey_init(u32 hdcp_id)
+{
+ struct arm_smccc_res res;
+
+ res = __invoke_sip_fn_smc(TRUSTED_OS_HDCPKEY_INIT, hdcp_id, 0, 0);
+
+ return res.a0;
+}
+EXPORT_SYMBOL_GPL(sip_hdcpkey_init);
+
+int sip_smc_mcu_config(unsigned long mcu_id,
+ unsigned long func,
+ unsigned long arg2)
+{
+ struct arm_smccc_res res;
+
+ res = __invoke_sip_fn_smc(SIP_MCU_CFG, mcu_id, func, arg2);
+ return res.a0;
+}
+EXPORT_SYMBOL_GPL(sip_smc_mcu_config);
/******************************************************************************/
#ifdef CONFIG_ARM
static __init int sip_firmware_init(void)
--
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