From e636c8d336489bf3eed5878299e6cc045bbad077 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Tue, 20 Feb 2024 01:17:29 +0000
Subject: [PATCH] debug lk
---
kernel/drivers/spi/spi-rockchip.c | 37 ++++++++++++++++++++++++++++++++++---
1 files changed, 34 insertions(+), 3 deletions(-)
diff --git a/kernel/drivers/spi/spi-rockchip.c b/kernel/drivers/spi/spi-rockchip.c
index d6cc6de..3249334 100644
--- a/kernel/drivers/spi/spi-rockchip.c
+++ b/kernel/drivers/spi/spi-rockchip.c
@@ -221,6 +221,7 @@
bool slave_aborted;
bool cs_inactive; /* spi slave tansmition stop when cs inactive */
bool cs_high_supported; /* native CS supports active-high polarity */
+ struct gpio_desc *ready; /* spi slave transmission ready */
struct spi_transfer *xfer; /* Store xfer temporarily */
phys_addr_t base_addr_phy;
@@ -477,8 +478,8 @@
{
u32 i;
- /* burst size: 1, 2, 4, 8 */
- for (i = 1; i < 8; i <<= 1) {
+ /* burst size: 1, 2, 4, 8, 16 */
+ for (i = 1; i < 16; i <<= 1) {
if (data_len & i)
break;
}
@@ -859,8 +860,17 @@
ret = rockchip_spi_prepare_irq(rs, ctlr, xfer);
}
+ if (rs->ready) {
+ gpiod_set_value(rs->ready, 0);
+ udelay(1);
+ gpiod_set_value(rs->ready, 1);
+ }
+
if (ret > 0)
ret = rockchip_spi_transfer_wait(ctlr, xfer);
+
+ if (rs->ready)
+ gpiod_set_value(rs->ready, 0);
return ret;
}
@@ -896,6 +906,8 @@
cr0 |= ((spi->mode & 0x3) << CR0_SCPH_OFFSET);
if (spi->mode & SPI_CS_HIGH)
cr0 |= BIT(spi->chip_select) << CR0_SOI_OFFSET;
+ if (spi_controller_is_slave(spi->controller))
+ cr0 |= CR0_OPM_SLAVE << CR0_OPM_OFFSET;
writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0);
@@ -969,6 +981,7 @@
bool slave_mode;
struct pinctrl *pinctrl = NULL;
const struct rockchip_spi_quirks *quirks_cfg;
+ u32 val;
slave_mode = of_property_read_bool(np, "spi-slave");
@@ -982,6 +995,7 @@
if (!ctlr)
return -ENOMEM;
+ ctlr->rt = device_property_read_bool(&pdev->dev, "rockchip,rt");
platform_set_drvdata(pdev, ctlr);
rs = spi_controller_get_devdata(ctlr);
@@ -1095,6 +1109,13 @@
if (quirks_cfg)
rs->max_baud_div_in_cpha = quirks_cfg->max_baud_div_in_cpha;
+ if (!device_property_read_u32(&pdev->dev, "rockchip,autosuspend-delay-ms", &val)) {
+ if (val > 0) {
+ pm_runtime_set_autosuspend_delay(&pdev->dev, val);
+ pm_runtime_use_autosuspend(&pdev->dev);
+ }
+ }
+
pm_runtime_set_active(&pdev->dev);
pm_runtime_enable(&pdev->dev);
@@ -1175,6 +1196,8 @@
rs->cs_inactive = false;
break;
}
+ if (device_property_read_bool(&pdev->dev, "rockchip,cs-inactive-disable"))
+ rs->cs_inactive = false;
pinctrl = devm_pinctrl_get(&pdev->dev);
if (!IS_ERR(pinctrl)) {
@@ -1183,6 +1206,13 @@
dev_warn(&pdev->dev, "no high_speed pinctrl state\n");
rs->high_speed_state = NULL;
}
+ }
+
+ rs->ready = devm_gpiod_get_optional(&pdev->dev, "ready", GPIOD_OUT_HIGH);
+ if (IS_ERR(rs->ready)) {
+ ret = dev_err_probe(&pdev->dev, PTR_ERR(rs->ready),
+ "invalid ready-gpios property in node\n");
+ goto err_free_dma_rx;
}
ret = devm_spi_register_controller(&pdev->dev, ctlr);
@@ -1207,7 +1237,8 @@
dev_info(&pdev->dev, "register misc device %s\n", misc_name);
}
- dev_info(rs->dev, "probed, poll=%d, rsd=%d\n", rs->poll, rs->rsd);
+ dev_info(rs->dev, "probed, poll=%d, rsd=%d, cs-inactive=%d, ready=%d\n",
+ rs->poll, rs->rsd, rs->cs_inactive, rs->ready ? 1 : 0);
return 0;
--
Gitblit v1.6.2