From e3e12f52b214121840b44c91de5b3e5af5d3eb84 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Mon, 06 Nov 2023 03:04:41 +0000
Subject: [PATCH] rk3568 rt init
---
kernel/arch/arm64/boot/dts/rockchip/rk3568-evb1-ddr4-v10.dtsi | 163 +++++++++++++++++++++++++++++++++++++++++++++++------
1 files changed, 143 insertions(+), 20 deletions(-)
diff --git a/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb1-ddr4-v10.dtsi b/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb1-ddr4-v10.dtsi
index 0cb57e9..f45ce09 100644
--- a/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb1-ddr4-v10.dtsi
+++ b/kernel/arch/arm64/boot/dts/rockchip/rk3568-evb1-ddr4-v10.dtsi
@@ -15,13 +15,6 @@
model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
- rk_headset: rk-headset {
- compatible = "rockchip_headset";
- headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&hp_det>;
- };
-
vcc2v5_sys: vcc2v5-ddr {
compatible = "regulator-fixed";
regulator-name = "vcc2v5-sys";
@@ -82,7 +75,7 @@
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
-
+#if 0
vcc_camera: vcc-camera-regulator {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
@@ -93,6 +86,106 @@
regulator-always-on;
regulator-boot-on;
};
+#endif
+
+ ndj_io_init {
+ compatible = "nk_io_control";
+ pinctrl-names = "default";
+ pinctrl-0 = <&nk_io_gpio>;
+
+ //gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
+
+ vcc_5v {
+ gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
+ gpio_function = <0>;
+ };
+
+ vcc_12v {
+ gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
+ gpio_function = <0>;
+ };
+
+ hub_host2_rst {
+ gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
+ gpio_function = <3>;
+ };
+
+ hub_host3 {
+ gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
+ gpio_function = <0>;
+ };
+
+ wake_4g {
+ gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
+ gpio_function = <0>;
+ };
+
+ air_mode_4g {
+ gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
+ gpio_function = <0>;
+ };
+
+ reset_4g {
+ gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
+ gpio_function = <3>;
+ };
+
+ en_4g {
+ gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
+ gpio_function = <0>;
+ };
+
+ hp_en {
+ gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
+ gpio_function = <0>;
+ };
+
+ wifi_power_en {
+ gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
+ gpio_function = <0>;
+ };
+ #if 0
+ do1 {
+ gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
+ gpio_function = <0>;
+ };
+
+ do2 {
+ gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+ gpio_function = <0>;
+ };
+
+ do3 {
+ gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
+ gpio_function = <0>;
+ };
+
+ do4 {
+ gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
+ gpio_function = <0>;
+ };
+
+ do5 {
+ gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
+ gpio_function = <0>;
+ };
+
+ do6 {
+ gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>;
+ gpio_function = <0>;
+ };
+
+ do7 {
+ gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
+ gpio_function = <0>;
+ };
+
+ di1 {
+ gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
+ gpio_function = <1>;
+ };
+ #endif
+};
};
&combphy0_us {
@@ -108,11 +201,11 @@
};
&csi2_dphy_hw {
- status = "okay";
+ status = "disabled";
};
&csi2_dphy0 {
- status = "okay";
+ status = "disabled";
ports {
#address-cells = <1>;
@@ -156,7 +249,7 @@
* when dsi0 is enabled
*/
&dsi0 {
- status = "okay";
+ status = "disabled";
};
&dsi0_in_vp0 {
@@ -164,7 +257,7 @@
};
&dsi0_in_vp1 {
- status = "okay";
+ status = "disabled";
};
&dsi0_panel {
@@ -232,14 +325,14 @@
rx_delay = <0x2f>;
phy-handle = <&rgmii_phy0>;
- status = "okay";
+ status = "disabled";
};
&gmac1 {
phy-mode = "rgmii";
clock_in_out = "output";
- snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
+ snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
@@ -271,7 +364,7 @@
};
&i2c4 {
- status = "okay";
+ status = "disabled";
gc8034: gc8034@37 {
compatible = "galaxycore,gc8034";
status = "okay";
@@ -317,7 +410,7 @@
};
};
ov5695: ov5695@36 {
- status = "okay";
+ status = "disabled";
compatible = "ovti,ov5695";
reg = <0x36>;
clocks = <&cru CLK_CIF_OUT>;
@@ -355,7 +448,7 @@
};
&video_phy0 {
- status = "okay";
+ status = "disabled";
};
&video_phy1 {
@@ -397,14 +490,44 @@
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ nk_io_init{
+ nk_io_gpio: nk-io-gpio{
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
+ <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
+ <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
+ <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
+ <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
+ <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
+ <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
+ <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
+ <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
+ <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
+ <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&rk809_sound {
+ hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
};
&rkisp {
- status = "okay";
+ status = "disabled";
};
&rkisp_mmu {
- status = "okay";
+ status = "disabled";
};
&rkisp_vir0 {
@@ -422,7 +545,7 @@
};
&route_dsi0 {
- status = "okay";
+ status = "disabled";
connect = <&vp1_out_dsi0>;
};
--
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