From d2ccde1c8e90d38cee87a1b0309ad2827f3fd30d Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Mon, 11 Dec 2023 02:45:28 +0000
Subject: [PATCH] add boot partition size
---
kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/bcmsdstd.h | 56 +++++++++++++++++++++++++++++---------------------------
1 files changed, 29 insertions(+), 27 deletions(-)
diff --git a/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/bcmsdstd.h b/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/bcmsdstd.h
index c8c73e7..ef09691 100644
--- a/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/bcmsdstd.h
+++ b/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/bcmsdstd.h
@@ -1,15 +1,16 @@
-/* SPDX-License-Identifier: GPL-2.0 */
/*
* 'Standard' SDIO HOST CONTROLLER driver
*
- * Copyright (C) 1999-2019, Broadcom Corporation
- *
+ * Portions of this code are copyright (c) 2022 Cypress Semiconductor Corporation
+ *
+ * Copyright (C) 1999-2017, Broadcom Corporation
+ *
* Unless you and Broadcom execute a separate written software license
* agreement governing use of this software, this software is licensed to you
* under the terms of the GNU General Public License version 2 (the "GPL"),
* available at http://www.broadcom.com/licenses/GPLv2.php, with the
* following added to such license:
- *
+ *
* As a special exception, the copyright holders of this software give you
* permission to link this software with independent modules, and to copy and
* distribute the resulting executable under terms of your choice, provided that
@@ -17,7 +18,7 @@
* the license of that module. An independent module is a module which is not
* derived from this software. The special exception does not apply to any
* modifications of the software.
- *
+ *
* Notwithstanding the above, under no circumstances may you combine this
* software in any way with any other Broadcom software provided under a license
* other than the GPL, without Broadcom's express prior written consent.
@@ -25,7 +26,7 @@
*
* <<Broadcom-WL-IPTag/Open:>>
*
- * $Id: bcmsdstd.h 514727 2014-11-12 03:02:48Z $
+ * $Id: bcmsdstd.h 663318 2016-10-04 19:02:16Z $
*/
#ifndef _BCM_SD_STD_H
#define _BCM_SD_STD_H
@@ -82,9 +83,13 @@
#define SDIOH_CMD7_EXP_STATUS 0x00001E00
#define RETRIES_LARGE 100000
+#ifdef BCMQT
+extern void sdstd_os_yield(sdioh_info_t *sd);
+#define RETRIES_SMALL 10000
+#else
#define sdstd_os_yield(sd) do {} while (0)
#define RETRIES_SMALL 100
-
+#endif // endif
#define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */
#define USE_MULTIBLOCK 0x4
@@ -94,7 +99,6 @@
#define CLIENT_INTR 0x100 /* Get rid of this! */
#define HC_INTR_RETUNING 0x1000
-
#ifdef BCMSDIOH_TXGLOM
/* Total glom pkt can not exceed 64K
@@ -108,16 +112,16 @@
ulong dma_phys_arr[SDIOH_MAXGLOM_SIZE]; /* DMA_MAPed address of frames */
uint16 nbytes[SDIOH_MAXGLOM_SIZE]; /* Size of each frame */
} glom_buf_t;
-#endif
+#endif // endif
struct sdioh_info {
- uint cfg_bar; /* pci cfg address for bar */
- uint32 caps; /* cached value of capabilities reg */
- uint32 curr_caps; /* max current capabilities reg */
+ uint cfg_bar; /* pci cfg address for bar */
+ uint32 caps; /* cached value of capabilities reg */
+ uint32 curr_caps; /* max current capabilities reg */
- osl_t *osh; /* osh handler */
- volatile char *mem_space; /* pci device memory va */
- uint lockcount; /* nest count of sdstd_lock() calls */
+ osl_t *osh; /* osh handler */
+ volatile char *mem_space; /* pci device memory va */
+ uint lockcount; /* nest count of sdstd_lock() calls */
bool client_intr_enabled; /* interrupt connnected flag */
bool intr_handler_valid; /* client driver interrupt handler valid */
sdioh_cb_fn_t intr_handler; /* registered interrupt handler */
@@ -163,12 +167,12 @@
ulong adma2_dscr_start_phys;
uint alloced_adma2_dscr_size;
- int r_cnt; /* rx count */
- int t_cnt; /* tx_count */
+ int r_cnt; /* rx count */
+ int t_cnt; /* tx_count */
bool got_hcint; /* local interrupt flag */
uint16 last_intrstatus; /* to cache intrstatus */
- int host_UHSISupported; /* whether UHSI is supported for HC. */
- int card_UHSI_voltage_Supported; /* whether UHSI is supported for
+ int host_UHSISupported; /* whether UHSI is supported for HC. */
+ int card_UHSI_voltage_Supported; /* whether UHSI is supported for
* Card in terms of Voltage [1.8 or 3.3].
*/
int global_UHSI_Supp; /* type of UHSI support in both host and card.
@@ -176,14 +180,15 @@
* HOST_SDR_12_25: SDR12 and SDR25 supported
* HOST_SDR_50_104_DDR: one of SDR50/SDR104 or DDR50 supptd
*/
- volatile int sd3_dat_state; /* data transfer state used for retuning check */
- volatile int sd3_tun_state; /* tuning state used for retuning check */
- bool sd3_tuning_reqd; /* tuning requirement parameter */
+ volatile int sd3_dat_state; /* data transfer state used for retuning check */
+ volatile int sd3_tun_state; /* tuning state used for retuning check */
+ bool sd3_tuning_reqd; /* tuning requirement parameter */
+ bool sd3_tuning_disable; /* tuning disable due to bus sleeping */
uint32 caps3; /* cached value of 32 MSbits capabilities reg (SDIO 3.0) */
#ifdef BCMSDIOH_TXGLOM
glom_buf_t glom_info; /* pkt information used for glomming */
uint txglom_mode; /* Txglom mode: 0 - copy, 1 - multi-descriptor */
-#endif
+#endif // endif
};
#define DMA_MODE_NONE 0
@@ -207,12 +212,10 @@
#define CHECK_TUNING_PRE_DATA 1
#define CHECK_TUNING_POST_DATA 2
-
#ifdef DHD_DEBUG
#define SD_DHD_DISABLE_PERIODIC_TUNING 0x01
#define SD_DHD_ENABLE_PERIODIC_TUNING 0x00
-#endif
-
+#endif // endif
/************************************************************
* Internal interfaces: per-port references into bcmsdstd.c
@@ -234,7 +237,6 @@
/* Wait for specified interrupt and error bits to be set */
extern void sdstd_spinbits(sdioh_info_t *sd, uint16 norm, uint16 err);
-
/**************************************************************
* Internal interfaces: bcmsdstd.c references to per-port code
--
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