From cf4ce59b3b70238352c7f1729f0f7223214828ad Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 20 Sep 2024 01:46:19 +0000
Subject: [PATCH] rtl88x2CE_WiFi_linux add concurrent mode
---
kernel/include/drm/bridge/dw_hdmi.h | 149 ++++++++++++++++++++++++++++++++++++++++++++-----
1 files changed, 132 insertions(+), 17 deletions(-)
diff --git a/kernel/include/drm/bridge/dw_hdmi.h b/kernel/include/drm/bridge/dw_hdmi.h
index bd59595..aca7ae8 100644
--- a/kernel/include/drm/bridge/dw_hdmi.h
+++ b/kernel/include/drm/bridge/dw_hdmi.h
@@ -1,19 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2011 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
*/
#ifndef __DW_HDMI__
#define __DW_HDMI__
-#include <drm/drmP.h>
+#include <drm/drm_property.h>
+#include <drm/drm_crtc.h>
#include <sound/hdmi-codec.h>
+#include <media/cec.h>
+struct drm_display_info;
+struct drm_display_mode;
+struct drm_encoder;
struct dw_hdmi;
+struct dw_hdmi_qp;
+struct platform_device;
/**
* DOC: Supported input formats and encodings
@@ -76,6 +79,8 @@
* +----------------------+----------------------------------+------------------------------+
*/
+#define SUPPORT_HDMI_ALLM BIT(1)
+
enum {
DW_HDMI_RES_8,
DW_HDMI_RES_10,
@@ -91,6 +96,13 @@
DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY = 0xf2,
DW_HDMI_PHY_DWC_HDMI20_TX_PHY = 0xf3,
DW_HDMI_PHY_VENDOR_PHY = 0xfe,
+};
+
+struct dw_hdmi_audio_frl_n {
+ unsigned int r_bit;
+ unsigned int n_32k;
+ unsigned int n_44k1;
+ unsigned int n_48k;
};
struct dw_hdmi_audio_tmds_n {
@@ -120,9 +132,20 @@
u16 vlev_ctr; /* voltage level control */
};
+struct dw_hdmi_link_config {
+ bool dsc_mode;
+ bool frl_mode;
+ int frl_lanes;
+ int rate_per_lane;
+ int hcactive;
+ u8 add_func;
+ u8 pps_payload[128];
+};
+
struct dw_hdmi_phy_ops {
int (*init)(struct dw_hdmi *hdmi, void *data,
- struct drm_display_mode *mode);
+ const struct drm_display_info *display,
+ const struct drm_display_mode *mode);
void (*disable)(struct dw_hdmi *hdmi, void *data);
enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data);
void (*update_hpd)(struct dw_hdmi *hdmi, void *data,
@@ -130,10 +153,23 @@
void (*setup_hpd)(struct dw_hdmi *hdmi, void *data);
};
+struct dw_hdmi_qp_phy_ops {
+ int (*init)(struct dw_hdmi_qp *hdmi, void *data,
+ struct drm_display_mode *mode);
+ void (*disable)(struct dw_hdmi_qp *hdmi, void *data);
+ enum drm_connector_status (*read_hpd)(struct dw_hdmi_qp *hdmi,
+ void *data);
+ void (*update_hpd)(struct dw_hdmi_qp *hdmi, void *data,
+ bool force, bool disabled, bool rxsense);
+ void (*setup_hpd)(struct dw_hdmi_qp *hdmi, void *data);
+ void (*set_mode)(struct dw_hdmi_qp *dw_hdmi, void *data,
+ u32 mode_mask, bool enable);
+};
+
struct dw_hdmi_property_ops {
void (*attach_properties)(struct drm_connector *connector,
unsigned int color, int version,
- void *data);
+ void *data, bool allm_en);
void (*destroy_properties)(struct drm_connector *connector,
void *data);
int (*set_property)(struct drm_connector *connector,
@@ -150,26 +186,48 @@
struct dw_hdmi_plat_data {
struct regmap *regm;
- enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
- const struct drm_display_mode *mode);
+
unsigned long input_bus_format;
unsigned long input_bus_encoding;
+ unsigned int max_tmdsclk;
+ int id;
+ bool use_drm_infoframe;
bool ycbcr_420_allowed;
+ bool unsupported_yuv_input;
+ bool unsupported_deep_color;
+ bool is_hdmi_qp;
+
+ /*
+ * Private data passed to all the .mode_valid() and .configure_phy()
+ * callback functions.
+ */
+ void *priv_data;
+
+ /* Platform-specific mode validation (optional). */
+ enum drm_mode_status (*mode_valid)(struct dw_hdmi *hdmi, void *data,
+ const struct drm_display_info *info,
+ const struct drm_display_mode *mode);
/* Vendor PHY support */
const struct dw_hdmi_phy_ops *phy_ops;
+ const struct dw_hdmi_qp_phy_ops *qp_phy_ops;
const char *phy_name;
void *phy_data;
unsigned int phy_force_vendor;
- const struct dw_hdmi_audio_tmds_n *tmds_n_table;
+ const struct dw_hdmi_audio_tmds_n *tmds_n_table;
+
+ /* split mode */
+ bool split_mode;
+ bool first_screen;
+ struct dw_hdmi_qp *left;
+ struct dw_hdmi_qp *right;
/* Synopsys PHY support */
const struct dw_hdmi_mpll_config *mpll_cfg;
const struct dw_hdmi_mpll_config *mpll_cfg_420;
const struct dw_hdmi_curr_ctrl *cur_ctr;
const struct dw_hdmi_phy_config *phy_config;
- int (*configure_phy)(struct dw_hdmi *hdmi,
- const struct dw_hdmi_plat_data *pdata,
+ int (*configure_phy)(struct dw_hdmi *hdmi, void *data,
unsigned long mpixelclock);
unsigned long (*get_input_bus_format)(void *data);
@@ -180,15 +238,36 @@
struct drm_property *(*get_hdr_property)(void *data);
struct drm_property_blob *(*get_hdr_blob)(void *data);
bool (*get_color_changed)(void *data);
+ int (*get_yuv422_format)(struct drm_connector *connector,
+ struct edid *edid);
+ int (*get_edid_dsc_info)(void *data, struct edid *edid);
+ int (*get_next_hdr_data)(void *data, struct edid *edid,
+ struct drm_connector *connector);
+ struct dw_hdmi_link_config *(*get_link_cfg)(void *data);
+ void (*set_hdcp_status)(void *data, u8 status);
+ void (*set_hdcp2_enable)(void *data, bool enable);
+ void (*set_grf_cfg)(void *data);
+ u64 (*get_grf_color_fmt)(void *data);
+ void (*convert_to_split_mode)(struct drm_display_mode *mode);
+ void (*convert_to_origin_mode)(struct drm_display_mode *mode);
+ int (*dclk_set)(void *data, bool enable, int vp_id);
+ int (*link_clk_set)(void *data, bool enable);
+ int (*get_vp_id)(struct drm_crtc_state *crtc_state);
void (*update_color_format)(struct drm_connector_state *conn_state, void *data);
bool (*check_hdr_color_change)(struct drm_connector_state *conn_state, void *data);
void (*set_prev_bus_format)(void *data, unsigned long bus_format);
+ int (*get_colorimetry)(void *data, struct edid *edid);
void (*set_ddc_io)(void *data, bool enable);
- int (*dclk_set)(void *data, bool enable, int vp_id);
+ void (*set_hdcp14_mem)(void *data, bool enable);
/* Vendor Property support */
const struct dw_hdmi_property_ops *property_ops;
struct drm_connector *connector;
+ struct drm_bridge *bridge;
+};
+
+struct dw_hdmi_cec_wake_ops {
+ void (*hpd_wake_up)(struct platform_device *pdev);
};
struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
@@ -198,17 +277,22 @@
struct dw_hdmi *dw_hdmi_bind(struct platform_device *pdev,
struct drm_encoder *encoder,
struct dw_hdmi_plat_data *plat_data);
-void dw_hdmi_suspend(struct device *dev, struct dw_hdmi *hdmi);
-void dw_hdmi_resume(struct device *dev, struct dw_hdmi *hdmi);
+
+void dw_hdmi_suspend(struct dw_hdmi *hdmi);
+void dw_hdmi_resume(struct dw_hdmi *hdmi);
void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense);
int dw_hdmi_set_plugged_cb(struct dw_hdmi *hdmi, hdmi_codec_plugged_cb fn,
struct device *codec_dev);
void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate);
+void dw_hdmi_set_channel_count(struct dw_hdmi *hdmi, unsigned int cnt);
+void dw_hdmi_set_channel_status(struct dw_hdmi *hdmi, u8 *channel_status);
+void dw_hdmi_set_channel_allocation(struct dw_hdmi *hdmi, unsigned int ca);
void dw_hdmi_audio_enable(struct dw_hdmi *hdmi);
void dw_hdmi_audio_disable(struct dw_hdmi *hdmi);
-void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi);
+void dw_hdmi_set_high_tmds_clock_ratio(struct dw_hdmi *hdmi,
+ const struct drm_display_info *display);
/* PHY configuration */
void dw_hdmi_phy_i2c_set_addr(struct dw_hdmi *hdmi, u8 address);
@@ -228,6 +312,37 @@
void dw_hdmi_set_output_type(struct dw_hdmi *hdmi, u64 val);
bool dw_hdmi_get_output_whether_hdmi(struct dw_hdmi *hdmi);
int dw_hdmi_get_output_type_cap(struct dw_hdmi *hdmi);
+void dw_hdmi_set_cec_adap(struct dw_hdmi *hdmi, struct cec_adapter *adap);
+void dw_hdmi_qp_set_allm_enable(struct dw_hdmi_qp *hdmi_qp, bool enable);
+
+void dw_hdmi_qp_unbind(struct dw_hdmi_qp *hdmi);
+struct dw_hdmi_qp *dw_hdmi_qp_bind(struct platform_device *pdev,
+ struct drm_encoder *encoder,
+ struct dw_hdmi_plat_data *plat_data);
+void dw_hdmi_qp_suspend(struct device *dev, struct dw_hdmi_qp *hdmi);
+void dw_hdmi_qp_resume(struct device *dev, struct dw_hdmi_qp *hdmi);
+void dw_hdmi_qp_cec_set_hpd(struct dw_hdmi_qp *hdmi, bool plug_in, bool change);
+void dw_hdmi_qp_set_cec_adap(struct dw_hdmi_qp *hdmi, struct cec_adapter *adap);
+int dw_hdmi_qp_set_earc(struct dw_hdmi_qp *hdmi);
+void dw_hdmi_qp_set_sample_rate(struct dw_hdmi_qp *hdmi, unsigned int rate);
+void dw_hdmi_qp_set_channel_count(struct dw_hdmi_qp *hdmi, unsigned int cnt);
+void dw_hdmi_qp_set_channel_status(struct dw_hdmi_qp *hdmi, u8 *channel_status,
+ bool ref2stream);
+void dw_hdmi_qp_set_channel_allocation(struct dw_hdmi_qp *hdmi, unsigned int ca);
+void dw_hdmi_qp_set_audio_interface(struct dw_hdmi_qp *hdmi,
+ struct hdmi_codec_daifmt *fmt,
+ struct hdmi_codec_params *hparms);
+void dw_hdmi_qp_set_audio_infoframe(struct dw_hdmi_qp *hdmi,
+ struct hdmi_codec_params *hparms);
+void dw_hdmi_qp_audio_enable(struct dw_hdmi_qp *hdmi);
+void dw_hdmi_qp_audio_disable(struct dw_hdmi_qp *hdmi);
+int dw_hdmi_qp_set_plugged_cb(struct dw_hdmi_qp *hdmi, hdmi_codec_plugged_cb fn,
+ struct device *codec_dev);
+void dw_hdmi_qp_set_output_type(struct dw_hdmi_qp *hdmi, u64 val);
+bool dw_hdmi_qp_get_output_whether_hdmi(struct dw_hdmi_qp *hdmi);
+int dw_hdmi_qp_get_output_type_cap(struct dw_hdmi_qp *hdmi);
void dw_hdmi_set_hpd_wake(struct dw_hdmi *hdmi);
+void dw_hdmi_cec_wake_ops_register(struct dw_hdmi *hdmi,
+ const struct dw_hdmi_cec_wake_ops *cec_ops);
#endif /* __IMX_HDMI_H__ */
--
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