From a5969cabbb4660eab42b6ef0412cbbd1200cf14d Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Sat, 12 Oct 2024 07:10:09 +0000
Subject: [PATCH] 修改led为gpio
---
kernel/arch/arm64/boot/dts/rockchip/rk3328.dtsi | 685 +++++++++++++++++++++++++++++++-------------------------
1 files changed, 376 insertions(+), 309 deletions(-)
diff --git a/kernel/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/kernel/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 61199e7..7dcf177 100644
--- a/kernel/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/kernel/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -8,10 +8,10 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/soc/rockchip-system-status.h>
-#include <dt-bindings/suspend/rockchip-rk3328.h>
#include <dt-bindings/power/rk3328-power.h>
#include <dt-bindings/soc/rockchip,boot-mode.h>
+#include <dt-bindings/soc/rockchip-system-status.h>
+#include <dt-bindings/suspend/rockchip-rk3328.h>
#include <dt-bindings/thermal/thermal.h>
#include "rk3328-dram-default-timing.dtsi"
@@ -25,6 +25,10 @@
aliases {
ethernet0 = &gmac2io;
ethernet1 = &gmac2phy;
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ gpio2 = &gpio2;
+ gpio3 = &gpio3;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@@ -40,10 +44,11 @@
cpu0: cpu@0 {
device_type = "cpu";
- compatible = "arm,cortex-a53", "arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
clocks = <&cru ARMCLK>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_SLEEP>;
dynamic-power-coefficient = <120>;
enable-method = "psci";
next-level-cache = <&l2>;
@@ -52,10 +57,11 @@
cpu1: cpu@1 {
device_type = "cpu";
- compatible = "arm,cortex-a53", "arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
clocks = <&cru ARMCLK>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_SLEEP>;
dynamic-power-coefficient = <120>;
enable-method = "psci";
next-level-cache = <&l2>;
@@ -64,10 +70,11 @@
cpu2: cpu@2 {
device_type = "cpu";
- compatible = "arm,cortex-a53", "arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x2>;
clocks = <&cru ARMCLK>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_SLEEP>;
dynamic-power-coefficient = <120>;
enable-method = "psci";
next-level-cache = <&l2>;
@@ -76,14 +83,28 @@
cpu3: cpu@3 {
device_type = "cpu";
- compatible = "arm,cortex-a53", "arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x3>;
clocks = <&cru ARMCLK>;
#cooling-cells = <2>;
+ cpu-idle-states = <&CPU_SLEEP>;
dynamic-power-coefficient = <120>;
enable-method = "psci";
next-level-cache = <&l2>;
operating-points-v2 = <&cpu0_opp_table>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ CPU_SLEEP: cpu-sleep {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x0010000>;
+ entry-latency-us = <120>;
+ exit-latency-us = <250>;
+ min-residency-us = <900>;
+ };
};
l2: l2-cache0 {
@@ -149,21 +170,101 @@
};
};
- amba {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ dmc: dmc {
+ compatible = "rockchip,rk3328-dmc";
+ devfreq-events = <&dfi>;
+ clocks = <&cru SCLK_DDRCLK>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <&dmc_opp_table>;
+ ddr_timing = <&ddr_timing>;
+ upthreshold = <40>;
+ downdifferential = <20>;
+ system-status-freq = <
+ /*system status freq(KHz)*/
+ SYS_STATUS_NORMAL 786000
+ SYS_STATUS_REBOOT 786000
+ SYS_STATUS_SUSPEND 786000
+ SYS_STATUS_VIDEO_1080P 786000
+ SYS_STATUS_VIDEO_4K 786000
+ SYS_STATUS_VIDEO_4K_10B 924000
+ SYS_STATUS_PERFORMANCE 924000
+ SYS_STATUS_BOOST 924000
+ >;
+ auto-min-freq = <786000>;
+ auto-freq-en = <0>;
+ #cooling-cells = <2>;
+ status = "disabled";
+ };
- dmac: dmac@ff1f0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xff1f0000 0x0 0x4000>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_DMAC>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- arm,pl330-periph-burst;
+ dmc_opp_table: dmc-opp-table {
+ compatible = "operating-points-v2";
+ rockchip,leakage-voltage-sel = <
+ 1 10 0
+ 11 254 1
+ >;
+ nvmem-cells = <&logic_leakage>;
+ nvmem-cell-names = "ddr_leakage";
+
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <950000>;
+ opp-microvolt-L0 = <950000>;
+ opp-microvolt-L1 = <950000>;
+ status = "disabled";
+ };
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <1025000>;
+ opp-microvolt-L0 = <1025000>;
+ opp-microvolt-L1 = <1000000>;
+ status = "disabled";
+ };
+ opp-786000000 {
+ opp-hz = /bits/ 64 <786000000>;
+ opp-microvolt = <1075000>;
+ opp-microvolt-L0 = <1075000>;
+ opp-microvolt-L1 = <1050000>;
+ };
+ opp-798000000 {
+ opp-hz = /bits/ 64 <798000000>;
+ opp-microvolt = <1075000>;
+ opp-microvolt-L0 = <1075000>;
+ opp-microvolt-L1 = <1050000>;
+ };
+ opp-840000000 {
+ opp-hz = /bits/ 64 <840000000>;
+ opp-microvolt = <1075000>;
+ opp-microvolt-L0 = <1075000>;
+ opp-microvolt-L1 = <1050000>;
+ };
+ opp-924000000 {
+ opp-hz = /bits/ 64 <924000000>;
+ opp-microvolt = <1125000>;
+ opp-microvolt-L0 = <1125000>;
+ opp-microvolt-L1 = <1100000>;
+ };
+ /* 1056M is only for ddr4 */
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1175000>;
+ opp-microvolt-L0 = <1175000>;
+ opp-microvolt-L1 = <1150000>;
+ status = "disabled";
+ };
+ };
+
+ analog_sound: analog-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "rockchip,rk3328";
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&codec>;
};
};
@@ -182,10 +283,38 @@
nvmem-cell-names = "id", "cpu-version";
};
+ display_subsystem: display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <&vop_out>;
+ status = "disabled";
+ };
+
firmware {
- optee: optee {
+ optee {
compatible = "linaro,optee-tz";
method = "smc";
+ };
+ };
+
+ gmac_clkin: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0>;
+ };
+
+ hdmi_sound: hdmi-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <128>;
+ simple-audio-card,name = "rockchip,hdmi";
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s0>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
};
};
@@ -196,18 +325,34 @@
rockchip_suspend: rockchip-suspend {
compatible = "rockchip,pm-rk3328";
- status = "disabled";
rockchip,sleep-mode-config = <0>;
rockchip,virtual-poweroff = <0>;
+ status = "disabled";
};
rockchip_system_monitor: rockchip-system-monitor {
compatible = "rockchip,system-monitor";
-
rockchip,thermal-zone = "soc-thermal";
rockchip,polling-delay = <200>; /* milliseconds */
-
rockchip,video-4k-offline-cpus = "3";
+ };
+
+ spdif_out: spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+ };
+
+ spdif_sound: spdif-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "rockchip,spdif";
+
+ simple-audio-card,cpu {
+ sound-dai = <&spdif>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&spdif_out>;
+ };
};
timer {
@@ -225,6 +370,13 @@
clock-output-names = "xin24m";
};
+ xin32k: xin32k {
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "xin32k";
+ #clock-cells = <0>;
+ };
+
i2s0: i2s@ff000000 {
compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s";
reg = <0x0 0xff000000 0x0 0x1000>;
@@ -235,6 +387,7 @@
dma-names = "tx", "rx";
resets = <&cru SRST_I2S0>, <&cru SRST_I2S0_H>;
reset-names = "reset-m", "reset-h";
+ #sound-dai-cells = <0>;
status = "disabled";
};
@@ -248,6 +401,7 @@
dma-names = "tx", "rx";
resets = <&cru SRST_I2S1>, <&cru SRST_I2S1_H>;
reset-names = "reset-m", "reset-h";
+ #sound-dai-cells = <0>;
status = "disabled";
};
@@ -269,6 +423,7 @@
&i2s2m0_sdo
&i2s2m0_sdi>;
pinctrl-1 = <&i2s2m0_sleep>;
+ #sound-dai-cells = <0>;
status = "disabled";
};
@@ -281,12 +436,13 @@
dmas = <&dmac 10>;
dma-names = "tx";
pinctrl-names = "default";
- pinctrl-0 = <&spdifm2_tx>;
+ pinctrl-0 = <&spdifm0_tx>;
+ #sound-dai-cells = <0>;
status = "disabled";
};
pdm: pdm@ff040000 {
- compatible = "rockchip,rk3328-pdm";
+ compatible = "rockchip,pdm";
reg = <0x0 0xff040000 0x0 0x1000>;
clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>;
clock-names = "pdm_clk", "pdm_hclk";
@@ -294,11 +450,13 @@
dma-names = "rx";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pdmm0_clk
+ &pdmm0_fsync
&pdmm0_sdi0
&pdmm0_sdi1
&pdmm0_sdi2
&pdmm0_sdi3>;
pinctrl-1 = <&pdmm0_clk_sleep
+ &pdmm0_fsync_sleep
&pdmm0_sdi0_sleep
&pdmm0_sdi1_sleep
&pdmm0_sdi2_sleep
@@ -344,12 +502,16 @@
grf: syscon@ff100000 {
compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
reg = <0x0 0xff100000 0x0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
io_domains: io-domains {
compatible = "rockchip,rk3328-io-voltage-domain";
status = "disabled";
+ };
+
+ grf_gpio: grf-gpio {
+ compatible = "rockchip,rk3328-grf-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
};
power: power-controller {
@@ -359,10 +521,10 @@
#size-cells = <0>;
status = "okay";
- pd_hevc@RK3328_PD_HEVC {
+ power-domain@RK3328_PD_HEVC {
reg = <RK3328_PD_HEVC>;
};
- pd_video@RK3328_PD_VIDEO {
+ power-domain@RK3328_PD_VIDEO {
reg = <RK3328_PD_VIDEO>;
clocks = <&cru ACLK_RKVDEC>,
<&cru HCLK_RKVDEC>,
@@ -370,7 +532,7 @@
<&cru SCLK_VDEC_CORE>;
pm_qos = <&qos_rkvdec_r>, <&qos_rkvdec_w>;
};
- pd_vpu@RK3328_PD_VPU {
+ power-domain@RK3328_PD_VPU {
reg = <RK3328_PD_VPU>;
clocks = <&cru ACLK_VPU>,
<&cru HCLK_VPU>;
@@ -381,12 +543,65 @@
reboot_mode: reboot-mode {
compatible = "syscon-reboot-mode";
offset = <0x5c8>;
+ mode-bootloader = <BOOT_BL_DOWNLOAD>;
+ mode-charge = <BOOT_CHARGING>;
+ mode-fastboot = <BOOT_FASTBOOT>;
+ mode-loader = <BOOT_BL_DOWNLOAD>;
mode-normal = <BOOT_NORMAL>;
mode-recovery = <BOOT_RECOVERY>;
- mode-bootloader = <BOOT_FASTBOOT>;
- mode-loader = <BOOT_BL_DOWNLOAD>;
+ mode-ums = <BOOT_UMS>;
};
+ };
+ thermal-zones {
+ soc_thermal: soc-thermal {
+ polling-delay-passive = <20>; /* milliseconds */
+ polling-delay = <1000>; /* milliseconds */
+ sustainable-power = <1000>; /* milliwatts */
+
+ thermal-sensors = <&tsadc 0>;
+
+ trips {
+ threshold: trip-point-0 {
+ temperature = <70000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "passive";
+ };
+ target: trip-point-1 {
+ temperature = <85000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "passive";
+ };
+ soc_crit: soc-crit {
+ temperature = <115000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&target>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <4096>;
+ };
+ map1 {
+ trip = <&target>;
+ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <4096>;
+ };
+ map2 {
+ trip = <&target>;
+ cooling-device = <&rkvdec THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <1024>;
+ };
+ map3 {
+ trip = <&target>;
+ cooling-device = <&dmc THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <1024>;
+ };
+ };
+ };
};
uart0: serial@ff110000 {
@@ -432,6 +647,11 @@
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
+ };
+
+ pmu: power-management@ff140000 {
+ compatible = "rockchip,rk3328-pmu", "syscon", "simple-mfd";
+ reg = <0x0 0xff140000 0x0 0x1000>;
};
i2c0: i2c@ff150000 {
@@ -506,11 +726,13 @@
reg = <0x0 0xff1a0000 0x0 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_BUS_PRE>;
+ status = "disabled";
};
pwm0: pwm@ff1b0000 {
compatible = "rockchip,rk3328-pwm";
reg = <0x0 0xff1b0000 0x0 0x10>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "active";
@@ -522,6 +744,7 @@
pwm1: pwm@ff1b0010 {
compatible = "rockchip,rk3328-pwm";
reg = <0x0 0xff1b0010 0x0 0x10>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "active";
@@ -533,6 +756,7 @@
pwm2: pwm@ff1b0020 {
compatible = "rockchip,rk3328-pwm";
reg = <0x0 0xff1b0020 0x0 0x10>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "active";
@@ -553,56 +777,15 @@
status = "disabled";
};
- thermal-zones {
- soc_thermal: soc-thermal {
- polling-delay-passive = <20>;
- polling-delay = <1000>;
- sustainable-power = <1000>;
-
- thermal-sensors = <&tsadc 0>;
-
- trips {
- threshold: trip-point0 {
- temperature = <70000>;
- hysteresis = <2000>;
- type = "passive";
- };
- target: trip-point1 {
- temperature = <85000>;
- hysteresis = <2000>;
- type = "passive";
- };
- soc_crit: soc-crit {
- temperature = <115000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&target>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- contribution = <4096>;
- };
- map1 {
- trip = <&target>;
- cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- contribution = <4096>;
- };
- map2 {
- trip = <&target>;
- cooling-device = <&rkvdec THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- contribution = <1024>;
- };
- map3 {
- trip = <&target>;
- cooling-device = <&dmc THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- contribution = <1024>;
- };
- };
- };
-
+ dmac: dma-controller@ff1f0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x0 0xff1f0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ arm,pl330-periph-burst;
+ clocks = <&cru ACLK_DMAC>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
};
tsadc: tsadc@ff250000 {
@@ -614,12 +797,12 @@
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
clock-names = "tsadc", "apb_pclk";
pinctrl-names = "gpio", "otpout";
- pinctrl-0 = <&otp_gpio>;
+ pinctrl-0 = <&otp_pin>;
pinctrl-1 = <&otp_out>;
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
rockchip,grf = <&grf>;
- rockchip,hw-tshut-temp = <120000>;
+ rockchip,hw-tshut-temp = <100000>;
#thermal-sensor-cells = <1>;
status = "disabled";
};
@@ -664,7 +847,6 @@
gpu: gpu@ff300000 {
compatible = "arm,mali-450";
reg = <0x0 0xff300000 0x0 0x30000>;
-
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
@@ -683,6 +865,7 @@
clock-names = "clk_mali";
#cooling-cells = <2>; /* min followed by max */
operating-points-v2 = <&gpu_opp_table>;
+ resets = <&cru SRST_GPU_A>;
status = "disabled";
gpu_power_model: power_model {
@@ -738,37 +921,8 @@
rockchip,resetgroup-count = <4>;
rockchip,grf = <&grf>;
rockchip,grf-offset = <0x040c>;
- rockchip,grf-values = <0x8000000>, <0x8000800>;
- rockchip,grf-names = "grf_vepu2", "grf_vepu22";
- status = "disabled";
- };
-
- vepu22: vepu22@ff330000 {
- compatible = "rockchip,hevc-encoder-v22";
- reg = <0x0 0xff330000 0 0x200>;
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru ACLK_H265>, <&cru PCLK_H265>,
- <&cru SCLK_VENC_CORE>, <&cru SCLK_VENC_DSP>,
- <&cru ACLK_RKVENC>, <&cru ACLK_AXISRAM>;
- clock-names = "aclk_h265", "pclk_h265", "clk_core",
- "clk_dsp", "aclk_venc", "aclk_axi2sram";
- iommus = <&vepu22_mmu>;
- rockchip,srv = <&mpp_srv>;
- rockchip,taskqueue-node = <2>;
- rockchip,resetgroup-node = <2>;
- power-domains = <&power RK3328_PD_HEVC>;
- status = "disabled";
- };
-
- vepu22_mmu: iommu@ff330200 {
- compatible = "rockchip,iommu";
- reg = <0x0 0xff330200 0 0x100>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "vepu22_mmu";
- clocks = <&cru ACLK_H265>, <&cru PCLK_H265>;
- clock-names = "aclk", "iface";
- power-domains = <&power RK3328_PD_HEVC>;
- #iommu-cells = <0>;
+ rockchip,grf-values = <0x8000000>;
+ rockchip,grf-names = "grf_vepu2";
status = "disabled";
};
@@ -779,7 +933,7 @@
clocks = <&cru ACLK_H264>, <&cru HCLK_H264>;
clock-names = "aclk_vcodec", "hclk_vcodec";
resets = <&cru SRST_RKVENC_H264_A>,
- <&cru SRST_RKVENC_H264_H>;
+ <&cru SRST_RKVENC_H264_H>;
reset-names = "video_a", "video_h";
iommus = <&vepu_mmu>;
rockchip,srv = <&mpp_srv>;
@@ -823,10 +977,10 @@
reg = <0x0 0xff350800 0x0 0x40>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vpu_mmu";
- clock-names = "aclk", "iface";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
- power-domains = <&power RK3328_PD_VPU>;
+ clock-names = "aclk", "iface";
#iommu-cells = <0>;
+ power-domains = <&power RK3328_PD_VPU>;
status = "disabled";
};
@@ -848,7 +1002,7 @@
};
rkvdec: rkvdec@ff36000 {
- compatible = "rockchip,rkv-decoder-rk3328";
+ compatible = "rockchip,rkv-decoder-rk3328", "rockchip,rkv-decoder-v2";
reg = <0x0 0xff360000 0x0 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_dec";
@@ -920,8 +1074,8 @@
interrupt-names = "rkvdec_mmu";
clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
clock-names = "aclk", "iface";
- power-domains = <&power RK3328_PD_VIDEO>;
#iommu-cells = <0>;
+ power-domains = <&power RK3328_PD_VIDEO>;
status = "disabled";
};
@@ -953,6 +1107,32 @@
};
};
+ tve: tve@ff373e00 {
+ compatible = "rockchip,rk3328-tve";
+ reg = <0x0 0xff373e00 0x0 0x100>,
+ <0x0 0xff420000 0x0 0x10000>;
+ rockchip,saturation = <0x00376749>;
+ rockchip,brightcontrast = <0x0000a305>;
+ rockchip,adjtiming = <0xb6c00880>;
+ rockchip,lumafilter0 = <0x01ff0000>;
+ rockchip,lumafilter1 = <0xf40200fe>;
+ rockchip,lumafilter2 = <0xf332d70c>;
+ rockchip,daclevel = <0x22>;
+ rockchip,dac1level = <0x7>;
+ status = "disabled";
+
+ ports {
+ tve_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ tve_in_vop: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vop_out_tve>;
+ };
+ };
+ };
+ };
+
vop_mmu: iommu@ff373f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xff373f00 0x0 0x100>;
@@ -961,6 +1141,17 @@
clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
clock-names = "aclk", "iface";
#iommu-cells = <0>;
+ status = "disabled";
+ };
+
+ cif: cif@ff380000 {
+ compatible = "rockchip,cif", "rockchip,rk3328-cif";
+ reg = <0x0 0xff380000 0x0 0x400>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>;
+ clock-names = "aclk_cif", "hclk_cif";
+ resets = <&cru SRST_CIF_A>, <&cru SRST_CIF_H>, <&cru SRST_CIF_P>;
+ reset-names = "rst_cif_a", "rst_cif_h", "rst_cif_p";
status = "disabled";
};
@@ -994,7 +1185,7 @@
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "iep_mmu";
clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
- clock-names = "aclk", "iface";
+ clock-names = "aclk", "hclk";
power-domains = <&power RK3328_PD_VIDEO>;
#iommu-cells = <0>;
status = "disabled";
@@ -1008,23 +1199,21 @@
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_HDMI>,
<&cru SCLK_HDMI_SFC>,
- <&cru SCLK_RTC32K>,
- <&cru HCLK_VIO>;
+ <&cru SCLK_RTC32K>;
clock-names = "iahb",
"isfr",
- "cec",
- "hclk_vio";
+ "cec";
phys = <&hdmiphy>;
phy-names = "hdmi";
- pinctrl-names = "default", "gpio";
+ pinctrl-names = "default", "pin";
pinctrl-0 = <&hdmi_cec &hdmii2c_xfer &hdmi_hpd>;
- pinctrl-1 = <&i2c3_gpio>;
+ pinctrl-1 = <&i2c3_pins>;
resets = <&cru SRST_HDMI_P>,
<&cru SRST_HDMIPHY>;
reset-names = "hdmi",
"hdmiphy";
rockchip,grf = <&grf>;
- max-tmdsclk = <371250>;
+ #sound-dai-cells = <0>;
status = "disabled";
ports {
@@ -1039,56 +1228,27 @@
};
};
- tve: tve@ff373e00 {
- compatible = "rockchip,rk3328-tve";
- reg = <0x0 0xff373e00 0x0 0x100>,
- <0x0 0xff420000 0x0 0x10000>;
- rockchip,saturation = <0x00376749>;
- rockchip,brightcontrast = <0x0000a305>;
- rockchip,adjtiming = <0xb6c00880>;
- rockchip,lumafilter0 = <0x01ff0000>;
- rockchip,lumafilter1 = <0xf40200fe>;
- rockchip,lumafilter2 = <0xf332d70c>;
- rockchip,daclevel = <0x22>;
- rockchip,dac1level = <0x7>;
- status = "disabled";
-
- ports {
- tve_in: port {
- #address-cells = <1>;
- #size-cells = <0>;
- tve_in_vop: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&vop_out_tve>;
- };
- };
- };
- };
-
- display_subsystem: display-subsystem {
- compatible = "rockchip,display-subsystem";
- ports = <&vop_out>;
- status = "disabled";
- };
-
codec: codec@ff410000 {
compatible = "rockchip,rk3328-codec";
reg = <0x0 0xff410000 0x0 0x1000>;
- rockchip,grf = <&grf>;
- clocks = <&cru PCLK_ACODEC>, <&cru SCLK_I2S1>;
+ clocks = <&cru PCLK_ACODECPHY>, <&cru SCLK_I2S1>;
clock-names = "pclk", "mclk";
+ rockchip,grf = <&grf>;
+ #sound-dai-cells = <0>;
status = "disabled";
};
- hdmiphy: hdmiphy@ff430000 {
+ hdmiphy: phy@ff430000 {
compatible = "rockchip,rk3328-hdmi-phy";
reg = <0x0 0xff430000 0x0 0x10000>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
- #phy-cells = <0>;
- clocks = <&cru PCLK_HDMIPHY>, <&xin24m>;
- clock-names = "sysclk", "refclk";
- #clock-cells = <0>;
+ clocks = <&cru PCLK_HDMIPHY>, <&xin24m>, <&cru DCLK_HDMIPHY>;
+ clock-names = "sysclk", "refclk", "refpclk";
clock-output-names = "hdmi_phy";
+ #clock-cells = <0>;
+ nvmem-cells = <&efuse_cpu_version>;
+ nvmem-cell-names = "cpu-version";
+ #phy-cells = <0>;
status = "disabled";
};
@@ -1109,7 +1269,8 @@
<&cru SCLK_RTC32K>, <&cru SCLK_UART0>,
<&cru SCLK_UART1>, <&cru SCLK_UART2>,
<&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
- <&cru ACLK_RGA_PRE>, <&cru ACLK_RKVDEC_PRE>,
+ <&cru ACLK_VIO_PRE>, <&cru ACLK_RGA_PRE>,
+ <&cru ACLK_VOP_PRE>, <&cru ACLK_RKVDEC_PRE>,
<&cru ACLK_RKVENC>, <&cru ACLK_VPU_PRE>,
<&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>,
<&cru SCLK_VENC_CORE>, <&cru SCLK_VENC_DSP>,
@@ -1119,8 +1280,7 @@
<&cru ACLK_BUS_PRE>, <&cru HCLK_BUS_PRE>,
<&cru PCLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
<&cru HCLK_PERI>, <&cru PCLK_PERI>,
- <&cru SCLK_RTC32K>, <&cru ACLK_VOP>,
- <&cru ACLK_GMAC>;
+ <&cru SCLK_RTC32K>;
assigned-clock-parents =
<&cru HDMIPHY>, <&cru PLL_APLL>,
<&cru PLL_GPLL>, <&xin24m>,
@@ -1131,6 +1291,7 @@
<24000000>, <24000000>,
<15000000>, <15000000>,
<100000000>, <100000000>,
+ <100000000>, <100000000>,
<50000000>, <100000000>,
<100000000>, <100000000>,
<50000000>, <50000000>,
@@ -1140,8 +1301,7 @@
<150000000>, <75000000>,
<75000000>, <150000000>,
<75000000>, <75000000>,
- <32768>, <400000000>,
- <180000000>;
+ <32768>;
};
usb2phy_grf: syscon@ff450000 {
@@ -1222,7 +1382,7 @@
};
};
- sdmmc: dwmmc@ff500000 {
+ sdmmc: mmc@ff500000 {
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff500000 0x0 0x4000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
@@ -1234,7 +1394,7 @@
status = "disabled";
};
- sdio: dwmmc@ff510000 {
+ sdio: mmc@ff510000 {
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff510000 0x0 0x4000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
@@ -1246,7 +1406,7 @@
status = "disabled";
};
- emmc: dwmmc@ff520000 {
+ emmc: mmc@ff520000 {
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff520000 0x0 0x4000>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
@@ -1274,6 +1434,7 @@
resets = <&cru SRST_GMAC2IO_A>;
reset-names = "stmmaceth";
rockchip,grf = <&grf>;
+ snps,txpbl = <0x4>;
status = "disabled";
};
@@ -1302,7 +1463,7 @@
#address-cells = <1>;
#size-cells = <0>;
- phy: phy@0 {
+ phy: ethernet-phy@0 {
compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22";
reg = <0>;
clocks = <&cru SCLK_MAC2PHY_OUT>;
@@ -1319,13 +1480,12 @@
"snps,dwc2";
reg = <0x0 0xff580000 0x0 0x40000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_OTG>;
- clock-names = "otg";
+ clocks = <&cru HCLK_OTG>, <&cru HCLK_OTG_PMU>;
+ clock-names = "otg", "otg_pmu";
dr_mode = "otg";
g-np-tx-fifo-size = <16>;
g-rx-fifo-size = <280>;
g-tx-fifo-size = <256 128 128 64 32 16>;
- g-use-dma;
phys = <&u2phy_otg>;
phy-names = "usb2-phy";
status = "disabled";
@@ -1335,8 +1495,9 @@
compatible = "generic-ehci";
reg = <0x0 0xff5c0000 0x0 0x10000>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_HOST0>, <&u2phy>;
- clock-names = "usbhost", "utmi";
+ clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
+ <&u2phy>;
+ clock-names = "usbhost", "arbiter", "utmi";
phys = <&u2phy_host>;
phy-names = "usb";
status = "disabled";
@@ -1346,27 +1507,28 @@
compatible = "generic-ohci";
reg = <0x0 0xff5d0000 0x0 0x10000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cru HCLK_HOST0>, <&u2phy>;
- clock-names = "usbhost", "utmi";
+ clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
+ <&u2phy>;
+ clock-names = "usbhost", "arbiter", "utmi";
phys = <&u2phy_host>;
phy-names = "usb";
status = "disabled";
};
- sdmmc_ext: dwmmc@ff5f0000 {
+ sdmmc_ext: mmc@ff5f0000 {
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff5f0000 0x0 0x4000>;
clock-freq-min-max = <400000 150000000>;
clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>,
<&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
- usbdrd3: usb@ff600000 {
- compatible = "rockchip,rk3328-dwc3";
+ usbdrd3: usbdrd {
+ compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
<&cru ACLK_USB3OTG>;
clock-names = "ref_clk", "suspend_clk",
@@ -1384,13 +1546,14 @@
phys = <&u3phy_utmi>, <&u3phy_pipe>;
phy-names = "usb2-phy", "usb3-phy";
phy_type = "utmi_wide";
+ snps,dis-del-phy-power-chg-quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
snps,dis-u2-freeclk-exists-quirk;
snps,dis_u2_susphy_quirk;
- snps,dis-u3-autosuspend-quirk;
snps,dis_u3_susphy_quirk;
- snps,dis-del-phy-power-chg-quirk;
- snps,tx-ipgap-linecheck-dis-quirk;
+ snps,parkmode-disable-hs-quirk;
+ snps,parkmode-disable-ss-quirk;
status = "disabled";
};
};
@@ -1411,102 +1574,10 @@
};
dfi: dfi@ff790000 {
- reg = <0x00 0xff790000 0x00 0x400>;
compatible = "rockchip,rk3328-dfi";
+ reg = <0x00 0xff790000 0x00 0x400>;
rockchip,grf = <&grf>;
status = "disabled";
- };
-
- dmc: dmc {
- compatible = "rockchip,rk3328-dmc";
- devfreq-events = <&dfi>;
- clocks = <&cru SCLK_DDRCLK>;
- clock-names = "dmc_clk";
- operating-points-v2 = <&dmc_opp_table>;
- ddr_timing = <&ddr_timing>;
- upthreshold = <40>;
- downdifferential = <20>;
- system-status-freq = <
- /*system status freq(KHz)*/
- SYS_STATUS_NORMAL 786000
- SYS_STATUS_REBOOT 786000
- SYS_STATUS_SUSPEND 786000
- SYS_STATUS_VIDEO_1080P 786000
- SYS_STATUS_VIDEO_4K 786000
- SYS_STATUS_VIDEO_4K_10B 933000
- SYS_STATUS_PERFORMANCE 933000
- SYS_STATUS_BOOST 933000
- >;
- auto-min-freq = <786000>;
- auto-freq-en = <0>;
- #cooling-cells = <2>;
- status = "disabled";
-
- ddr_power_model: ddr_power_model {
- compatible = "ddr_power_model";
- dynamic-power-coefficient = <120>;
- static-power-coefficient = <200>;
- ts = <32000 4700 (-80) 2>;
- thermal-zone = "soc-thermal";
- };
- };
-
- dmc_opp_table: dmc-opp-table {
- compatible = "operating-points-v2";
-
- rockchip,leakage-voltage-sel = <
- 1 10 0
- 11 254 1
- >;
- nvmem-cells = <&logic_leakage>;
- nvmem-cell-names = "ddr_leakage";
-
- opp-400000000 {
- opp-hz = /bits/ 64 <400000000>;
- opp-microvolt = <950000>;
- opp-microvolt-L0 = <950000>;
- opp-microvolt-L1 = <950000>;
- status = "disabled";
- };
- opp-600000000 {
- opp-hz = /bits/ 64 <600000000>;
- opp-microvolt = <1025000>;
- opp-microvolt-L0 = <1025000>;
- opp-microvolt-L1 = <1000000>;
- status = "disabled";
- };
- opp-786000000 {
- opp-hz = /bits/ 64 <786000000>;
- opp-microvolt = <1075000>;
- opp-microvolt-L0 = <1075000>;
- opp-microvolt-L1 = <1050000>;
- };
- opp-800000000 {
- opp-hz = /bits/ 64 <800000000>;
- opp-microvolt = <1075000>;
- opp-microvolt-L0 = <1075000>;
- opp-microvolt-L1 = <1050000>;
- };
- opp-850000000 {
- opp-hz = /bits/ 64 <850000000>;
- opp-microvolt = <1075000>;
- opp-microvolt-L0 = <1075000>;
- opp-microvolt-L1 = <1050000>;
- };
- opp-933000000 {
- opp-hz = /bits/ 64 <933000000>;
- opp-microvolt = <1125000>;
- opp-microvolt-L0 = <1125000>;
- opp-microvolt-L1 = <1100000>;
- };
- /* 1066M is only for ddr4 */
- opp-1066000000 {
- opp-hz = /bits/ 64 <1066000000>;
- opp-microvolt = <1175000>;
- opp-microvolt-L0 = <1175000>;
- opp-microvolt-L1 = <1150000>;
- status = "disabled";
- };
};
gic: interrupt-controller@ff811000 {
@@ -1529,7 +1600,7 @@
#size-cells = <2>;
ranges;
- gpio0: gpio0@ff210000 {
+ gpio0: gpio@ff210000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff210000 0x0 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
@@ -1542,7 +1613,7 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@ff220000 {
+ gpio1: gpio@ff220000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff220000 0x0 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
@@ -1555,7 +1626,7 @@
#interrupt-cells = <2>;
};
- gpio2: gpio2@ff230000 {
+ gpio2: gpio@ff230000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff230000 0x0 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
@@ -1568,7 +1639,7 @@
#interrupt-cells = <2>;
};
- gpio3: gpio3@ff240000 {
+ gpio3: gpio@ff240000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff240000 0x0 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
@@ -1681,7 +1752,7 @@
rockchip,pins = <0 RK_PA5 2 &pcfg_pull_none>,
<0 RK_PA6 2 &pcfg_pull_none>;
};
- i2c3_gpio: i2c3-gpio {
+ i2c3_pins: i2c3-pins {
rockchip,pins =
<0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>,
<0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -1791,7 +1862,7 @@
};
tsadc {
- otp_gpio: otp-gpio {
+ otp_pin: otp-pin {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
@@ -1814,7 +1885,7 @@
rockchip,pins = <1 RK_PB2 1 &pcfg_pull_none>;
};
- uart0_rts_gpio: uart0-rts-gpio {
+ uart0_rts_pin: uart0-rts-pin {
rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@@ -1833,7 +1904,7 @@
rockchip,pins = <3 RK_PA5 4 &pcfg_pull_none>;
};
- uart1_rts_gpio: uart1-rts-gpio {
+ uart1_rts_pin: uart1-rts-pin {
rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@@ -2059,7 +2130,7 @@
rockchip,pins = <2 RK_PA7 1 &pcfg_pull_up_4ma>;
};
- sdmmc0m0_gpio: sdmmc0m0-gpio {
+ sdmmc0m0_pin: sdmmc0m0-pin {
rockchip,pins = <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
};
};
@@ -2069,7 +2140,7 @@
rockchip,pins = <0 RK_PD6 3 &pcfg_pull_up_4ma>;
};
- sdmmc0m1_gpio: sdmmc0m1-gpio {
+ sdmmc0m1_pin: sdmmc0m1-pin {
rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
};
};
@@ -2102,7 +2173,7 @@
<1 RK_PA3 1 &pcfg_pull_up_8ma>;
};
- sdmmc0_gpio: sdmmc0-gpio {
+ sdmmc0_pins: sdmmc0-pins {
rockchip,pins =
<1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
@@ -2144,7 +2215,7 @@
<3 RK_PA7 3 &pcfg_pull_up_4ma>;
};
- sdmmc0ext_gpio: sdmmc0ext-gpio {
+ sdmmc0ext_pins: sdmmc0ext-pins {
rockchip,pins =
<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
<3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
@@ -2189,7 +2260,7 @@
<1 RK_PC1 1 &pcfg_pull_up_8ma>;
};
- sdmmc1_gpio: sdmmc1-gpio {
+ sdmmc1_pins: sdmmc1-pins {
rockchip,pins =
<1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
@@ -2249,10 +2320,8 @@
pwm0_pin: pwm0-pin {
rockchip,pins = <2 RK_PA4 1 &pcfg_pull_none>;
};
-
pwm0_pin_pull_up: pwm0-pin-pull-up {
- rockchip,pins =
- <2 RK_PA4 1 &pcfg_pull_up>;
+ rockchip,pins = <2 RK_PA4 1 &pcfg_pull_up>;
};
};
@@ -2260,10 +2329,8 @@
pwm1_pin: pwm1-pin {
rockchip,pins = <2 RK_PA5 1 &pcfg_pull_none>;
};
-
pwm1_pin_pull_up: pwm1-pin-pull-up {
- rockchip,pins =
- <2 RK_PA5 1 &pcfg_pull_up>;
+ rockchip,pins = <2 RK_PA5 1 &pcfg_pull_up>;
};
};
@@ -2368,12 +2435,12 @@
};
gmac2phy {
- fephyled_speed100: fephyled-speed100 {
- rockchip,pins = <0 RK_PD7 1 &pcfg_pull_none>;
- };
-
fephyled_speed10: fephyled-speed10 {
rockchip,pins = <0 RK_PD6 1 &pcfg_pull_none>;
+ };
+
+ fephyled_speed100: fephyled-speed100 {
+ rockchip,pins = <0 RK_PD7 1 &pcfg_pull_none>;
};
fephyled_duplex: fephyled-duplex {
@@ -2409,7 +2476,7 @@
tsadc_int: tsadc-int {
rockchip,pins = <2 RK_PB5 2 &pcfg_pull_none>;
};
- tsadc_gpio: tsadc-gpio {
+ tsadc_pin: tsadc-pin {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
--
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