From a5969cabbb4660eab42b6ef0412cbbd1200cf14d Mon Sep 17 00:00:00 2001 From: hc <hc@nodka.com> Date: Sat, 12 Oct 2024 07:10:09 +0000 Subject: [PATCH] 修改led为gpio --- kernel/arch/arm/mm/proc-arm1026.S | 15 +++++---------- 1 files changed, 5 insertions(+), 10 deletions(-) diff --git a/kernel/arch/arm/mm/proc-arm1026.S b/kernel/arch/arm/mm/proc-arm1026.S index 0b37b2c..7fdd1a2 100644 --- a/kernel/arch/arm/mm/proc-arm1026.S +++ b/kernel/arch/arm/mm/proc-arm1026.S @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * linux/arch/arm/mm/proc-arm1026.S: MMU functions for ARM1026EJ-S * @@ -5,22 +6,16 @@ * Copyright (C) 2000 Deep Blue Solutions Ltd. * hacked for non-paged-MM by Hyok S. Choi, 2003. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * * These are the low level assembler for performing cache and TLB * functions on the ARM1026EJ-S. */ #include <linux/linkage.h> #include <linux/init.h> +#include <linux/pgtable.h> #include <asm/assembler.h> #include <asm/asm-offsets.h> #include <asm/hwcap.h> #include <asm/pgtable-hwdef.h> -#include <asm/pgtable.h> #include <asm/ptrace.h> #include "proc-macros.S" @@ -143,7 +138,7 @@ mov ip, #0 __flush_whole_cache: #ifndef CONFIG_CPU_DCACHE_DISABLE -1: mrc p15, 0, r15, c7, c14, 3 @ test, clean, invalidate +1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test, clean, invalidate bne 1b #endif tst r2, #VM_EXEC @@ -368,7 +363,7 @@ #ifdef CONFIG_MMU mov r1, #0 #ifndef CONFIG_CPU_DCACHE_DISABLE -1: mrc p15, 0, r15, c7, c14, 3 @ test, clean, invalidate +1: mrc p15, 0, APSR_nzcv, c7, c14, 3 @ test, clean, invalidate bne 1b #endif #ifndef CONFIG_CPU_ICACHE_DISABLE @@ -442,7 +437,7 @@ string cpu_arm1026_name, "ARM1026EJ-S" .align - .section ".proc.info.init", #alloc + .section ".proc.info.init", "a" .type __arm1026_proc_info,#object __arm1026_proc_info: -- Gitblit v1.6.2