From a36159eec6ca17402b0e146b86efaf76568dc353 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 20 Sep 2024 01:41:23 +0000
Subject: [PATCH] 重命名 AX88772C_eeprom/asix.c 为 asix_mac.c
---
kernel/arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 541 ++++++++++++++++++++++++++++++++++-------------------
1 files changed, 344 insertions(+), 197 deletions(-)
diff --git a/kernel/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/kernel/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 1b8f19e..2e4bb7e 100644
--- a/kernel/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/kernel/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -2,7 +2,7 @@
/*
* Device Tree Source for the Draak board
*
- * Copyright (C) 2016 Renesas Electronics Corp.
+ * Copyright (C) 2016-2018 Renesas Electronics Corp.
* Copyright (C) 2017 Glider bvba
*/
@@ -19,9 +19,109 @@
ethernet0 = &avb;
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 50000>;
+
+ brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
+ default-brightness-level = <10>;
+
+ power-supply = <®_12p0v>;
+ enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
+ };
+
chosen {
- bootargs = "ignore_loglevel";
+ bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
+ };
+
+ composite-in {
+ compatible = "composite-video-connector";
+
+ port {
+ composite_con_in: endpoint {
+ remote-endpoint = <&adv7180_in>;
+ };
+ };
+ };
+
+ hdmi-in {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&adv7612_in>;
+ };
+ };
+ };
+
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_out: endpoint {
+ remote-endpoint = <&adv7511_out>;
+ };
+ };
+ };
+
+ lvds-decoder {
+ compatible = "thine,thc63lvd1024";
+ vcc-supply = <®_3p3v>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ thc63lvd1024_in: endpoint {
+ remote-endpoint = <&lvds0_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ thc63lvd1024_out: endpoint {
+ remote-endpoint = <&adv7511_in>;
+ };
+ };
+ };
+ };
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x18000000>;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_12p0v: regulator-12p0v {
+ compatible = "regulator-fixed";
+ regulator-name = "D12.0V";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-boot-on;
+ regulator-always-on;
};
vga {
@@ -56,51 +156,6 @@
};
};
- composite-in {
- compatible = "composite-video-connector";
-
- port {
- composite_con_in: endpoint {
- remote-endpoint = <&adv7180_in>;
- };
- };
- };
-
- hdmi-in {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&adv7612_in>;
- };
- };
- };
-
- memory@48000000 {
- device_type = "memory";
- /* first 128MB is reserved for secure area. */
- reg = <0x0 0x48000000 0x0 0x18000000>;
- };
-
- reg_1p8v: regulator0 {
- compatible = "regulator-fixed";
- regulator-name = "fixed-1.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- reg_3p3v: regulator1 {
- compatible = "regulator-fixed";
- regulator-name = "fixed-3.3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
x12_clk: x12 {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -108,16 +163,244 @@
};
};
+&avb {
+ pinctrl-0 = <&avb0_pins>;
+ pinctrl-names = "default";
+ renesas,no-ether-link;
+ phy-handle = <&phy0>;
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ rxc-skew-ps = <1500>;
+ reg = <0>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
+ /*
+ * TX clock internal delay mode is required for reliable
+ * 1Gbps communication using the KSZ9031RNX phy present on
+ * the Draak board, however, TX clock internal delay mode
+ * isn't supported on r8a77995. Thus, limit speed to
+ * 100Mbps for reliable communication.
+ */
+ max-speed = <100>;
+ };
+};
+
+&can0 {
+ pinctrl-0 = <&can0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&can1 {
+ pinctrl-0 = <&can1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&du {
+ pinctrl-0 = <&du_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&x12_clk>;
+ clock-names = "du.0", "du.1", "dclkin.0";
+
+ ports {
+ port@0 {
+ endpoint {
+ remote-endpoint = <&adv7123_in>;
+ };
+ };
+ };
+};
+
+&ehci0 {
+ dr_mode = "host";
+ status = "okay";
+};
+
&extal_clk {
clock-frequency = <48000000>;
};
+&hsusb {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ composite-in@20 {
+ compatible = "adi,adv7180cp";
+ reg = <0x20>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ adv7180_in: endpoint {
+ remote-endpoint = <&composite_con_in>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ /*
+ * The VIN4 video input path is shared between
+ * CVBS and HDMI inputs through SW[49-53]
+ * switches.
+ *
+ * CVBS is the default selection, link it to
+ * VIN4 here.
+ */
+ adv7180_out: endpoint {
+ remote-endpoint = <&vin4_in>;
+ };
+ };
+ };
+
+ };
+
+ hdmi-encoder@39 {
+ compatible = "adi,adv7511w";
+ reg = <0x39>, <0x3f>, <0x3c>, <0x38>;
+ reg-names = "main", "edid", "cec", "packet";
+ interrupt-parent = <&gpio1>;
+ interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
+
+ adi,input-depth = <8>;
+ adi,input-colorspace = "rgb";
+ adi,input-clock = "1x";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ adv7511_in: endpoint {
+ remote-endpoint = <&thc63lvd1024_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ adv7511_out: endpoint {
+ remote-endpoint = <&hdmi_con_out>;
+ };
+ };
+ };
+ };
+
+ hdmi-decoder@4c {
+ compatible = "adi,adv7612";
+ reg = <0x4c>;
+ default-input = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ adv7612_in: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ /*
+ * The VIN4 video input path is shared between
+ * CVBS and HDMI inputs through SW[49-53]
+ * switches.
+ *
+ * CVBS is the default selection, leave HDMI
+ * not connected here.
+ */
+ adv7612_out: endpoint {
+ pclk-sample = <0>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ };
+ };
+ };
+ };
+
+ eeprom@50 {
+ compatible = "rohm,br24t01", "atmel,24c01";
+ reg = <0x50>;
+ pagesize = <8>;
+ };
+};
+
+&i2c1 {
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&lvds0 {
+ status = "okay";
+
+ clocks = <&cpg CPG_MOD 727>,
+ <&x12_clk>,
+ <&extal_clk>;
+ clock-names = "fck", "dclkin.0", "extal";
+
+ ports {
+ port@1 {
+ lvds0_out: endpoint {
+ remote-endpoint = <&thc63lvd1024_in>;
+ };
+ };
+ };
+};
+
+&lvds1 {
+ /*
+ * Even though the LVDS1 output is not connected, the encoder must be
+ * enabled to supply a pixel clock to the DU for the DPAD output when
+ * LVDS0 is in use.
+ */
+ status = "okay";
+
+ clocks = <&cpg CPG_MOD 727>,
+ <&x12_clk>,
+ <&extal_clk>;
+ clock-names = "fck", "dclkin.0", "extal";
+};
+
+&ohci0 {
+ dr_mode = "host";
+ status = "okay";
+};
+
&pfc {
avb0_pins: avb {
- mux {
- groups = "avb0_link", "avb0_mdio", "avb0_mii";
- function = "avb0";
- };
+ groups = "avb0_link", "avb0_mdio", "avb0_mii";
+ function = "avb0";
+ };
+
+ can0_pins: can0 {
+ groups = "can0_data_a";
+ function = "can0";
+ };
+
+ can1_pins: can1 {
+ groups = "can1_data_a";
+ function = "can1";
};
du_pins: du {
@@ -173,136 +456,23 @@
};
};
-&i2c0 {
- pinctrl-0 = <&i2c0_pins>;
+&pwm0 {
+ pinctrl-0 = <&pwm0_pins>;
pinctrl-names = "default";
+
status = "okay";
-
- eeprom@50 {
- compatible = "rohm,br24t01", "atmel,24c01";
- reg = <0x50>;
- pagesize = <8>;
- };
-
- composite-in@20 {
- compatible = "adi,adv7180cp";
- reg = <0x20>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- adv7180_in: endpoint {
- remote-endpoint = <&composite_con_in>;
- };
- };
-
- port@3 {
- reg = <3>;
-
- /*
- * The VIN4 video input path is shared between
- * CVBS and HDMI inputs through SW[49-53]
- * switches.
- *
- * CVBS is the default selection, link it to
- * VIN4 here.
- */
- adv7180_out: endpoint {
- remote-endpoint = <&vin4_in>;
- };
- };
- };
-
- };
-
- hdmi-decoder@4c {
- compatible = "adi,adv7612";
- reg = <0x4c>;
- default-input = <0>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- adv7612_in: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
- };
-
- port@2 {
- reg = <2>;
-
- /*
- * The VIN4 video input path is shared between
- * CVBS and HDMI inputs through SW[49-53]
- * switches.
- *
- * CVBS is the default selection, leave HDMI
- * not connected here.
- */
- adv7612_out: endpoint {
- pclk-sample = <0>;
- hsync-active = <0>;
- vsync-active = <0>;
- };
- };
- };
- };
};
-&i2c1 {
- pinctrl-0 = <&i2c1_pins>;
+&pwm1 {
+ pinctrl-0 = <&pwm1_pins>;
pinctrl-names = "default";
+
status = "okay";
};
-&du {
- pinctrl-0 = <&du_pins>;
- pinctrl-names = "default";
+&rwdt {
+ timeout-sec = <60>;
status = "okay";
-
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>,
- <&x12_clk>;
- clock-names = "du.0", "du.1", "dclkin.0";
-
- ports {
- port@0 {
- endpoint {
- remote-endpoint = <&adv7123_in>;
- };
- };
- };
-};
-
-&ehci0 {
- status = "okay";
-};
-
-&ohci0 {
- status = "okay";
-};
-
-&avb {
- pinctrl-0 = <&avb0_pins>;
- pinctrl-names = "default";
- renesas,no-ether-link;
- phy-handle = <&phy0>;
- phy-mode = "rgmii-txid";
- status = "okay";
-
- phy0: ethernet-phy@0 {
- rxc-skew-ps = <1500>;
- reg = <0>;
- interrupt-parent = <&gpio5>;
- interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
- };
};
&scif2 {
@@ -330,25 +500,7 @@
pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default";
- status = "okay";
-};
-
-&pwm0 {
- pinctrl-0 = <&pwm0_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-&pwm1 {
- pinctrl-0 = <&pwm1_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-&rwdt {
- timeout-sec = <60>;
+ renesas,no-otg-pins;
status = "okay";
};
@@ -359,12 +511,7 @@
status = "okay";
ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
+ port {
vin4_in: endpoint {
remote-endpoint = <&adv7180_out>;
};
--
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