From 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Mon, 13 May 2024 10:30:14 +0000
Subject: [PATCH] modify sin led gpio
---
kernel/drivers/gpu/drm/nouveau/nv84_fence.c | 68 ++++++++++++++++++++--------------
1 files changed, 40 insertions(+), 28 deletions(-)
diff --git a/kernel/drivers/gpu/drm/nouveau/nv84_fence.c b/kernel/drivers/gpu/drm/nouveau/nv84_fence.c
index e721bb2..7c9c928 100644
--- a/kernel/drivers/gpu/drm/nouveau/nv84_fence.c
+++ b/kernel/drivers/gpu/drm/nouveau/nv84_fence.c
@@ -21,7 +21,6 @@
*
* Authors: Ben Skeggs
*/
-
#include "nouveau_drv.h"
#include "nouveau_dma.h"
#include "nouveau_fence.h"
@@ -29,20 +28,29 @@
#include "nv50_display.h"
+#include <nvif/push206e.h>
+
+#include <nvhw/class/cl826f.h>
+
static int
nv84_fence_emit32(struct nouveau_channel *chan, u64 virtual, u32 sequence)
{
- int ret = RING_SPACE(chan, 8);
+ struct nvif_push *push = chan->chan.push;
+ int ret = PUSH_WAIT(push, 8);
if (ret == 0) {
- BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);
- OUT_RING (chan, chan->vram.handle);
- BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 5);
- OUT_RING (chan, upper_32_bits(virtual));
- OUT_RING (chan, lower_32_bits(virtual));
- OUT_RING (chan, sequence);
- OUT_RING (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG);
- OUT_RING (chan, 0x00000000);
- FIRE_RING (chan);
+ PUSH_MTHD(push, NV826F, SET_CONTEXT_DMA_SEMAPHORE, chan->vram.handle);
+
+ PUSH_MTHD(push, NV826F, SEMAPHOREA,
+ NVVAL(NV826F, SEMAPHOREA, OFFSET_UPPER, upper_32_bits(virtual)),
+
+ SEMAPHOREB, lower_32_bits(virtual),
+ SEMAPHOREC, sequence,
+
+ SEMAPHORED,
+ NVDEF(NV826F, SEMAPHORED, OPERATION, RELEASE),
+
+ NON_STALLED_INTERRUPT, 0);
+ PUSH_KICK(push);
}
return ret;
}
@@ -50,16 +58,20 @@
static int
nv84_fence_sync32(struct nouveau_channel *chan, u64 virtual, u32 sequence)
{
- int ret = RING_SPACE(chan, 7);
+ struct nvif_push *push = chan->chan.push;
+ int ret = PUSH_WAIT(push, 7);
if (ret == 0) {
- BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);
- OUT_RING (chan, chan->vram.handle);
- BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);
- OUT_RING (chan, upper_32_bits(virtual));
- OUT_RING (chan, lower_32_bits(virtual));
- OUT_RING (chan, sequence);
- OUT_RING (chan, NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL);
- FIRE_RING (chan);
+ PUSH_MTHD(push, NV826F, SET_CONTEXT_DMA_SEMAPHORE, chan->vram.handle);
+
+ PUSH_MTHD(push, NV826F, SEMAPHOREA,
+ NVVAL(NV826F, SEMAPHOREA, OFFSET_UPPER, upper_32_bits(virtual)),
+
+ SEMAPHOREB, lower_32_bits(virtual),
+ SEMAPHOREC, sequence,
+
+ SEMAPHORED,
+ NVDEF(NV826F, SEMAPHORED, OPERATION, ACQ_GEQ));
+ PUSH_KICK(push);
}
return ret;
}
@@ -109,7 +121,6 @@
int
nv84_fence_context_new(struct nouveau_channel *chan)
{
- struct nouveau_cli *cli = (void *)chan->user.client;
struct nv84_fence_priv *priv = chan->drm->fence;
struct nv84_fence_chan *fctx;
int ret;
@@ -127,7 +138,7 @@
fctx->base.sequence = nv84_fence_read(chan);
mutex_lock(&priv->mutex);
- ret = nouveau_vma_new(priv->bo, &cli->vmm, &fctx->vma);
+ ret = nouveau_vma_new(priv->bo, chan->vmm, &fctx->vma);
mutex_unlock(&priv->mutex);
if (ret)
@@ -198,12 +209,13 @@
mutex_init(&priv->mutex);
/* Use VRAM if there is any ; otherwise fallback to system memory */
- domain = drm->client.device.info.ram_size != 0 ? TTM_PL_FLAG_VRAM :
- /*
- * fences created in sysmem must be non-cached or we
- * will lose CPU/GPU coherency!
- */
- TTM_PL_FLAG_TT | TTM_PL_FLAG_UNCACHED;
+ domain = drm->client.device.info.ram_size != 0 ?
+ NOUVEAU_GEM_DOMAIN_VRAM :
+ /*
+ * fences created in sysmem must be non-cached or we
+ * will lose CPU/GPU coherency!
+ */
+ NOUVEAU_GEM_DOMAIN_GART | NOUVEAU_GEM_DOMAIN_COHERENT;
ret = nouveau_bo_new(&drm->client, 16 * drm->chan.nr, 0,
domain, 0, 0, NULL, NULL, &priv->bo);
if (ret == 0) {
--
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