From 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Mon, 13 May 2024 10:30:14 +0000
Subject: [PATCH] modify sin led gpio
---
kernel/drivers/gpu/drm/nouveau/nv17_fence.c | 50 +++++++++++++++++++++++++++-----------------------
1 files changed, 27 insertions(+), 23 deletions(-)
diff --git a/kernel/drivers/gpu/drm/nouveau/nv17_fence.c b/kernel/drivers/gpu/drm/nouveau/nv17_fence.c
index 5d613d4..1253fde 100644
--- a/kernel/drivers/gpu/drm/nouveau/nv17_fence.c
+++ b/kernel/drivers/gpu/drm/nouveau/nv17_fence.c
@@ -21,14 +21,16 @@
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
-
-#include <nvif/os.h>
-#include <nvif/class.h>
-#include <nvif/cl0002.h>
-
#include "nouveau_drv.h"
#include "nouveau_dma.h"
#include "nv10_fence.h"
+
+#include <nvif/push006c.h>
+
+#include <nvif/class.h>
+#include <nvif/cl0002.h>
+
+#include <nvhw/class/cl176e.h>
int
nv17_fence_sync(struct nouveau_fence *fence,
@@ -37,6 +39,8 @@
struct nouveau_cli *cli = (void *)prev->user.client;
struct nv10_fence_priv *priv = chan->drm->fence;
struct nv10_fence_chan *fctx = chan->fence;
+ struct nvif_push *ppush = prev->chan.push;
+ struct nvif_push *npush = chan->chan.push;
u32 value;
int ret;
@@ -48,23 +52,21 @@
priv->sequence += 2;
spin_unlock(&priv->lock);
- ret = RING_SPACE(prev, 5);
+ ret = PUSH_WAIT(ppush, 5);
if (!ret) {
- BEGIN_NV04(prev, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4);
- OUT_RING (prev, fctx->sema.handle);
- OUT_RING (prev, 0);
- OUT_RING (prev, value + 0);
- OUT_RING (prev, value + 1);
- FIRE_RING (prev);
+ PUSH_MTHD(ppush, NV176E, SET_CONTEXT_DMA_SEMAPHORE, fctx->sema.handle,
+ SEMAPHORE_OFFSET, 0,
+ SEMAPHORE_ACQUIRE, value + 0,
+ SEMAPHORE_RELEASE, value + 1);
+ PUSH_KICK(ppush);
}
- if (!ret && !(ret = RING_SPACE(chan, 5))) {
- BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4);
- OUT_RING (chan, fctx->sema.handle);
- OUT_RING (chan, 0);
- OUT_RING (chan, value + 1);
- OUT_RING (chan, value + 2);
- FIRE_RING (chan);
+ if (!ret && !(ret = PUSH_WAIT(npush, 5))) {
+ PUSH_MTHD(npush, NV176E, SET_CONTEXT_DMA_SEMAPHORE, fctx->sema.handle,
+ SEMAPHORE_OFFSET, 0,
+ SEMAPHORE_ACQUIRE, value + 1,
+ SEMAPHORE_RELEASE, value + 2);
+ PUSH_KICK(npush);
}
mutex_unlock(&cli->mutex);
@@ -76,7 +78,7 @@
{
struct nv10_fence_priv *priv = chan->drm->fence;
struct nv10_fence_chan *fctx;
- struct ttm_mem_reg *reg = &priv->bo->bo.mem;
+ struct ttm_resource *reg = &priv->bo->bo.mem;
u32 start = reg->start * PAGE_SIZE;
u32 limit = start + reg->size - 1;
int ret = 0;
@@ -90,7 +92,8 @@
fctx->base.read = nv10_fence_read;
fctx->base.sync = nv17_fence_sync;
- ret = nvif_object_init(&chan->user, NvSema, NV_DMA_FROM_MEMORY,
+ ret = nvif_object_ctor(&chan->user, "fenceCtxDma", NvSema,
+ NV_DMA_FROM_MEMORY,
&(struct nv_dma_v0) {
.target = NV_DMA_V0_TARGET_VRAM,
.access = NV_DMA_V0_ACCESS_RDWR,
@@ -127,10 +130,11 @@
priv->base.context_del = nv10_fence_context_del;
spin_lock_init(&priv->lock);
- ret = nouveau_bo_new(&drm->client, 4096, 0x1000, TTM_PL_FLAG_VRAM,
+ ret = nouveau_bo_new(&drm->client, 4096, 0x1000,
+ NOUVEAU_GEM_DOMAIN_VRAM,
0, 0x0000, NULL, NULL, &priv->bo);
if (!ret) {
- ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM, false);
+ ret = nouveau_bo_pin(priv->bo, NOUVEAU_GEM_DOMAIN_VRAM, false);
if (!ret) {
ret = nouveau_bo_map(priv->bo);
if (ret)
--
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