From 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e Mon Sep 17 00:00:00 2001 From: hc <hc@nodka.com> Date: Mon, 13 May 2024 10:30:14 +0000 Subject: [PATCH] modify sin led gpio --- kernel/Documentation/devicetree/bindings/mtd/nvidia-tegra20-nand.txt | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/kernel/Documentation/devicetree/bindings/mtd/nvidia-tegra20-nand.txt b/kernel/Documentation/devicetree/bindings/mtd/nvidia-tegra20-nand.txt index b2f2ca1..e737e5b 100644 --- a/kernel/Documentation/devicetree/bindings/mtd/nvidia-tegra20-nand.txt +++ b/kernel/Documentation/devicetree/bindings/mtd/nvidia-tegra20-nand.txt @@ -26,14 +26,14 @@ "hw" is supported. - nand-ecc-algo: string, algorithm of NAND ECC. Supported values with "hw" ECC mode are: "rs", "bch". -- nand-bus-width : See nand.txt -- nand-on-flash-bbt: See nand.txt +- nand-bus-width : See nand-controller.yaml +- nand-on-flash-bbt: See nand-controller.yaml - nand-ecc-strength: integer representing the number of bits to correct per ECC step (always 512). Supported strength using HW ECC modes are: - RS: 4, 6, 8 - BCH: 4, 8, 14, 16 -- nand-ecc-maximize: See nand.txt +- nand-ecc-maximize: See nand-controller.yaml - nand-is-boot-medium: Makes sure only ECC strengths supported by the boot ROM are chosen. - wp-gpios: GPIO specifier for the write protect pin. -- Gitblit v1.6.2