From 9c2dfff96adcfcdf2a1143893a7dd749b9f3677a Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Wed, 15 Feb 2023 10:27:30 +0000
Subject: [PATCH] enable 4G
---
kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi | 62 ++++++++++++++++++++----------
1 files changed, 41 insertions(+), 21 deletions(-)
diff --git a/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi b/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
index 2c59a55..9424547 100755
--- a/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
+++ b/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
@@ -17,7 +17,7 @@
rk_headset: rk-headset {
compatible = "rockchip_headset";
- headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
+ headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
};
@@ -32,15 +32,6 @@
vin-supply = <&vcc3v3_sys>;
};
- vcc3v3_vga: vcc3v3-vga {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3_vga";
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vcc3v3_sys>;
- };
pcie30_avdd0v9: pcie30-avdd0v9 {
compatible = "regulator-fixed";
@@ -97,7 +88,7 @@
nk_io_init {
compatible = "nk_io_control";
- usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; //USB_EN_OC_GPIO0_A5
+// usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; //USB_EN_OC_GPIO0_A5
lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
@@ -110,12 +101,14 @@
reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
-
+ hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
+ spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
+
edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
- edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; //7511_GPIO0-GPIO3_D2
- edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; //7511_GPIO1-GPIO3_D3
- edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; //7511_GPIO2-GPIO3_D4
- edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; //7511_GPIO3-GPIO3_D5
+ edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
+ edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
+ edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
+ edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
// tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
// vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
@@ -317,9 +310,6 @@
compatible = "nk_mcu";
reg = <0x15>;
};
-
-
-
};
&i2c4 {
@@ -392,6 +382,19 @@
};
};
+&i2c5 {
+ status = "okay";
+
+ hym8563: hym8563@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "xin32k";
+ /* rtc_int is not connected */
+ };
+};
+
&mdio0 {
rgmii_phy0: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
@@ -434,7 +437,7 @@
// };
headphone {
hp_det: hp-det {
- rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
@@ -451,7 +454,24 @@
};
nk_io_init{
nk_io_gpio: nk-io-gpio{
- rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
+ <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
+ <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
+ <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
+ <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
+ <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
+ <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
+ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
+ <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
+ <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
--
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