From 9999e48639b3cecb08ffb37358bcba3b48161b29 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Fri, 10 May 2024 08:50:17 +0000
Subject: [PATCH] add ax88772_rst
---
kernel/drivers/media/platform/rockchip/isp/capture_v30.c | 142 ++++++++++++++++++++++++-----------------------
1 files changed, 72 insertions(+), 70 deletions(-)
diff --git a/kernel/drivers/media/platform/rockchip/isp/capture_v30.c b/kernel/drivers/media/platform/rockchip/isp/capture_v30.c
index c3ef571..78b06ec 100644
--- a/kernel/drivers/media/platform/rockchip/isp/capture_v30.c
+++ b/kernel/drivers/media/platform/rockchip/isp/capture_v30.c
@@ -332,7 +332,7 @@
if (dcrop->width == input_win->width &&
dcrop->height == input_win->height &&
dcrop->left == 0 && dcrop->top == 0 &&
- !dev->hw_dev->is_unite) {
+ !dev->hw_dev->unite) {
rkisp_disable_dcrop(stream, async);
v4l2_dbg(1, rkisp_debug, &dev->v4l2_dev,
"stream %d crop disabled\n", stream->id);
@@ -472,7 +472,7 @@
{
struct rkisp_device *dev = stream->ispdev;
struct v4l2_pix_format_mplane *out_fmt = &stream->out_fmt;
- bool is_unite = dev->hw_dev->is_unite;
+ bool is_unite = !!dev->hw_dev->unite;
u32 val, mask;
/*
@@ -480,26 +480,26 @@
* memory plane formats, so calculate the size explicitly.
*/
val = out_fmt->plane_fmt[0].bytesperline * out_fmt->height;
- rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false, is_unite);
+ rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false);
val = out_fmt->plane_fmt[1].sizeimage;
- rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false, is_unite);
+ rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false);
val = out_fmt->plane_fmt[2].sizeimage;
- rkisp_unite_write(dev, stream->config->mi.cr_size_init, val, false, is_unite);
+ rkisp_unite_write(dev, stream->config->mi.cr_size_init, val, false);
val = is_unite ? out_fmt->width / 2 : out_fmt->width;
- rkisp_unite_write(dev, ISP3X_MI_MP_WR_Y_PIC_WIDTH, val, false, is_unite);
+ rkisp_unite_write(dev, ISP3X_MI_MP_WR_Y_PIC_WIDTH, val, false);
val = out_fmt->height;
- rkisp_unite_write(dev, ISP3X_MI_MP_WR_Y_PIC_HEIGHT, val, false, is_unite);
+ rkisp_unite_write(dev, ISP3X_MI_MP_WR_Y_PIC_HEIGHT, val, false);
val = out_fmt->plane_fmt[0].bytesperline;
- rkisp_unite_write(dev, ISP3X_MI_MP_WR_Y_LLENGTH, val, false, is_unite);
+ rkisp_unite_write(dev, ISP3X_MI_MP_WR_Y_LLENGTH, val, false);
val = stream->out_isp_fmt.uv_swap ? ISP3X_MI_XTD_FORMAT_MP_UV_SWAP : 0;
mask = ISP3X_MI_XTD_FORMAT_MP_UV_SWAP;
- rkisp_unite_set_bits(dev, ISP3X_MI_WR_XTD_FORMAT_CTRL, mask, val, false, is_unite);
+ rkisp_unite_set_bits(dev, ISP3X_MI_WR_XTD_FORMAT_CTRL, mask, val, false);
mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_MP_YUV_MODE;
val = rkisp_read_reg_cache(dev, ISP3X_MPFBC_CTRL) & ~mask;
@@ -511,13 +511,13 @@
val |= ISP3X_SEPERATE_YUV_CFG;
else
val |= ISP3X_SEPERATE_YUV_CFG | ISP3X_MP_YUV_MODE;
- rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false, is_unite);
+ rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false);
val = calc_burst_len(stream) | CIF_MI_CTRL_INIT_BASE_EN |
CIF_MI_CTRL_INIT_OFFSET_EN | CIF_MI_MP_AUTOUPDATE_ENABLE |
stream->out_isp_fmt.write_format;
mask = GENMASK(19, 16) | MI_CTRL_MP_FMT_MASK;
- rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, mask, val, false, is_unite);
+ rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, mask, val, false);
mi_frame_end_int_enable(stream);
/* set up first buffer */
@@ -558,7 +558,7 @@
struct v4l2_pix_format_mplane *out_fmt = &stream->out_fmt;
struct ispsd_out_fmt *input_isp_fmt =
rkisp_get_ispsd_out_fmt(&dev->isp_sdev);
- bool is_unite = dev->hw_dev->is_unite;
+ bool is_unite = !!dev->hw_dev->unite;
u32 sp_in_fmt, val, mask;
if (mbus_code_sp_in_fmt(input_isp_fmt->mbus_code,
@@ -572,26 +572,26 @@
* memory plane formats, so calculate the size explicitly.
*/
val = out_fmt->plane_fmt[0].bytesperline * out_fmt->height;
- rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false, is_unite);
+ rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false);
val = out_fmt->plane_fmt[1].sizeimage;
- rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false, is_unite);
+ rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false);
val = out_fmt->plane_fmt[2].sizeimage;
- rkisp_unite_write(dev, stream->config->mi.cr_size_init, val, false, is_unite);
+ rkisp_unite_write(dev, stream->config->mi.cr_size_init, val, false);
val = is_unite ? out_fmt->width / 2 : out_fmt->width;
- rkisp_unite_write(dev, ISP3X_MI_SP_WR_Y_PIC_WIDTH, val, false, is_unite);
+ rkisp_unite_write(dev, ISP3X_MI_SP_WR_Y_PIC_WIDTH, val, false);
val = out_fmt->height;
- rkisp_unite_write(dev, ISP3X_MI_SP_WR_Y_PIC_HEIGHT, val, false, is_unite);
+ rkisp_unite_write(dev, ISP3X_MI_SP_WR_Y_PIC_HEIGHT, val, false);
val = stream->u.sp.y_stride;
- rkisp_unite_write(dev, ISP3X_MI_SP_WR_Y_LLENGTH, val, false, is_unite);
+ rkisp_unite_write(dev, ISP3X_MI_SP_WR_Y_LLENGTH, val, false);
val = stream->out_isp_fmt.uv_swap ? ISP3X_MI_XTD_FORMAT_SP_UV_SWAP : 0;
mask = ISP3X_MI_XTD_FORMAT_SP_UV_SWAP;
- rkisp_unite_set_bits(dev, ISP3X_MI_WR_XTD_FORMAT_CTRL, mask, val, false, is_unite);
+ rkisp_unite_set_bits(dev, ISP3X_MI_WR_XTD_FORMAT_CTRL, mask, val, false);
mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_SP_YUV_MODE;
val = rkisp_read_reg_cache(dev, ISP3X_MPFBC_CTRL) & ~mask;
@@ -603,14 +603,14 @@
val |= ISP3X_SEPERATE_YUV_CFG;
else
val |= ISP3X_SEPERATE_YUV_CFG | ISP3X_SP_YUV_MODE;
- rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false, is_unite);
+ rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false);
val = calc_burst_len(stream) | CIF_MI_CTRL_INIT_BASE_EN |
CIF_MI_CTRL_INIT_OFFSET_EN | stream->out_isp_fmt.write_format |
sp_in_fmt | stream->out_isp_fmt.output_format |
CIF_MI_SP_AUTOUPDATE_ENABLE;
mask = GENMASK(19, 16) | MI_CTRL_SP_FMT_MASK;
- rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, mask, val, false, is_unite);
+ rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, mask, val, false);
mi_frame_end_int_enable(stream);
/* set up first buffer */
@@ -625,12 +625,12 @@
u32 h = ALIGN(stream->out_fmt.height, 16);
u32 w = ALIGN(stream->out_fmt.width, 16);
u32 offs = ALIGN(w * h / 16, RK_MPP_ALIGN);
- bool is_unite = stream->ispdev->hw_dev->is_unite;
+ bool is_unite = !!stream->ispdev->hw_dev->unite;
rkisp_write(stream->ispdev, ISP3X_MPFBC_HEAD_OFFSET, offs, false);
- rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_VIR_WIDTH, w, false, is_unite);
- rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_PAYL_WIDTH, w, false, is_unite);
- rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_VIR_HEIGHT, h, false, is_unite);
+ rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_VIR_WIDTH, w, false);
+ rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_PAYL_WIDTH, w, false);
+ rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_VIR_HEIGHT, h, false);
if (is_unite) {
u32 left_w = (stream->out_fmt.width / 2) & ~0xf;
@@ -638,8 +638,7 @@
rkisp_next_write(stream->ispdev, ISP3X_MPFBC_HEAD_OFFSET, offs, false);
}
rkisp_unite_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL, 0,
- CIF_MI_CTRL_INIT_BASE_EN | CIF_MI_CTRL_INIT_OFFSET_EN,
- false, is_unite);
+ CIF_MI_CTRL_INIT_BASE_EN | CIF_MI_CTRL_INIT_OFFSET_EN, false);
mi_frame_end_int_enable(stream);
/* set up first buffer */
mi_frame_end(stream, FRAME_INIT);
@@ -650,7 +649,7 @@
{
struct v4l2_pix_format_mplane *out_fmt = &stream->out_fmt;
struct rkisp_device *dev = stream->ispdev;
- bool is_unite = dev->hw_dev->is_unite;
+ bool is_unite = dev->hw_dev->unite;
u32 val, mask;
/*
@@ -658,19 +657,19 @@
* memory plane formats, so calculate the size explicitly.
*/
val = out_fmt->plane_fmt[0].bytesperline * out_fmt->height;
- rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false, is_unite);
+ rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false);
val = out_fmt->plane_fmt[1].sizeimage;
- rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false, is_unite);
+ rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false);
val = is_unite ? out_fmt->width / 2 : out_fmt->width;
- rkisp_unite_write(dev, ISP3X_MI_BP_WR_Y_PIC_WIDTH, val, false, is_unite);
+ rkisp_unite_write(dev, ISP3X_MI_BP_WR_Y_PIC_WIDTH, val, false);
val = out_fmt->height;
- rkisp_unite_write(dev, ISP3X_MI_BP_WR_Y_PIC_HEIGHT, val, false, is_unite);
+ rkisp_unite_write(dev, ISP3X_MI_BP_WR_Y_PIC_HEIGHT, val, false);
val = out_fmt->plane_fmt[0].bytesperline;
- rkisp_unite_write(dev, ISP3X_MI_BP_WR_Y_LLENGTH, val, false, is_unite);
+ rkisp_unite_write(dev, ISP3X_MI_BP_WR_Y_LLENGTH, val, false);
mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_BP_YUV_MODE;
val = rkisp_read_reg_cache(dev, ISP3X_MPFBC_CTRL) & ~mask;
@@ -680,9 +679,9 @@
val |= ISP3X_SEPERATE_YUV_CFG;
else
val |= ISP3X_SEPERATE_YUV_CFG | ISP3X_BP_YUV_MODE;
- rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false, is_unite);
+ rkisp_unite_write(dev, ISP3X_MPFBC_CTRL, val, false);
val = CIF_MI_CTRL_INIT_BASE_EN | CIF_MI_CTRL_INIT_OFFSET_EN;
- rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, 0, val, false, is_unite);
+ rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL, 0, val, false);
mi_frame_end_int_enable(stream);
/* set up first buffer */
mi_frame_end(stream, FRAME_INIT);
@@ -697,8 +696,7 @@
if (isp_fmt->fmt_type == FMT_BAYER)
val = CIF_MI_CTRL_RAW_ENABLE;
- rkisp_unite_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, val,
- false, stream->ispdev->hw_dev->is_unite);
+ rkisp_unite_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, val, false);
}
static void sp_enable_mi(struct rkisp_stream *stream)
@@ -711,21 +709,18 @@
if (fmt->fmt_type == FMT_RGB &&
dev->isp_sdev.quantization == V4L2_QUANTIZATION_FULL_RANGE)
val |= mask;
- rkisp_unite_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL,
- mask, val, false,
- stream->ispdev->hw_dev->is_unite);
+ rkisp_unite_set_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, val, false);
}
static void fbc_enable_mi(struct rkisp_stream *stream)
{
u32 val, mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_MPFBC_YUV_MASK |
ISP3X_MPFBC_SPARSE_MODE;
- bool is_unite = stream->ispdev->hw_dev->is_unite;
/* config no effect immediately, read back is shadow, get config value from cache */
val = rkisp_read_reg_cache(stream->ispdev, ISP3X_MPFBC_CTRL) & ~mask;
val |= stream->out_isp_fmt.write_format | ISP3X_HEAD_OFFSET_EN | ISP3X_MPFBC_EN;
- rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_CTRL, val, false, is_unite);
+ rkisp_unite_write(stream->ispdev, ISP3X_MPFBC_CTRL, val, false);
}
static void bp_enable_mi(struct rkisp_stream *stream)
@@ -733,36 +728,31 @@
u32 val = stream->out_isp_fmt.write_format |
ISP3X_BP_ENABLE | ISP3X_BP_AUTO_UPD;
- rkisp_unite_write(stream->ispdev, ISP3X_MI_BP_WR_CTRL, val, false,
- stream->ispdev->hw_dev->is_unite);
+ rkisp_unite_write(stream->ispdev, ISP3X_MI_BP_WR_CTRL, val, false);
}
static void mp_disable_mi(struct rkisp_stream *stream)
{
u32 mask = CIF_MI_CTRL_MP_ENABLE | CIF_MI_CTRL_RAW_ENABLE;
- rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, false,
- stream->ispdev->hw_dev->is_unite);
+ rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_WR_CTRL, mask, false);
}
static void sp_disable_mi(struct rkisp_stream *stream)
{
- rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_WR_CTRL, CIF_MI_CTRL_SP_ENABLE,
- false, stream->ispdev->hw_dev->is_unite);
+ rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_WR_CTRL, CIF_MI_CTRL_SP_ENABLE, false);
}
static void fbc_disable_mi(struct rkisp_stream *stream)
{
u32 mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_MPFBC_EN;
- rkisp_unite_clear_bits(stream->ispdev, ISP3X_MPFBC_CTRL, mask,
- false, stream->ispdev->hw_dev->is_unite);
+ rkisp_unite_clear_bits(stream->ispdev, ISP3X_MPFBC_CTRL, mask, false);
}
static void bp_disable_mi(struct rkisp_stream *stream)
{
- rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_BP_WR_CTRL, ISP3X_BP_ENABLE,
- false, stream->ispdev->hw_dev->is_unite);
+ rkisp_unite_clear_bits(stream->ispdev, ISP3X_MI_BP_WR_CTRL, ISP3X_BP_ENABLE, false);
}
static void update_mi(struct rkisp_stream *stream)
@@ -786,24 +776,25 @@
rkisp_write(dev, reg, val, false);
}
- if (dev->hw_dev->is_unite) {
+ if (dev->hw_dev->unite) {
u32 mult = stream->id != RKISP_STREAM_FBC ? 1 :
(stream->out_isp_fmt.write_format ? 32 : 24);
+ u32 div = stream->out_isp_fmt.fourcc == V4L2_PIX_FMT_UYVY ? 1 : 2;
reg = stream->config->mi.y_base_ad_init;
val = stream->next_buf->buff_addr[RKISP_PLANE_Y];
- val += ((stream->out_fmt.width / 2) & ~0xf);
+ val += ((stream->out_fmt.width / div) & ~0xf);
rkisp_next_write(dev, reg, val, false);
reg = stream->config->mi.cb_base_ad_init;
val = stream->next_buf->buff_addr[RKISP_PLANE_CB];
- val += ((stream->out_fmt.width / 2) & ~0xf) * mult;
+ val += ((stream->out_fmt.width / div) & ~0xf) * mult;
rkisp_next_write(dev, reg, val, false);
if (stream->id != RKISP_STREAM_FBC && stream->id != RKISP_STREAM_BP) {
reg = stream->config->mi.cr_base_ad_init;
val = stream->next_buf->buff_addr[RKISP_PLANE_CR];
- val += ((stream->out_fmt.width / 2) & ~0xf);
+ val += ((stream->out_fmt.width / div) & ~0xf);
rkisp_next_write(dev, reg, val, false);
}
}
@@ -817,22 +808,22 @@
stream->dbg.frameloss++;
val = dummy_buf->dma_addr;
reg = stream->config->mi.y_base_ad_init;
- rkisp_unite_write(dev, reg, val, false, dev->hw_dev->is_unite);
+ rkisp_unite_write(dev, reg, val, false);
reg = stream->config->mi.cb_base_ad_init;
- rkisp_unite_write(dev, reg, val, false, dev->hw_dev->is_unite);
+ rkisp_unite_write(dev, reg, val, false);
reg = stream->config->mi.cr_base_ad_init;
if (stream->id != RKISP_STREAM_FBC && stream->id != RKISP_STREAM_BP)
- rkisp_unite_write(dev, reg, val, false, dev->hw_dev->is_unite);
+ rkisp_unite_write(dev, reg, val, false);
}
if (stream->id != RKISP_STREAM_FBC) {
reg = stream->config->mi.y_offs_cnt_init;
- rkisp_unite_write(dev, reg, 0, false, dev->hw_dev->is_unite);
+ rkisp_unite_write(dev, reg, 0, false);
reg = stream->config->mi.cb_offs_cnt_init;
- rkisp_unite_write(dev, reg, 0, false, dev->hw_dev->is_unite);
+ rkisp_unite_write(dev, reg, 0, false);
reg = stream->config->mi.cr_offs_cnt_init;
if (stream->id != RKISP_STREAM_BP)
- rkisp_unite_write(dev, reg, 0, false, dev->hw_dev->is_unite);
+ rkisp_unite_write(dev, reg, 0, false);
}
v4l2_dbg(2, rkisp_debug, &dev->v4l2_dev,
@@ -841,7 +832,7 @@
rkisp_read(dev, stream->config->mi.y_base_ad_init, false),
rkisp_read(dev, stream->config->mi.cb_base_ad_init, false),
rkisp_read(dev, stream->config->mi.y_base_ad_shd, true));
- if (dev->hw_dev->is_unite)
+ if (dev->hw_dev->unite)
v4l2_dbg(2, rkisp_debug, &dev->v4l2_dev,
"%s stream:%d Y:0x%x CB:0x%x | Y_SHD:0x%x, right\n",
__func__, stream->id,
@@ -896,11 +887,10 @@
{
struct rkisp_device *dev = stream->ispdev;
u32 val, mask = ISP3X_MPSELF_UPD | ISP3X_SPSELF_UPD | ISP3X_BPSELF_UPD;
- bool is_unite = dev->hw_dev->is_unite;
if (stream->id == RKISP_STREAM_FBC) {
val = ISP3X_MPFBC_FORCE_UPD;
- rkisp_unite_set_bits(dev, ISP3X_MPFBC_CTRL, 0, val, false, is_unite);
+ rkisp_unite_set_bits(dev, ISP3X_MPFBC_CTRL, 0, val, false);
return;
}
@@ -918,7 +908,7 @@
return;
}
- rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL2, mask, val, false, is_unite);
+ rkisp_unite_set_bits(dev, ISP3X_MI_WR_CTRL2, mask, val, false);
}
static int mi_frame_start(struct rkisp_stream *stream, u32 mis)
@@ -976,13 +966,25 @@
(stream->frame_early && state == FRAME_IRQ))
goto end;
} else {
+ spin_lock_irqsave(&stream->vbq_lock, lock_flags);
buf = stream->curr_buf;
+ stream->curr_buf = NULL;
+ spin_unlock_irqrestore(&stream->vbq_lock, lock_flags);
}
if (buf) {
struct rkisp_stream *vir = &dev->cap_dev.stream[RKISP_STREAM_VIR];
struct vb2_buffer *vb2_buf = &buf->vb.vb2_buf;
u64 ns = 0;
+
+ if (stream->skip_frame) {
+ spin_lock_irqsave(&stream->vbq_lock, lock_flags);
+ list_add_tail(&buf->queue, &stream->buf_queue);
+ spin_unlock_irqrestore(&stream->vbq_lock, lock_flags);
+ if (stream->skip_frame)
+ stream->skip_frame--;
+ goto end;
+ }
/* Dequeue a filled buffer */
for (i = 0; i < isp_fmt->mplanes; i++) {
@@ -994,10 +996,10 @@
rkisp_dmarx_get_frame(dev, &i, NULL, &ns, true);
buf->vb.sequence = i;
if (!ns)
- ns = ktime_get_ns();
+ ns = rkisp_time_get_ns(dev);
vb2_buf->timestamp = ns;
- ns = ktime_get_ns();
+ ns = rkisp_time_get_ns(dev);
stream->dbg.interval = ns - stream->dbg.timestamp;
stream->dbg.timestamp = ns;
stream->dbg.id = buf->vb.sequence;
@@ -1104,7 +1106,7 @@
stream->ops->enable_mi(stream);
stream->streaming = true;
-
+ stream->skip_frame = 0;
return 0;
}
@@ -1686,7 +1688,7 @@
struct rkisp_stream *stream;
unsigned int i;
- if (dev->hw_dev->is_unite) {
+ if (dev->hw_dev->unite) {
u32 val = rkisp_read(dev, ISP3X_MI_RIS, true);
if (val) {
--
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