From 95099d4622f8cb224d94e314c7a8e0df60b13f87 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Sat, 09 Dec 2023 08:38:01 +0000
Subject: [PATCH] enable docker ppp
---
kernel/drivers/media/platform/rockchip/isp/capture_v21.c | 432 ++++++++++++++++++++++++++++++++++++++++++++++++-----
1 files changed, 385 insertions(+), 47 deletions(-)
diff --git a/kernel/drivers/media/platform/rockchip/isp/capture_v21.c b/kernel/drivers/media/platform/rockchip/isp/capture_v21.c
index 79402c5..7983651 100644
--- a/kernel/drivers/media/platform/rockchip/isp/capture_v21.c
+++ b/kernel/drivers/media/platform/rockchip/isp/capture_v21.c
@@ -15,9 +15,337 @@
#define CIF_ISP_REQ_BUFS_MIN 0
-static int mi_frame_end(struct rkisp_stream *stream);
+static int mi_frame_end(struct rkisp_stream *stream, u32 state);
static void rkisp_buf_queue(struct vb2_buffer *vb);
+static const struct capture_fmt mp_fmts[] = {
+ /* yuv422 */
+ {
+ .fourcc = V4L2_PIX_FMT_UYVY,
+ .fmt_type = FMT_YUV,
+ .bpp = { 16 },
+ .cplanes = 1,
+ .mplanes = 1,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_MP_WRITE_YUVINT,
+ .output_format = ISP32_MI_OUTPUT_YUV422,
+ }, {
+ .fourcc = V4L2_PIX_FMT_YUV422P,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 4, 4 },
+ .cplanes = 3,
+ .mplanes = 1,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
+ .output_format = ISP32_MI_OUTPUT_YUV422,
+ }, {
+ .fourcc = V4L2_PIX_FMT_NV16,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 16 },
+ .cplanes = 2,
+ .mplanes = 1,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_MP_WRITE_YUV_SPLA,
+ .output_format = ISP32_MI_OUTPUT_YUV422,
+ }, {
+ .fourcc = V4L2_PIX_FMT_NV61,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 16 },
+ .cplanes = 2,
+ .mplanes = 1,
+ .uv_swap = 1,
+ .write_format = MI_CTRL_MP_WRITE_YUV_SPLA,
+ .output_format = ISP32_MI_OUTPUT_YUV422,
+ }, {
+ .fourcc = V4L2_PIX_FMT_YUV422M,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 8, 8 },
+ .cplanes = 3,
+ .mplanes = 3,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
+ .output_format = ISP32_MI_OUTPUT_YUV422,
+ },
+ /* yuv420 */
+ {
+ .fourcc = V4L2_PIX_FMT_NV21,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 16 },
+ .cplanes = 2,
+ .mplanes = 1,
+ .uv_swap = 1,
+ .write_format = MI_CTRL_MP_WRITE_YUV_SPLA,
+ .output_format = ISP32_MI_OUTPUT_YUV420,
+ }, {
+ .fourcc = V4L2_PIX_FMT_NV12,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 16 },
+ .cplanes = 2,
+ .mplanes = 1,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_MP_WRITE_YUV_SPLA,
+ .output_format = ISP32_MI_OUTPUT_YUV420,
+ }, {
+ .fourcc = V4L2_PIX_FMT_NV21M,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 16 },
+ .cplanes = 2,
+ .mplanes = 2,
+ .uv_swap = 1,
+ .write_format = MI_CTRL_MP_WRITE_YUV_SPLA,
+ .output_format = ISP32_MI_OUTPUT_YUV420,
+ }, {
+ .fourcc = V4L2_PIX_FMT_NV12M,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 16 },
+ .cplanes = 2,
+ .mplanes = 2,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_MP_WRITE_YUV_SPLA,
+ .output_format = ISP32_MI_OUTPUT_YUV420,
+ }, {
+ .fourcc = V4L2_PIX_FMT_YUV420,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 8, 8 },
+ .cplanes = 3,
+ .mplanes = 1,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
+ .output_format = ISP32_MI_OUTPUT_YUV420,
+ },
+ /* yuv444 */
+ {
+ .fourcc = V4L2_PIX_FMT_YUV444M,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 8, 8 },
+ .cplanes = 3,
+ .mplanes = 3,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
+ .output_format = 0,
+ },
+ /* raw */
+ {
+ .fourcc = V4L2_PIX_FMT_SRGGB8,
+ .fmt_type = FMT_BAYER,
+ .bpp = { 8 },
+ .mplanes = 1,
+ .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
+ .output_format = 0,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SGRBG8,
+ .fmt_type = FMT_BAYER,
+ .bpp = { 8 },
+ .mplanes = 1,
+ .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
+ .output_format = 0,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SGBRG8,
+ .fmt_type = FMT_BAYER,
+ .bpp = { 8 },
+ .mplanes = 1,
+ .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
+ .output_format = 0,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SBGGR8,
+ .fmt_type = FMT_BAYER,
+ .bpp = { 8 },
+ .mplanes = 1,
+ .write_format = MI_CTRL_MP_WRITE_YUV_PLA_OR_RAW8,
+ .output_format = 0,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SRGGB10,
+ .fmt_type = FMT_BAYER,
+ .bpp = { 10 },
+ .mplanes = 1,
+ .write_format = MI_CTRL_MP_WRITE_RAW12,
+ .output_format = 0,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SGRBG10,
+ .fmt_type = FMT_BAYER,
+ .bpp = { 10 },
+ .mplanes = 1,
+ .write_format = MI_CTRL_MP_WRITE_RAW12,
+ .output_format = 0,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SGBRG10,
+ .fmt_type = FMT_BAYER,
+ .bpp = { 10 },
+ .mplanes = 1,
+ .write_format = MI_CTRL_MP_WRITE_RAW12,
+ .output_format = 0,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SBGGR10,
+ .fmt_type = FMT_BAYER,
+ .bpp = { 10 },
+ .mplanes = 1,
+ .write_format = MI_CTRL_MP_WRITE_RAW12,
+ .output_format = 0,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SRGGB12,
+ .fmt_type = FMT_BAYER,
+ .bpp = { 12 },
+ .mplanes = 1,
+ .write_format = MI_CTRL_MP_WRITE_RAW12,
+ .output_format = 0,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SGRBG12,
+ .fmt_type = FMT_BAYER,
+ .bpp = { 12 },
+ .mplanes = 1,
+ .write_format = MI_CTRL_MP_WRITE_RAW12,
+ .output_format = 0,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SGBRG12,
+ .fmt_type = FMT_BAYER,
+ .bpp = { 12 },
+ .mplanes = 1,
+ .write_format = MI_CTRL_MP_WRITE_RAW12,
+ .output_format = 0,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SBGGR12,
+ .fmt_type = FMT_BAYER,
+ .bpp = { 12 },
+ .mplanes = 1,
+ .write_format = MI_CTRL_MP_WRITE_RAW12,
+ .output_format = 0,
+ },
+};
+
+static const struct capture_fmt sp_fmts[] = {
+ /* yuv422 */
+ {
+ .fourcc = V4L2_PIX_FMT_UYVY,
+ .fmt_type = FMT_YUV,
+ .bpp = { 16 },
+ .cplanes = 1,
+ .mplanes = 1,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_SP_WRITE_INT,
+ .output_format = MI_CTRL_SP_OUTPUT_YUV422,
+ }, {
+ .fourcc = V4L2_PIX_FMT_YUV422P,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 8, 8 },
+ .cplanes = 3,
+ .mplanes = 1,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_SP_WRITE_PLA,
+ .output_format = MI_CTRL_SP_OUTPUT_YUV422,
+ }, {
+ .fourcc = V4L2_PIX_FMT_NV16,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 16 },
+ .cplanes = 2,
+ .mplanes = 1,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_SP_WRITE_SPLA,
+ .output_format = MI_CTRL_SP_OUTPUT_YUV422,
+ }, {
+ .fourcc = V4L2_PIX_FMT_NV61,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 16 },
+ .cplanes = 2,
+ .mplanes = 1,
+ .uv_swap = 1,
+ .write_format = MI_CTRL_SP_WRITE_SPLA,
+ .output_format = MI_CTRL_SP_OUTPUT_YUV422,
+ }, {
+ .fourcc = V4L2_PIX_FMT_YUV422M,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 8, 8 },
+ .cplanes = 3,
+ .mplanes = 3,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_SP_WRITE_PLA,
+ .output_format = MI_CTRL_SP_OUTPUT_YUV422,
+ },
+ /* yuv420 */
+ {
+ .fourcc = V4L2_PIX_FMT_NV21,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 16 },
+ .cplanes = 2,
+ .mplanes = 1,
+ .uv_swap = 1,
+ .write_format = MI_CTRL_SP_WRITE_SPLA,
+ .output_format = MI_CTRL_SP_OUTPUT_YUV420,
+ }, {
+ .fourcc = V4L2_PIX_FMT_NV12,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 16 },
+ .cplanes = 2,
+ .mplanes = 1,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_SP_WRITE_SPLA,
+ .output_format = MI_CTRL_SP_OUTPUT_YUV420,
+ }, {
+ .fourcc = V4L2_PIX_FMT_NV21M,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 16 },
+ .cplanes = 2,
+ .mplanes = 2,
+ .uv_swap = 1,
+ .write_format = MI_CTRL_SP_WRITE_SPLA,
+ .output_format = MI_CTRL_SP_OUTPUT_YUV420,
+ }, {
+ .fourcc = V4L2_PIX_FMT_NV12M,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 16 },
+ .cplanes = 2,
+ .mplanes = 2,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_SP_WRITE_SPLA,
+ .output_format = MI_CTRL_SP_OUTPUT_YUV420,
+ }, {
+ .fourcc = V4L2_PIX_FMT_YUV420,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 8, 8 },
+ .cplanes = 3,
+ .mplanes = 1,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_SP_WRITE_PLA,
+ .output_format = MI_CTRL_SP_OUTPUT_YUV420,
+ },
+ /* yuv444 */
+ {
+ .fourcc = V4L2_PIX_FMT_YUV444M,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8, 8, 8 },
+ .cplanes = 3,
+ .mplanes = 3,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_SP_WRITE_PLA,
+ .output_format = MI_CTRL_SP_OUTPUT_YUV444,
+ },
+ /* yuv400 */
+ {
+ .fourcc = V4L2_PIX_FMT_GREY,
+ .fmt_type = FMT_YUV,
+ .bpp = { 8 },
+ .cplanes = 1,
+ .mplanes = 1,
+ .uv_swap = 0,
+ .write_format = MI_CTRL_SP_WRITE_PLA,
+ .output_format = MI_CTRL_SP_OUTPUT_YUV400,
+ },
+ /* rgb */
+ {
+ .fourcc = V4L2_PIX_FMT_XBGR32,
+ .fmt_type = FMT_RGB,
+ .bpp = { 32 },
+ .mplanes = 1,
+ .write_format = MI_CTRL_SP_WRITE_PLA,
+ .output_format = MI_CTRL_SP_OUTPUT_RGB888,
+ }, {
+ .fourcc = V4L2_PIX_FMT_RGB565,
+ .fmt_type = FMT_RGB,
+ .bpp = { 16 },
+ .mplanes = 1,
+ .write_format = MI_CTRL_SP_WRITE_PLA,
+ .output_format = MI_CTRL_SP_OUTPUT_RGB565,
+ },
+};
static const struct capture_fmt dmatx_fmts[] = {
/* raw */
{
@@ -392,7 +720,7 @@
stream->out_isp_fmt.write_format, false);
mi_frame_end_int_enable(stream);
/* set up first buffer */
- mi_frame_end(stream);
+ mi_frame_end(stream, FRAME_INIT);
return 0;
}
@@ -466,7 +794,7 @@
CIF_MI_SP_AUTOUPDATE_ENABLE, false);
mi_frame_end_int_enable(stream);
/* set up first buffer */
- mi_frame_end(stream);
+ mi_frame_end(stream, FRAME_INIT);
return 0;
}
@@ -483,7 +811,7 @@
if (!dev->active_sensor ||
(dev->active_sensor &&
- dev->active_sensor->mbus.type != V4L2_MBUS_CSI2)) {
+ dev->active_sensor->mbus.type != V4L2_MBUS_CSI2_DPHY)) {
v4l2_err(&dev->v4l2_dev,
"only mipi sensor support rawwr3\n");
return -EINVAL;
@@ -495,7 +823,7 @@
stream->out_fmt.height);
raw_wr_set_pic_offs(stream, 0);
mi_set_y_size(stream, in_size);
- mi_frame_end(stream);
+ mi_frame_end(stream, FRAME_INIT);
mi_frame_end_int_enable(stream);
mi_wr_ctrl2(base, SW_RAW3_WR_AUTOUPD);
mi_raw_length(stream);
@@ -526,7 +854,7 @@
if (!dev->active_sensor ||
(dev->active_sensor &&
- dev->active_sensor->mbus.type != V4L2_MBUS_CSI2)) {
+ dev->active_sensor->mbus.type != V4L2_MBUS_CSI2_DPHY)) {
v4l2_err(&dev->v4l2_dev,
"only mipi sensor support rawwr2 path\n");
return -EINVAL;
@@ -541,7 +869,7 @@
stream->out_fmt.height);
raw_wr_set_pic_offs(stream, 0);
mi_set_y_size(stream, in_size);
- mi_frame_end(stream);
+ mi_frame_end(stream, FRAME_INIT);
mi_frame_end_int_enable(stream);
mi_wr_ctrl2(base, SW_RAW1_WR_AUTOUPD);
mi_raw_length(stream);
@@ -571,7 +899,7 @@
if (!dev->active_sensor ||
(dev->active_sensor &&
- dev->active_sensor->mbus.type != V4L2_MBUS_CSI2)) {
+ dev->active_sensor->mbus.type != V4L2_MBUS_CSI2_DPHY)) {
if (stream->id == RKISP_STREAM_DMATX0)
v4l2_err(&dev->v4l2_dev,
"only mipi sensor support rawwr0 path\n");
@@ -587,7 +915,7 @@
stream->out_fmt.height);
raw_wr_set_pic_offs(stream, 0);
mi_set_y_size(stream, in_size);
- mi_frame_end(stream);
+ mi_frame_end(stream, FRAME_INIT);
mi_frame_end_int_enable(stream);
mi_wr_ctrl2(base, SW_RAW0_WR_AUTOUPD);
mi_raw_length(stream);
@@ -618,8 +946,15 @@
static void sp_enable_mi(struct rkisp_stream *stream)
{
- rkisp_set_bits(stream->ispdev, CIF_MI_CTRL, 0,
- CIF_MI_CTRL_SP_ENABLE, false);
+ struct rkisp_device *dev = stream->ispdev;
+ struct capture_fmt *fmt = &stream->out_isp_fmt;
+ u32 val = CIF_MI_CTRL_SP_ENABLE;
+ u32 mask = CIF_MI_SP_Y_FULL_YUV2RGB | CIF_MI_SP_CBCR_FULL_YUV2RGB;
+
+ if (fmt->fmt_type == FMT_RGB &&
+ dev->isp_sdev.quantization == V4L2_QUANTIZATION_FULL_RANGE)
+ val |= mask;
+ rkisp_set_bits(stream->ispdev, CIF_MI_CTRL, mask, val, false);
}
static void dmatx_enable_mi(struct rkisp_stream *stream)
@@ -739,7 +1074,7 @@
.enable_mi = mp_enable_mi,
.disable_mi = mp_disable_mi,
.stop_mi = mp_stop_mi,
- .set_data_path = mp_set_data_path,
+ .set_data_path = stream_data_path,
.is_stream_stopped = mp_is_stream_stopped,
.update_mi = update_mi,
.frame_end = mi_frame_end,
@@ -750,7 +1085,7 @@
.enable_mi = sp_enable_mi,
.disable_mi = sp_disable_mi,
.stop_mi = sp_stop_mi,
- .set_data_path = sp_set_data_path,
+ .set_data_path = stream_data_path,
.is_stream_stopped = sp_is_stream_stopped,
.update_mi = update_mi,
.frame_end = mi_frame_end,
@@ -797,7 +1132,7 @@
return;
if (isp_dev->hdr.op_mode == HDR_RDBK_FRAME1) {
- vb2_buffer_done(&cap->rdbk_buf[RDBK_S]->vb.vb2_buf, VB2_BUF_STATE_DONE);
+ rkisp_stream_buf_done(stream, cap->rdbk_buf[RDBK_S]);
cap->rdbk_buf[RDBK_S] = NULL;
return;
}
@@ -834,12 +1169,9 @@
goto RDBK_FRM_UNMATCH;
}
- cap->rdbk_buf[RDBK_S]->vb.sequence =
- cap->rdbk_buf[RDBK_L]->vb.sequence;
- vb2_buffer_done(&cap->rdbk_buf[RDBK_L]->vb.vb2_buf,
- VB2_BUF_STATE_DONE);
- vb2_buffer_done(&cap->rdbk_buf[RDBK_S]->vb.vb2_buf,
- VB2_BUF_STATE_DONE);
+ cap->rdbk_buf[RDBK_S]->vb.sequence = cap->rdbk_buf[RDBK_L]->vb.sequence;
+ rkisp_stream_buf_done(&cap->stream[RKISP_STREAM_DMATX0], cap->rdbk_buf[RDBK_L]);
+ rkisp_stream_buf_done(stream, cap->rdbk_buf[RDBK_S]);
} else {
v4l2_err(&isp_dev->v4l2_dev, "lost long frames\n");
goto RDBK_FRM_UNMATCH;
@@ -865,7 +1197,7 @@
* is processing and we should set up buffer for next-next frame,
* otherwise it will overflow.
*/
-static int mi_frame_end(struct rkisp_stream *stream)
+static int mi_frame_end(struct rkisp_stream *stream, u32 state)
{
struct rkisp_device *dev = stream->ispdev;
struct rkisp_capture_device *cap = &dev->cap_dev;
@@ -936,7 +1268,7 @@
rdbk_frame_end(stream);
}
} else {
- vb2_buffer_done(vb2_buf, VB2_BUF_STATE_DONE);
+ rkisp_stream_buf_done(stream, stream->curr_buf);
}
stream->curr_buf = NULL;
@@ -993,7 +1325,9 @@
{
struct rkisp_device *dev = stream->ispdev;
struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
+ unsigned long lock_flags = 0;
int ret = 0;
+ bool is_wait = dev->hw_dev->is_shutdown ? false : true;
if (!dev->dmarx_dev.trigger &&
(is_rdbk_stream(stream) || is_hdr_stream(stream))) {
@@ -1006,11 +1340,20 @@
stream->id != RKISP_STREAM_SP) || dev->hw_dev->is_single)
stream->ops->stop_mi(stream);
- if (stream->id == RKISP_STREAM_MP || stream->id == RKISP_STREAM_SP)
+ if (stream->id == RKISP_STREAM_MP || stream->id == RKISP_STREAM_SP) {
hdr_stop_dmatx(dev);
-
- if (dev->isp_state & ISP_START &&
- !stream->ops->is_stream_stopped(dev->base_addr)) {
+ if (IS_HDR_RDBK(dev->rd_mode) && !dev->hw_dev->is_single) {
+ spin_lock_irqsave(&dev->hw_dev->rdbk_lock, lock_flags);
+ if (dev->hw_dev->cur_dev_id != dev->dev_id || dev->hw_dev->is_idle) {
+ is_wait = false;
+ stream->ops->disable_mi(stream);
+ }
+ if (atomic_read(&dev->cap_dev.refcnt) == 1 && !is_wait)
+ dev->isp_state = ISP_STOP;
+ spin_unlock_irqrestore(&dev->hw_dev->rdbk_lock, lock_flags);
+ }
+ }
+ if (is_wait && !stream->ops->is_stream_stopped(stream)) {
ret = wait_event_timeout(stream->done,
!stream->streaming,
msecs_to_jiffies(500));
@@ -1044,19 +1387,11 @@
*/
static int rkisp_start(struct rkisp_stream *stream)
{
- void __iomem *base = stream->ispdev->base_addr;
struct rkisp_device *dev = stream->ispdev;
- bool is_update = false;
int ret;
- if (stream->id == RKISP_STREAM_MP || stream->id == RKISP_STREAM_SP) {
- is_update = (stream->id == RKISP_STREAM_MP) ?
- !dev->cap_dev.stream[RKISP_STREAM_SP].streaming :
- !dev->cap_dev.stream[RKISP_STREAM_MP].streaming;
- }
-
if (stream->ops->set_data_path)
- stream->ops->set_data_path(base);
+ stream->ops->set_data_path(stream);
ret = stream->ops->config_mi(stream);
if (ret)
return ret;
@@ -1064,9 +1399,6 @@
stream->ops->enable_mi(stream);
if (stream->id == RKISP_STREAM_MP || stream->id == RKISP_STREAM_SP)
hdr_config_dmatx(dev);
- if (is_update)
- dev->irq_ends_mask |=
- (stream->id == RKISP_STREAM_MP) ? ISP_FRAME_MP : ISP_FRAME_SP;
stream->streaming = true;
return 0;
@@ -1214,6 +1546,12 @@
list_del(&buf->queue);
vb2_buffer_done(&buf->vb.vb2_buf, state);
}
+ while (!list_empty(&stream->buf_done_list)) {
+ buf = list_first_entry(&stream->buf_done_list,
+ struct rkisp_buffer, queue);
+ list_del(&buf->queue);
+ vb2_buffer_done(&buf->vb.vb2_buf, state);
+ }
spin_unlock_irqrestore(&stream->vbq_lock, lock_flags);
}
@@ -1252,7 +1590,7 @@
v4l2_err(v4l2_dev, "pipeline close failed error:%d\n", ret);
rkisp_destroy_dummy_buf(stream);
atomic_dec(&dev->cap_dev.refcnt);
-
+ tasklet_disable(&stream->buf_done_tasklet);
end:
mutex_unlock(&dev->hw_dev->dev_lock);
}
@@ -1378,7 +1716,7 @@
goto pipe_stream_off;
}
}
-
+ tasklet_enable(&stream->buf_done_tasklet);
mutex_unlock(&dev->hw_dev->dev_lock);
return 0;
@@ -1445,7 +1783,7 @@
INIT_LIST_HEAD(&stream->buf_queue);
init_waitqueue_head(&stream->done);
spin_lock_init(&stream->vbq_lock);
- stream->linked = MEDIA_LNK_FL_ENABLED;
+ stream->linked = true;
switch (id) {
case RKISP_STREAM_SP:
@@ -1453,6 +1791,8 @@
sizeof(vdev->name));
stream->ops = &rkisp_sp_streams_ops;
stream->config = &rkisp_sp_stream_config;
+ stream->config->fmts = sp_fmts;
+ stream->config->fmt_size = ARRAY_SIZE(sp_fmts);
break;
case RKISP_STREAM_DMATX0:
strlcpy(vdev->name, DMATX0_VDEV_NAME,
@@ -1477,6 +1817,8 @@
sizeof(vdev->name));
stream->ops = &rkisp_mp_streams_ops;
stream->config = &rkisp_mp_stream_config;
+ stream->config->fmts = mp_fmts;
+ stream->config->fmt_size = ARRAY_SIZE(mp_fmts);
}
node = vdev_to_node(vdev);
@@ -1588,7 +1930,7 @@
stream->streaming = false;
stream->ops->disable_mi(stream);
wake_up(&stream->done);
- } else if (stream->ops->is_stream_stopped(dev->base_addr)) {
+ } else if (stream->ops->is_stream_stopped(stream)) {
stream->stopping = false;
stream->streaming = false;
wake_up(&stream->done);
@@ -1598,7 +1940,7 @@
end_tx2 = false;
}
} else {
- mi_frame_end(stream);
+ mi_frame_end(stream, FRAME_IRQ);
if (dev->dmarx_dev.trigger == T_AUTO &&
((dev->hdr.op_mode == HDR_RDBK_FRAME1 && end_tx2) ||
(dev->hdr.op_mode == HDR_RDBK_FRAME2 && end_tx2 && end_tx0))) {
@@ -1613,16 +1955,12 @@
stream = &dev->cap_dev.stream[RKISP_STREAM_MP];
if (!stream->streaming)
dev->irq_ends_mask &= ~ISP_FRAME_MP;
- else
- dev->irq_ends_mask |= ISP_FRAME_MP;
rkisp_check_idle(dev, ISP_FRAME_MP);
}
if (mis_val & CIF_MI_SP_FRAME) {
stream = &dev->cap_dev.stream[RKISP_STREAM_SP];
if (!stream->streaming)
dev->irq_ends_mask &= ~ISP_FRAME_SP;
- else
- dev->irq_ends_mask |= ISP_FRAME_SP;
rkisp_check_idle(dev, ISP_FRAME_SP);
}
}
--
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