From 95099d4622f8cb224d94e314c7a8e0df60b13f87 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Sat, 09 Dec 2023 08:38:01 +0000
Subject: [PATCH] enable docker ppp

---
 kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi |   74 +++++++++++++++++++++++++++++++------
 1 files changed, 62 insertions(+), 12 deletions(-)

diff --git a/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi b/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
index e726885..3135b2f 100755
--- a/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
+++ b/kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
@@ -34,6 +34,15 @@
 		vin-supply = <&vcc3v3_sys>;
 	};
 
+	vcc3v3_vga: vcc3v3-vga {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_vga";
+		regulator-always-on;
+		regulator-boot-on;
+		gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		vin-supply = <&vcc3v3_sys>;
+	};
 
 	pcie30_avdd0v9: pcie30-avdd0v9 {
 		compatible = "regulator-fixed";
@@ -93,6 +102,9 @@
          	compatible = "nk_io_control";	
 			pinctrl-names = "default";
         	pinctrl-0 = <&nk_io_gpio>;
+			
+			//gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
+			
 			vcc_5v {
 				gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
 				gpio_function = <0>;	
@@ -142,6 +154,47 @@
 				gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
 				gpio_function = <0>;
 			};
+	#if 0		
+			do1 {
+				gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; 
+				gpio_function = <0>;
+			};
+			
+			do2 {
+				gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+				gpio_function = <0>;
+			};
+			
+			do3 {
+				gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
+				gpio_function = <0>;
+			};
+			
+			do4 {
+				gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
+				gpio_function = <0>;
+			};
+			
+			do5 {
+				gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>; 
+				gpio_function = <0>;
+			};
+			
+			do6 {
+				gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>; 
+				gpio_function = <0>;
+			};
+			
+			do7 {
+				gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>; 
+				gpio_function = <0>;
+			};
+			
+			di1 {
+				gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
+				gpio_function = <1>;
+			};
+	#endif
 		};
 #if 0			
 	    nk_io_init {
@@ -336,12 +389,12 @@
                 remote-endpoint = <&panel_in>;
             };
         };
-    };
+   
+	};
 };
 
 &edp_phy {
-  status = "okay";
-
+	status = "okay";
 };
 
 &edp_in_vp0 {
@@ -405,7 +458,7 @@
 	phy-mode = "rgmii";
 	clock_in_out = "output";
 
-	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
+	snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
 	snps,reset-active-low;
 	/* Reset time is 20ms, 100ms for rtl8211f */
 	snps,reset-delays-us = <0 20000 100000>;
@@ -425,7 +478,9 @@
 	rx_delay = <0x2f>;
 
 	phy-handle = <&rgmii_phy0>;
+	
 	status = "disabled";
+	
 };
 
 &gmac1 {
@@ -459,9 +514,7 @@
  * power-supply should switche to vcc3v3_lcd1_n
  * when mipi panel is connected to dsi1.
  */
-&gt1x {
-	power-supply = <&vcc3v3_lcd0_n>;
-};
+
 
 &i2c3 {
 	status = "okay";
@@ -480,7 +533,7 @@
 };
 
 &i2c4 {
-	status = "okay";
+	status = "disabled";
 	gc8034: gc8034@37 {
 		compatible = "galaxycore,gc8034";
 		status = "okay";
@@ -492,7 +545,6 @@
 		reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
 		pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
 		rockchip,grf = <&grf>;
-		power-domains = <&power RK3568_PD_VI>;
 		rockchip,camera-module-index = <0>;
 		rockchip,camera-module-facing = "back";
 		rockchip,camera-module-name = "RK-CMK-8M-2-v1";
@@ -526,7 +578,7 @@
 		};
 	};
 	ov5695: ov5695@36 {
-		status = "okay";
+		status = "disabled";
 		compatible = "ovti,ov5695";
 		reg = <0x36>;
 		clocks = <&cru CLK_CIF_OUT>;
@@ -669,8 +721,6 @@
 		};
 	};
 };
-
-
 
 
 

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