From 95099d4622f8cb224d94e314c7a8e0df60b13f87 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Sat, 09 Dec 2023 08:38:01 +0000
Subject: [PATCH] enable docker ppp
---
kernel/arch/arm/mach-hisi/platmcpm.c | 27 ++++++++++++---------------
1 files changed, 12 insertions(+), 15 deletions(-)
diff --git a/kernel/arch/arm/mach-hisi/platmcpm.c b/kernel/arch/arm/mach-hisi/platmcpm.c
index 00524ab..f155e32 100644
--- a/kernel/arch/arm/mach-hisi/platmcpm.c
+++ b/kernel/arch/arm/mach-hisi/platmcpm.c
@@ -1,10 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2013-2014 Linaro Ltd.
* Copyright (c) 2013-2014 Hisilicon Limited.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/smp.h>
@@ -61,7 +58,7 @@
static void __iomem *sysctrl, *fabric;
static int hip04_cpu_table[HIP04_MAX_CLUSTERS][HIP04_MAX_CPUS_PER_CLUSTER];
-static DEFINE_RAW_SPINLOCK(boot_lock);
+static DEFINE_SPINLOCK(boot_lock);
static u32 fabric_phys_addr;
/*
* [0]: bootwrapper physical address
@@ -113,7 +110,7 @@
if (cluster >= HIP04_MAX_CLUSTERS || cpu >= HIP04_MAX_CPUS_PER_CLUSTER)
return -EINVAL;
- raw_spin_lock_irq(&boot_lock);
+ spin_lock_irq(&boot_lock);
if (hip04_cpu_table[cluster][cpu])
goto out;
@@ -147,7 +144,7 @@
out:
hip04_cpu_table[cluster][cpu]++;
- raw_spin_unlock_irq(&boot_lock);
+ spin_unlock_irq(&boot_lock);
return 0;
}
@@ -162,11 +159,11 @@
cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
- raw_spin_lock(&boot_lock);
+ spin_lock(&boot_lock);
hip04_cpu_table[cluster][cpu]--;
if (hip04_cpu_table[cluster][cpu] == 1) {
/* A power_up request went ahead of us. */
- raw_spin_unlock(&boot_lock);
+ spin_unlock(&boot_lock);
return;
} else if (hip04_cpu_table[cluster][cpu] > 1) {
pr_err("Cluster %d CPU%d boots multiple times\n", cluster, cpu);
@@ -174,7 +171,7 @@
}
last_man = hip04_cluster_is_down(cluster);
- raw_spin_unlock(&boot_lock);
+ spin_unlock(&boot_lock);
if (last_man) {
/* Since it's Cortex A15, disable L2 prefetching. */
asm volatile(
@@ -203,7 +200,7 @@
cpu >= HIP04_MAX_CPUS_PER_CLUSTER);
count = TIMEOUT_MSEC / POLL_MSEC;
- raw_spin_lock_irq(&boot_lock);
+ spin_lock_irq(&boot_lock);
for (tries = 0; tries < count; tries++) {
if (hip04_cpu_table[cluster][cpu])
goto err;
@@ -211,10 +208,10 @@
data = readl_relaxed(sysctrl + SC_CPU_RESET_STATUS(cluster));
if (data & CORE_WFI_STATUS(cpu))
break;
- raw_spin_unlock_irq(&boot_lock);
+ spin_unlock_irq(&boot_lock);
/* Wait for clean L2 when the whole cluster is down. */
msleep(POLL_MSEC);
- raw_spin_lock_irq(&boot_lock);
+ spin_lock_irq(&boot_lock);
}
if (tries >= count)
goto err;
@@ -231,10 +228,10 @@
goto err;
if (hip04_cluster_is_down(cluster))
hip04_set_snoop_filter(cluster, 0);
- raw_spin_unlock_irq(&boot_lock);
+ spin_unlock_irq(&boot_lock);
return 1;
err:
- raw_spin_unlock_irq(&boot_lock);
+ spin_unlock_irq(&boot_lock);
return 0;
}
#endif
--
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