From 95099d4622f8cb224d94e314c7a8e0df60b13f87 Mon Sep 17 00:00:00 2001
From: hc <hc@nodka.com>
Date: Sat, 09 Dec 2023 08:38:01 +0000
Subject: [PATCH] enable docker ppp
---
kernel/arch/arm/mach-davinci/da830.c | 166 ++++++++++++------------------------------------------
1 files changed, 38 insertions(+), 128 deletions(-)
diff --git a/kernel/arch/arm/mach-davinci/da830.c b/kernel/arch/arm/mach-davinci/da830.c
index 0bc5bd2..018ab4b 100644
--- a/kernel/arch/arm/mach-davinci/da830.c
+++ b/kernel/arch/arm/mach-davinci/da830.c
@@ -12,6 +12,8 @@
#include <linux/clk/davinci.h>
#include <linux/gpio.h>
#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irqchip/irq-davinci-cp-intc.h>
#include <linux/platform_data/gpio-davinci.h>
#include <asm/mach/map.h>
@@ -19,9 +21,10 @@
#include <mach/common.h>
#include <mach/cputype.h>
#include <mach/da8xx.h>
-#include <mach/irqs.h>
-#include <mach/time.h>
+#include <clocksource/timer-davinci.h>
+
+#include "irqs.h"
#include "mux.h"
/* Offsets of the 8 compare registers on the da830 */
@@ -623,101 +626,6 @@
-1
};
-/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
-static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = {
- [IRQ_DA8XX_COMMTX] = 7,
- [IRQ_DA8XX_COMMRX] = 7,
- [IRQ_DA8XX_NINT] = 7,
- [IRQ_DA8XX_EVTOUT0] = 7,
- [IRQ_DA8XX_EVTOUT1] = 7,
- [IRQ_DA8XX_EVTOUT2] = 7,
- [IRQ_DA8XX_EVTOUT3] = 7,
- [IRQ_DA8XX_EVTOUT4] = 7,
- [IRQ_DA8XX_EVTOUT5] = 7,
- [IRQ_DA8XX_EVTOUT6] = 7,
- [IRQ_DA8XX_EVTOUT7] = 7,
- [IRQ_DA8XX_CCINT0] = 7,
- [IRQ_DA8XX_CCERRINT] = 7,
- [IRQ_DA8XX_TCERRINT0] = 7,
- [IRQ_DA8XX_AEMIFINT] = 7,
- [IRQ_DA8XX_I2CINT0] = 7,
- [IRQ_DA8XX_MMCSDINT0] = 7,
- [IRQ_DA8XX_MMCSDINT1] = 7,
- [IRQ_DA8XX_ALLINT0] = 7,
- [IRQ_DA8XX_RTC] = 7,
- [IRQ_DA8XX_SPINT0] = 7,
- [IRQ_DA8XX_TINT12_0] = 7,
- [IRQ_DA8XX_TINT34_0] = 7,
- [IRQ_DA8XX_TINT12_1] = 7,
- [IRQ_DA8XX_TINT34_1] = 7,
- [IRQ_DA8XX_UARTINT0] = 7,
- [IRQ_DA8XX_KEYMGRINT] = 7,
- [IRQ_DA830_MPUERR] = 7,
- [IRQ_DA8XX_CHIPINT0] = 7,
- [IRQ_DA8XX_CHIPINT1] = 7,
- [IRQ_DA8XX_CHIPINT2] = 7,
- [IRQ_DA8XX_CHIPINT3] = 7,
- [IRQ_DA8XX_TCERRINT1] = 7,
- [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C0_RX_PULSE] = 7,
- [IRQ_DA8XX_C0_TX_PULSE] = 7,
- [IRQ_DA8XX_C0_MISC_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_PULSE] = 7,
- [IRQ_DA8XX_C1_TX_PULSE] = 7,
- [IRQ_DA8XX_C1_MISC_PULSE] = 7,
- [IRQ_DA8XX_MEMERR] = 7,
- [IRQ_DA8XX_GPIO0] = 7,
- [IRQ_DA8XX_GPIO1] = 7,
- [IRQ_DA8XX_GPIO2] = 7,
- [IRQ_DA8XX_GPIO3] = 7,
- [IRQ_DA8XX_GPIO4] = 7,
- [IRQ_DA8XX_GPIO5] = 7,
- [IRQ_DA8XX_GPIO6] = 7,
- [IRQ_DA8XX_GPIO7] = 7,
- [IRQ_DA8XX_GPIO8] = 7,
- [IRQ_DA8XX_I2CINT1] = 7,
- [IRQ_DA8XX_LCDINT] = 7,
- [IRQ_DA8XX_UARTINT1] = 7,
- [IRQ_DA8XX_MCASPINT] = 7,
- [IRQ_DA8XX_ALLINT1] = 7,
- [IRQ_DA8XX_SPINT1] = 7,
- [IRQ_DA8XX_UHPI_INT1] = 7,
- [IRQ_DA8XX_USB_INT] = 7,
- [IRQ_DA8XX_IRQN] = 7,
- [IRQ_DA8XX_RWAKEUP] = 7,
- [IRQ_DA8XX_UARTINT2] = 7,
- [IRQ_DA8XX_DFTSSINT] = 7,
- [IRQ_DA8XX_EHRPWM0] = 7,
- [IRQ_DA8XX_EHRPWM0TZ] = 7,
- [IRQ_DA8XX_EHRPWM1] = 7,
- [IRQ_DA8XX_EHRPWM1TZ] = 7,
- [IRQ_DA830_EHRPWM2] = 7,
- [IRQ_DA830_EHRPWM2TZ] = 7,
- [IRQ_DA8XX_ECAP0] = 7,
- [IRQ_DA8XX_ECAP1] = 7,
- [IRQ_DA8XX_ECAP2] = 7,
- [IRQ_DA830_EQEP0] = 7,
- [IRQ_DA830_EQEP1] = 7,
- [IRQ_DA830_T12CMPINT0_0] = 7,
- [IRQ_DA830_T12CMPINT1_0] = 7,
- [IRQ_DA830_T12CMPINT2_0] = 7,
- [IRQ_DA830_T12CMPINT3_0] = 7,
- [IRQ_DA830_T12CMPINT4_0] = 7,
- [IRQ_DA830_T12CMPINT5_0] = 7,
- [IRQ_DA830_T12CMPINT6_0] = 7,
- [IRQ_DA830_T12CMPINT7_0] = 7,
- [IRQ_DA830_T12CMPINT0_1] = 7,
- [IRQ_DA830_T12CMPINT1_1] = 7,
- [IRQ_DA830_T12CMPINT2_1] = 7,
- [IRQ_DA830_T12CMPINT3_1] = 7,
- [IRQ_DA830_T12CMPINT4_1] = 7,
- [IRQ_DA830_T12CMPINT5_1] = 7,
- [IRQ_DA830_T12CMPINT6_1] = 7,
- [IRQ_DA830_T12CMPINT7_1] = 7,
- [IRQ_DA8XX_ARMCLKSTOPREQ] = 7,
-};
-
static struct map_desc da830_io_desc[] = {
{
.virtual = IO_VIRT,
@@ -759,7 +667,9 @@
};
static struct davinci_gpio_platform_data da830_gpio_platform_data = {
- .ngpio = 128,
+ .no_auto_base = true,
+ .base = 0,
+ .ngpio = 128,
};
int __init da830_register_gpio(void)
@@ -767,32 +677,17 @@
return da8xx_register_gpio(&da830_gpio_platform_data);
}
-static struct davinci_timer_instance da830_timer_instance[2] = {
- {
- .base = DA8XX_TIMER64P0_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_0,
- .top_irq = IRQ_DA8XX_TINT34_0,
- .cmp_off = DA830_CMP12_0,
- .cmp_irq = IRQ_DA830_T12CMPINT0_0,
- },
- {
- .base = DA8XX_TIMER64P1_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_1,
- .top_irq = IRQ_DA8XX_TINT34_1,
- .cmp_off = DA830_CMP12_0,
- .cmp_irq = IRQ_DA830_T12CMPINT0_1,
- },
-};
-
/*
- * T0_BOT: Timer 0, bottom : Used for clock_event & clocksource
- * T0_TOP: Timer 0, top : Used by DSP
- * T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
+ * Bottom half of timer0 is used both for clock even and clocksource.
+ * Top half is used by DSP.
*/
-static struct davinci_timer_info da830_timer_info = {
- .timers = da830_timer_instance,
- .clockevent_id = T0_BOT,
- .clocksource_id = T0_BOT,
+static const struct davinci_timer_cfg da830_timer_cfg = {
+ .reg = DEFINE_RES_IO(DA8XX_TIMER64P0_BASE, SZ_4K),
+ .irq = {
+ DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA830_T12CMPINT0_0)),
+ DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_0)),
+ },
+ .cmp_off = DA830_CMP12_0,
};
static const struct davinci_soc_info davinci_soc_info_da830 = {
@@ -804,11 +699,6 @@
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
.pinmux_pins = da830_pins,
.pinmux_pins_num = ARRAY_SIZE(da830_pins),
- .intc_base = DA8XX_CP_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_CP_INTC,
- .intc_irq_prios = da830_default_priorities,
- .intc_irq_num = DA830_N_CP_INTC_IRQ,
- .timer_info = &da830_timer_info,
.emac_pdata = &da8xx_emac_pdata,
};
@@ -820,10 +710,25 @@
WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
}
+static const struct davinci_cp_intc_config da830_cp_intc_config = {
+ .reg = {
+ .start = DA8XX_CP_INTC_BASE,
+ .end = DA8XX_CP_INTC_BASE + SZ_8K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = DA830_N_CP_INTC_IRQ,
+};
+
+void __init da830_init_irq(void)
+{
+ davinci_cp_intc_init(&da830_cp_intc_config);
+}
+
void __init da830_init_time(void)
{
void __iomem *pll;
struct clk *clk;
+ int rv;
clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA830_REF_FREQ);
@@ -832,8 +737,13 @@
da830_pll_init(NULL, pll, NULL);
clk = clk_get(NULL, "timer0");
+ if (WARN_ON(IS_ERR(clk))) {
+ pr_err("Unable to get the timer clock\n");
+ return;
+ }
- davinci_timer_init(clk);
+ rv = davinci_timer_register(clk, &da830_timer_cfg);
+ WARN(rv, "Unable to register the timer: %d\n", rv);
}
static struct resource da830_psc0_resources[] = {
--
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